1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/debugfs.h> 7 #include <linux/string_helpers.h> 8 9 #include <drm/drm_debugfs.h> 10 #include <drm/drm_edid.h> 11 #include <drm/drm_fourcc.h> 12 13 #include "hsw_ips.h" 14 #include "i915_drv.h" 15 #include "i915_irq.h" 16 #include "i915_reg.h" 17 #include "i9xx_wm_regs.h" 18 #include "intel_alpm.h" 19 #include "intel_bo.h" 20 #include "intel_crtc.h" 21 #include "intel_crtc_state_dump.h" 22 #include "intel_de.h" 23 #include "intel_display_debugfs.h" 24 #include "intel_display_debugfs_params.h" 25 #include "intel_display_power.h" 26 #include "intel_display_power_well.h" 27 #include "intel_display_types.h" 28 #include "intel_dmc.h" 29 #include "intel_dp.h" 30 #include "intel_dp_link_training.h" 31 #include "intel_dp_mst.h" 32 #include "intel_dp_test.h" 33 #include "intel_drrs.h" 34 #include "intel_fb.h" 35 #include "intel_fbc.h" 36 #include "intel_fbdev.h" 37 #include "intel_hdcp.h" 38 #include "intel_hdmi.h" 39 #include "intel_hotplug.h" 40 #include "intel_panel.h" 41 #include "intel_pps.h" 42 #include "intel_psr.h" 43 #include "intel_psr_regs.h" 44 #include "intel_vdsc.h" 45 #include "intel_wm.h" 46 47 static struct intel_display *node_to_intel_display(struct drm_info_node *node) 48 { 49 return to_intel_display(node->minor->dev); 50 } 51 52 static int intel_display_caps(struct seq_file *m, void *data) 53 { 54 struct intel_display *display = node_to_intel_display(m->private); 55 struct drm_printer p = drm_seq_file_printer(m); 56 57 intel_display_device_info_print(DISPLAY_INFO(display), 58 DISPLAY_RUNTIME_INFO(display), &p); 59 intel_display_params_dump(&display->params, display->drm->driver->name, &p); 60 61 return 0; 62 } 63 64 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 65 { 66 struct intel_display *display = node_to_intel_display(m->private); 67 68 spin_lock(&display->fb_tracking.lock); 69 70 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 71 display->fb_tracking.busy_bits); 72 73 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 74 display->fb_tracking.flip_bits); 75 76 spin_unlock(&display->fb_tracking.lock); 77 78 return 0; 79 } 80 81 static int i915_sr_status(struct seq_file *m, void *unused) 82 { 83 struct intel_display *display = node_to_intel_display(m->private); 84 struct drm_i915_private *dev_priv = to_i915(display->drm); 85 intel_wakeref_t wakeref; 86 bool sr_enabled = false; 87 88 wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT); 89 90 if (DISPLAY_VER(display) >= 9) 91 /* no global SR status; inspect per-plane WM */; 92 else if (HAS_PCH_SPLIT(dev_priv)) 93 sr_enabled = intel_de_read(display, WM1_LP_ILK) & WM_LP_ENABLE; 94 else if (display->platform.i965gm || display->platform.g4x || 95 display->platform.i945g || display->platform.i945gm) 96 sr_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN; 97 else if (display->platform.i915gm) 98 sr_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN; 99 else if (display->platform.pineview) 100 sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN; 101 else if (display->platform.valleyview || display->platform.cherryview) 102 sr_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 103 104 intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref); 105 106 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 107 108 return 0; 109 } 110 111 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 112 { 113 struct intel_display *display = node_to_intel_display(m->private); 114 struct intel_framebuffer *fbdev_fb = NULL; 115 struct drm_framebuffer *drm_fb; 116 117 #ifdef CONFIG_DRM_FBDEV_EMULATION 118 fbdev_fb = intel_fbdev_framebuffer(display->fbdev.fbdev); 119 if (fbdev_fb) { 120 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 121 fbdev_fb->base.width, 122 fbdev_fb->base.height, 123 fbdev_fb->base.format->depth, 124 fbdev_fb->base.format->cpp[0] * 8, 125 fbdev_fb->base.modifier, 126 drm_framebuffer_read_refcount(&fbdev_fb->base)); 127 intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base)); 128 seq_putc(m, '\n'); 129 } 130 #endif 131 132 mutex_lock(&display->drm->mode_config.fb_lock); 133 drm_for_each_fb(drm_fb, display->drm) { 134 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 135 if (fb == fbdev_fb) 136 continue; 137 138 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 139 fb->base.width, 140 fb->base.height, 141 fb->base.format->depth, 142 fb->base.format->cpp[0] * 8, 143 fb->base.modifier, 144 drm_framebuffer_read_refcount(&fb->base)); 145 intel_bo_describe(m, intel_fb_bo(&fb->base)); 146 seq_putc(m, '\n'); 147 } 148 mutex_unlock(&display->drm->mode_config.fb_lock); 149 150 return 0; 151 } 152 153 static int i915_power_domain_info(struct seq_file *m, void *unused) 154 { 155 struct intel_display *display = node_to_intel_display(m->private); 156 157 intel_display_power_debug(display, m); 158 159 return 0; 160 } 161 162 static void intel_seq_print_mode(struct seq_file *m, int tabs, 163 const struct drm_display_mode *mode) 164 { 165 int i; 166 167 for (i = 0; i < tabs; i++) 168 seq_putc(m, '\t'); 169 170 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 171 } 172 173 static void intel_encoder_info(struct seq_file *m, 174 struct intel_crtc *crtc, 175 struct intel_encoder *encoder) 176 { 177 struct intel_display *display = node_to_intel_display(m->private); 178 struct drm_connector_list_iter conn_iter; 179 struct drm_connector *connector; 180 181 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 182 encoder->base.base.id, encoder->base.name); 183 184 drm_connector_list_iter_begin(display->drm, &conn_iter); 185 drm_for_each_connector_iter(connector, &conn_iter) { 186 const struct drm_connector_state *conn_state = 187 connector->state; 188 189 if (conn_state->best_encoder != &encoder->base) 190 continue; 191 192 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 193 connector->base.id, connector->name); 194 } 195 drm_connector_list_iter_end(&conn_iter); 196 } 197 198 static void intel_panel_info(struct seq_file *m, 199 struct intel_connector *connector) 200 { 201 const struct drm_display_mode *fixed_mode; 202 203 if (list_empty(&connector->panel.fixed_modes)) 204 return; 205 206 seq_puts(m, "\tfixed modes:\n"); 207 208 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 209 intel_seq_print_mode(m, 2, fixed_mode); 210 } 211 212 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 213 { 214 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 215 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 216 217 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 218 seq_printf(m, "\taudio support: %s\n", 219 str_yes_no(connector->base.display_info.has_audio)); 220 221 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 222 connector->detect_edid, &intel_dp->aux); 223 } 224 225 static void intel_dp_mst_info(struct seq_file *m, 226 struct intel_connector *connector) 227 { 228 bool has_audio = connector->base.display_info.has_audio; 229 230 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 231 } 232 233 static void intel_hdmi_info(struct seq_file *m, 234 struct intel_connector *connector) 235 { 236 bool has_audio = connector->base.display_info.has_audio; 237 238 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 239 } 240 241 static void intel_connector_info(struct seq_file *m, 242 struct drm_connector *connector) 243 { 244 struct intel_connector *intel_connector = to_intel_connector(connector); 245 const struct drm_display_mode *mode; 246 247 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 248 connector->base.id, connector->name, 249 drm_get_connector_status_name(connector->status)); 250 251 if (connector->status == connector_status_disconnected) 252 return; 253 254 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 255 connector->display_info.width_mm, 256 connector->display_info.height_mm); 257 seq_printf(m, "\tsubpixel order: %s\n", 258 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 259 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 260 261 switch (connector->connector_type) { 262 case DRM_MODE_CONNECTOR_DisplayPort: 263 case DRM_MODE_CONNECTOR_eDP: 264 if (intel_connector->mst.dp) 265 intel_dp_mst_info(m, intel_connector); 266 else 267 intel_dp_info(m, intel_connector); 268 break; 269 case DRM_MODE_CONNECTOR_HDMIA: 270 intel_hdmi_info(m, intel_connector); 271 break; 272 default: 273 break; 274 } 275 276 intel_hdcp_info(m, intel_connector); 277 278 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 279 280 intel_panel_info(m, intel_connector); 281 282 seq_printf(m, "\tmodes:\n"); 283 list_for_each_entry(mode, &connector->modes, head) 284 intel_seq_print_mode(m, 2, mode); 285 } 286 287 static const char *plane_type(enum drm_plane_type type) 288 { 289 switch (type) { 290 case DRM_PLANE_TYPE_OVERLAY: 291 return "OVL"; 292 case DRM_PLANE_TYPE_PRIMARY: 293 return "PRI"; 294 case DRM_PLANE_TYPE_CURSOR: 295 return "CUR"; 296 /* 297 * Deliberately omitting default: to generate compiler warnings 298 * when a new drm_plane_type gets added. 299 */ 300 } 301 302 return "unknown"; 303 } 304 305 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 306 { 307 /* 308 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 309 * will print them all to visualize if the values are misused 310 */ 311 snprintf(buf, bufsize, 312 "%s%s%s%s%s%s(0x%08x)", 313 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 314 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 315 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 316 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 317 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 318 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 319 rotation); 320 } 321 322 static const char *plane_visibility(const struct intel_plane_state *plane_state) 323 { 324 if (plane_state->uapi.visible) 325 return "visible"; 326 327 if (plane_state->is_y_plane) 328 return "Y plane"; 329 330 return "hidden"; 331 } 332 333 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 334 { 335 const struct intel_plane_state *plane_state = 336 to_intel_plane_state(plane->base.state); 337 const struct drm_framebuffer *fb = plane_state->uapi.fb; 338 struct drm_rect src, dst; 339 char rot_str[48]; 340 341 src = drm_plane_state_src(&plane_state->uapi); 342 dst = drm_plane_state_dest(&plane_state->uapi); 343 344 plane_rotation(rot_str, sizeof(rot_str), 345 plane_state->uapi.rotation); 346 347 seq_puts(m, "\t\tuapi: [FB:"); 348 if (fb) 349 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 350 &fb->format->format, fb->modifier, fb->width, 351 fb->height); 352 else 353 seq_puts(m, "0] n/a,0x0,0x0,"); 354 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 355 ", rotation=%s\n", plane_visibility(plane_state), 356 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 357 358 if (plane_state->planar_linked_plane) 359 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 360 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 361 plane_state->is_y_plane ? "Y plane" : "UV plane"); 362 } 363 364 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 365 { 366 const struct intel_plane_state *plane_state = 367 to_intel_plane_state(plane->base.state); 368 const struct drm_framebuffer *fb = plane_state->hw.fb; 369 char rot_str[48]; 370 371 if (!fb) 372 return; 373 374 plane_rotation(rot_str, sizeof(rot_str), 375 plane_state->hw.rotation); 376 377 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 378 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 379 fb->base.id, &fb->format->format, 380 fb->modifier, fb->width, fb->height, 381 str_yes_no(plane_state->uapi.visible), 382 DRM_RECT_FP_ARG(&plane_state->uapi.src), 383 DRM_RECT_ARG(&plane_state->uapi.dst), 384 rot_str); 385 } 386 387 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 388 { 389 struct intel_display *display = node_to_intel_display(m->private); 390 struct intel_plane *plane; 391 392 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { 393 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 394 plane->base.base.id, plane->base.name, 395 plane_type(plane->base.type)); 396 intel_plane_uapi_info(m, plane); 397 intel_plane_hw_info(m, plane); 398 } 399 } 400 401 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 402 { 403 const struct intel_crtc_state *crtc_state = 404 to_intel_crtc_state(crtc->base.state); 405 int num_scalers = crtc->num_scalers; 406 int i; 407 408 /* Not all platforms have a scaler */ 409 if (num_scalers) { 410 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 411 num_scalers, 412 crtc_state->scaler_state.scaler_users, 413 crtc_state->scaler_state.scaler_id, 414 crtc_state->hw.scaling_filter); 415 416 for (i = 0; i < num_scalers; i++) { 417 const struct intel_scaler *sc = 418 &crtc_state->scaler_state.scalers[i]; 419 420 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 421 i, str_yes_no(sc->in_use), sc->mode); 422 } 423 seq_puts(m, "\n"); 424 } else { 425 seq_puts(m, "\tNo scalers available on this platform\n"); 426 } 427 } 428 429 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 430 static void crtc_updates_info(struct seq_file *m, 431 struct intel_crtc *crtc, 432 const char *hdr) 433 { 434 u64 count; 435 int row; 436 437 count = 0; 438 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 439 count += crtc->debug.vbl.times[row]; 440 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 441 if (!count) 442 return; 443 444 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 445 char columns[80] = " |"; 446 unsigned int x; 447 448 if (row & 1) { 449 const char *units; 450 451 if (row > 10) { 452 x = 1000000; 453 units = "ms"; 454 } else { 455 x = 1000; 456 units = "us"; 457 } 458 459 snprintf(columns, sizeof(columns), "%4ld%s |", 460 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 461 } 462 463 if (crtc->debug.vbl.times[row]) { 464 x = ilog2(crtc->debug.vbl.times[row]); 465 memset(columns + 8, '*', x); 466 columns[8 + x] = '\0'; 467 } 468 469 seq_printf(m, "%s%s\n", hdr, columns); 470 } 471 472 seq_printf(m, "%sMin update: %lluns\n", 473 hdr, crtc->debug.vbl.min); 474 seq_printf(m, "%sMax update: %lluns\n", 475 hdr, crtc->debug.vbl.max); 476 seq_printf(m, "%sAverage update: %lluns\n", 477 hdr, div64_u64(crtc->debug.vbl.sum, count)); 478 seq_printf(m, "%sOverruns > %uus: %u\n", 479 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 480 } 481 482 static int crtc_updates_show(struct seq_file *m, void *data) 483 { 484 crtc_updates_info(m, m->private, ""); 485 return 0; 486 } 487 488 static int crtc_updates_open(struct inode *inode, struct file *file) 489 { 490 return single_open(file, crtc_updates_show, inode->i_private); 491 } 492 493 static ssize_t crtc_updates_write(struct file *file, 494 const char __user *ubuf, 495 size_t len, loff_t *offp) 496 { 497 struct seq_file *m = file->private_data; 498 struct intel_crtc *crtc = m->private; 499 500 /* May race with an update. Meh. */ 501 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 502 503 return len; 504 } 505 506 static const struct file_operations crtc_updates_fops = { 507 .owner = THIS_MODULE, 508 .open = crtc_updates_open, 509 .read = seq_read, 510 .llseek = seq_lseek, 511 .release = single_release, 512 .write = crtc_updates_write 513 }; 514 515 static void crtc_updates_add(struct intel_crtc *crtc) 516 { 517 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 518 crtc, &crtc_updates_fops); 519 } 520 521 #else 522 static void crtc_updates_info(struct seq_file *m, 523 struct intel_crtc *crtc, 524 const char *hdr) 525 { 526 } 527 528 static void crtc_updates_add(struct intel_crtc *crtc) 529 { 530 } 531 #endif 532 533 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 534 { 535 struct intel_display *display = node_to_intel_display(m->private); 536 struct drm_printer p = drm_seq_file_printer(m); 537 const struct intel_crtc_state *crtc_state = 538 to_intel_crtc_state(crtc->base.state); 539 struct intel_encoder *encoder; 540 541 seq_printf(m, "[CRTC:%d:%s]:\n", 542 crtc->base.base.id, crtc->base.name); 543 544 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 545 str_yes_no(crtc_state->uapi.enable), 546 str_yes_no(crtc_state->uapi.active), 547 DRM_MODE_ARG(&crtc_state->uapi.mode)); 548 549 seq_printf(m, "\thw: enable=%s, active=%s\n", 550 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 551 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 552 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 553 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 554 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 555 556 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 557 DRM_RECT_ARG(&crtc_state->pipe_src), 558 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 559 560 intel_scaler_info(m, crtc); 561 562 if (crtc_state->joiner_pipes) 563 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 564 crtc_state->joiner_pipes, 565 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); 566 567 intel_vdsc_state_dump(&p, 1, crtc_state); 568 569 for_each_intel_encoder_mask(display->drm, encoder, 570 crtc_state->uapi.encoder_mask) 571 intel_encoder_info(m, crtc, encoder); 572 573 intel_plane_info(m, crtc); 574 575 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 576 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 577 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 578 579 crtc_updates_info(m, crtc, "\t"); 580 } 581 582 static int i915_display_info(struct seq_file *m, void *unused) 583 { 584 struct intel_display *display = node_to_intel_display(m->private); 585 struct drm_i915_private *dev_priv = to_i915(display->drm); 586 struct intel_crtc *crtc; 587 struct drm_connector *connector; 588 struct drm_connector_list_iter conn_iter; 589 intel_wakeref_t wakeref; 590 591 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 592 593 drm_modeset_lock_all(display->drm); 594 595 seq_printf(m, "CRTC info\n"); 596 seq_printf(m, "---------\n"); 597 for_each_intel_crtc(display->drm, crtc) 598 intel_crtc_info(m, crtc); 599 600 seq_printf(m, "\n"); 601 seq_printf(m, "Connector info\n"); 602 seq_printf(m, "--------------\n"); 603 drm_connector_list_iter_begin(display->drm, &conn_iter); 604 drm_for_each_connector_iter(connector, &conn_iter) 605 intel_connector_info(m, connector); 606 drm_connector_list_iter_end(&conn_iter); 607 608 drm_modeset_unlock_all(display->drm); 609 610 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 611 612 return 0; 613 } 614 615 static int i915_display_capabilities(struct seq_file *m, void *unused) 616 { 617 struct intel_display *display = node_to_intel_display(m->private); 618 struct drm_printer p = drm_seq_file_printer(m); 619 620 intel_display_device_info_print(DISPLAY_INFO(display), 621 DISPLAY_RUNTIME_INFO(display), &p); 622 623 return 0; 624 } 625 626 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 627 { 628 struct intel_display *display = node_to_intel_display(m->private); 629 struct drm_printer p = drm_seq_file_printer(m); 630 struct intel_shared_dpll *pll; 631 int i; 632 633 drm_modeset_lock_all(display->drm); 634 635 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 636 display->dpll.ref_clks.nssc, 637 display->dpll.ref_clks.ssc); 638 639 for_each_shared_dpll(display, pll, i) { 640 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 641 pll->info->name, pll->info->id); 642 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 643 pll->state.pipe_mask, pll->active_mask, 644 str_yes_no(pll->on)); 645 drm_printf(&p, " tracked hardware state:\n"); 646 intel_dpll_dump_hw_state(display, &p, &pll->state.hw_state); 647 } 648 drm_modeset_unlock_all(display->drm); 649 650 return 0; 651 } 652 653 static int i915_ddb_info(struct seq_file *m, void *unused) 654 { 655 struct intel_display *display = node_to_intel_display(m->private); 656 struct skl_ddb_entry *entry; 657 struct intel_crtc *crtc; 658 659 if (DISPLAY_VER(display) < 9) 660 return -ENODEV; 661 662 drm_modeset_lock_all(display->drm); 663 664 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 665 666 for_each_intel_crtc(display->drm, crtc) { 667 struct intel_crtc_state *crtc_state = 668 to_intel_crtc_state(crtc->base.state); 669 enum pipe pipe = crtc->pipe; 670 enum plane_id plane_id; 671 672 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 673 674 for_each_plane_id_on_crtc(crtc, plane_id) { 675 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 676 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 677 entry->start, entry->end, 678 skl_ddb_entry_size(entry)); 679 } 680 681 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 682 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 683 entry->end, skl_ddb_entry_size(entry)); 684 } 685 686 drm_modeset_unlock_all(display->drm); 687 688 return 0; 689 } 690 691 static bool 692 intel_lpsp_power_well_enabled(struct intel_display *display, 693 enum i915_power_well_id power_well_id) 694 { 695 struct drm_i915_private *i915 = to_i915(display->drm); 696 intel_wakeref_t wakeref; 697 bool is_enabled; 698 699 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 700 is_enabled = intel_display_power_well_is_enabled(display, 701 power_well_id); 702 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 703 704 return is_enabled; 705 } 706 707 static int i915_lpsp_status(struct seq_file *m, void *unused) 708 { 709 struct intel_display *display = node_to_intel_display(m->private); 710 bool lpsp_enabled = false; 711 712 if (DISPLAY_VER(display) >= 13 || IS_DISPLAY_VER(display, 9, 10)) { 713 lpsp_enabled = !intel_lpsp_power_well_enabled(display, SKL_DISP_PW_2); 714 } else if (IS_DISPLAY_VER(display, 11, 12)) { 715 lpsp_enabled = !intel_lpsp_power_well_enabled(display, ICL_DISP_PW_3); 716 } else if (display->platform.haswell || display->platform.broadwell) { 717 lpsp_enabled = !intel_lpsp_power_well_enabled(display, HSW_DISP_PW_GLOBAL); 718 } else { 719 seq_puts(m, "LPSP: not supported\n"); 720 return 0; 721 } 722 723 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 724 725 return 0; 726 } 727 728 static int i915_dp_mst_info(struct seq_file *m, void *unused) 729 { 730 struct intel_display *display = node_to_intel_display(m->private); 731 struct intel_encoder *intel_encoder; 732 struct intel_digital_port *dig_port; 733 struct drm_connector *connector; 734 struct drm_connector_list_iter conn_iter; 735 736 drm_connector_list_iter_begin(display->drm, &conn_iter); 737 drm_for_each_connector_iter(connector, &conn_iter) { 738 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 739 continue; 740 741 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 742 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 743 continue; 744 745 dig_port = enc_to_dig_port(intel_encoder); 746 if (!intel_dp_mst_source_support(&dig_port->dp)) 747 continue; 748 749 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 750 dig_port->base.base.base.id, 751 dig_port->base.base.name); 752 drm_dp_mst_dump_topology(m, &dig_port->dp.mst.mgr); 753 } 754 drm_connector_list_iter_end(&conn_iter); 755 756 return 0; 757 } 758 759 static ssize_t 760 i915_fifo_underrun_reset_write(struct file *filp, 761 const char __user *ubuf, 762 size_t cnt, loff_t *ppos) 763 { 764 struct intel_display *display = filp->private_data; 765 struct intel_crtc *crtc; 766 int ret; 767 bool reset; 768 769 ret = kstrtobool_from_user(ubuf, cnt, &reset); 770 if (ret) 771 return ret; 772 773 if (!reset) 774 return cnt; 775 776 for_each_intel_crtc(display->drm, crtc) { 777 struct drm_crtc_commit *commit; 778 struct intel_crtc_state *crtc_state; 779 780 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 781 if (ret) 782 return ret; 783 784 crtc_state = to_intel_crtc_state(crtc->base.state); 785 commit = crtc_state->uapi.commit; 786 if (commit) { 787 ret = wait_for_completion_interruptible(&commit->hw_done); 788 if (!ret) 789 ret = wait_for_completion_interruptible(&commit->flip_done); 790 } 791 792 if (!ret && crtc_state->hw.active) { 793 drm_dbg_kms(display->drm, 794 "Re-arming FIFO underruns on pipe %c\n", 795 pipe_name(crtc->pipe)); 796 797 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 798 } 799 800 drm_modeset_unlock(&crtc->base.mutex); 801 802 if (ret) 803 return ret; 804 } 805 806 intel_fbc_reset_underrun(display); 807 808 return cnt; 809 } 810 811 static const struct file_operations i915_fifo_underrun_reset_ops = { 812 .owner = THIS_MODULE, 813 .open = simple_open, 814 .write = i915_fifo_underrun_reset_write, 815 .llseek = default_llseek, 816 }; 817 818 static const struct drm_info_list intel_display_debugfs_list[] = { 819 {"intel_display_caps", intel_display_caps, 0}, 820 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 821 {"i915_sr_status", i915_sr_status, 0}, 822 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 823 {"i915_power_domain_info", i915_power_domain_info, 0}, 824 {"i915_display_info", i915_display_info, 0}, 825 {"i915_display_capabilities", i915_display_capabilities, 0}, 826 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 827 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 828 {"i915_ddb_info", i915_ddb_info, 0}, 829 {"i915_lpsp_status", i915_lpsp_status, 0}, 830 }; 831 832 void intel_display_debugfs_register(struct intel_display *display) 833 { 834 struct drm_i915_private *i915 = to_i915(display->drm); 835 struct drm_minor *minor = display->drm->primary; 836 837 debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root, 838 display, &i915_fifo_underrun_reset_ops); 839 840 drm_debugfs_create_files(intel_display_debugfs_list, 841 ARRAY_SIZE(intel_display_debugfs_list), 842 minor->debugfs_root, minor); 843 844 intel_bios_debugfs_register(display); 845 intel_cdclk_debugfs_register(display); 846 intel_dmc_debugfs_register(display); 847 intel_dp_test_debugfs_register(display); 848 intel_fbc_debugfs_register(display); 849 intel_hpd_debugfs_register(i915); 850 intel_opregion_debugfs_register(display); 851 intel_psr_debugfs_register(display); 852 intel_wm_debugfs_register(i915); 853 intel_display_debugfs_params(display); 854 } 855 856 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 857 { 858 struct intel_connector *connector = m->private; 859 struct intel_display *display = to_intel_display(connector); 860 struct intel_encoder *encoder = intel_attached_encoder(connector); 861 int connector_type = connector->base.connector_type; 862 bool lpsp_capable = false; 863 864 if (!encoder) 865 return -ENODEV; 866 867 if (connector->base.status != connector_status_connected) 868 return -ENODEV; 869 870 if (DISPLAY_VER(display) >= 13) 871 lpsp_capable = encoder->port <= PORT_B; 872 else if (DISPLAY_VER(display) >= 12) 873 /* 874 * Actually TGL can drive LPSP on port till DDI_C 875 * but there is no physical connected DDI_C on TGL sku's, 876 * even driver is not initializing DDI_C port for gen12. 877 */ 878 lpsp_capable = encoder->port <= PORT_B; 879 else if (DISPLAY_VER(display) == 11) 880 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 881 connector_type == DRM_MODE_CONNECTOR_eDP); 882 else if (IS_DISPLAY_VER(display, 9, 10)) 883 lpsp_capable = (encoder->port == PORT_A && 884 (connector_type == DRM_MODE_CONNECTOR_DSI || 885 connector_type == DRM_MODE_CONNECTOR_eDP || 886 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 887 else if (display->platform.haswell || display->platform.broadwell) 888 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 889 890 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 891 892 return 0; 893 } 894 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 895 896 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 897 { 898 struct intel_connector *connector = m->private; 899 struct intel_display *display = to_intel_display(connector); 900 struct drm_crtc *crtc; 901 struct intel_dp *intel_dp; 902 struct drm_modeset_acquire_ctx ctx; 903 struct intel_crtc_state *crtc_state = NULL; 904 int ret = 0; 905 bool try_again = false; 906 907 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 908 909 do { 910 try_again = false; 911 ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, 912 &ctx); 913 if (ret) { 914 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 915 try_again = true; 916 continue; 917 } 918 break; 919 } 920 crtc = connector->base.state->crtc; 921 if (connector->base.status != connector_status_connected || !crtc) { 922 ret = -ENODEV; 923 break; 924 } 925 ret = drm_modeset_lock(&crtc->mutex, &ctx); 926 if (ret == -EDEADLK) { 927 ret = drm_modeset_backoff(&ctx); 928 if (!ret) { 929 try_again = true; 930 continue; 931 } 932 break; 933 } else if (ret) { 934 break; 935 } 936 intel_dp = intel_attached_dp(connector); 937 crtc_state = to_intel_crtc_state(crtc->state); 938 seq_printf(m, "DSC_Enabled: %s\n", 939 str_yes_no(crtc_state->dsc.compression_enable)); 940 seq_printf(m, "DSC_Sink_Support: %s\n", 941 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 942 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 943 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 944 DP_DSC_RGB)), 945 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 946 DP_DSC_YCbCr420_Native)), 947 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 948 DP_DSC_YCbCr444))); 949 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 950 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 951 seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n", 952 drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), intel_dp_is_edp(intel_dp))); 953 seq_printf(m, "Force_DSC_Enable: %s\n", 954 str_yes_no(intel_dp->force_dsc_en)); 955 if (!intel_dp_is_edp(intel_dp)) 956 seq_printf(m, "FEC_Sink_Support: %s\n", 957 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 958 } while (try_again); 959 960 drm_modeset_drop_locks(&ctx); 961 drm_modeset_acquire_fini(&ctx); 962 963 return ret; 964 } 965 966 static ssize_t i915_dsc_fec_support_write(struct file *file, 967 const char __user *ubuf, 968 size_t len, loff_t *offp) 969 { 970 struct seq_file *m = file->private_data; 971 struct intel_connector *connector = m->private; 972 struct intel_display *display = to_intel_display(connector); 973 struct intel_encoder *encoder = intel_attached_encoder(connector); 974 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 975 bool dsc_enable = false; 976 int ret; 977 978 if (len == 0) 979 return 0; 980 981 drm_dbg(display->drm, 982 "Copied %zu bytes from user to force DSC\n", len); 983 984 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 985 if (ret < 0) 986 return ret; 987 988 drm_dbg(display->drm, "Got %s for DSC Enable\n", 989 (dsc_enable) ? "true" : "false"); 990 intel_dp->force_dsc_en = dsc_enable; 991 992 *offp += len; 993 return len; 994 } 995 996 static int i915_dsc_fec_support_open(struct inode *inode, 997 struct file *file) 998 { 999 return single_open(file, i915_dsc_fec_support_show, 1000 inode->i_private); 1001 } 1002 1003 static const struct file_operations i915_dsc_fec_support_fops = { 1004 .owner = THIS_MODULE, 1005 .open = i915_dsc_fec_support_open, 1006 .read = seq_read, 1007 .llseek = seq_lseek, 1008 .release = single_release, 1009 .write = i915_dsc_fec_support_write 1010 }; 1011 1012 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1013 { 1014 struct intel_connector *connector = m->private; 1015 struct intel_display *display = to_intel_display(connector); 1016 struct intel_encoder *encoder = intel_attached_encoder(connector); 1017 struct drm_crtc *crtc; 1018 struct intel_crtc_state *crtc_state; 1019 int ret; 1020 1021 if (!encoder) 1022 return -ENODEV; 1023 1024 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1025 if (ret) 1026 return ret; 1027 1028 crtc = connector->base.state->crtc; 1029 if (connector->base.status != connector_status_connected || !crtc) { 1030 ret = -ENODEV; 1031 goto out; 1032 } 1033 1034 crtc_state = to_intel_crtc_state(crtc->state); 1035 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1036 1037 out: drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1038 1039 return ret; 1040 } 1041 1042 static ssize_t i915_dsc_bpc_write(struct file *file, 1043 const char __user *ubuf, 1044 size_t len, loff_t *offp) 1045 { 1046 struct seq_file *m = file->private_data; 1047 struct intel_connector *connector = m->private; 1048 struct intel_encoder *encoder = intel_attached_encoder(connector); 1049 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1050 int dsc_bpc = 0; 1051 int ret; 1052 1053 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1054 if (ret < 0) 1055 return ret; 1056 1057 intel_dp->force_dsc_bpc = dsc_bpc; 1058 *offp += len; 1059 1060 return len; 1061 } 1062 1063 static int i915_dsc_bpc_open(struct inode *inode, 1064 struct file *file) 1065 { 1066 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1067 } 1068 1069 static const struct file_operations i915_dsc_bpc_fops = { 1070 .owner = THIS_MODULE, 1071 .open = i915_dsc_bpc_open, 1072 .read = seq_read, 1073 .llseek = seq_lseek, 1074 .release = single_release, 1075 .write = i915_dsc_bpc_write 1076 }; 1077 1078 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1079 { 1080 struct intel_connector *connector = m->private; 1081 struct intel_display *display = to_intel_display(connector); 1082 struct intel_encoder *encoder = intel_attached_encoder(connector); 1083 struct drm_crtc *crtc; 1084 struct intel_crtc_state *crtc_state; 1085 int ret; 1086 1087 if (!encoder) 1088 return -ENODEV; 1089 1090 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1091 if (ret) 1092 return ret; 1093 1094 crtc = connector->base.state->crtc; 1095 if (connector->base.status != connector_status_connected || !crtc) { 1096 ret = -ENODEV; 1097 goto out; 1098 } 1099 1100 crtc_state = to_intel_crtc_state(crtc->state); 1101 seq_printf(m, "DSC_Output_Format: %s\n", 1102 intel_output_format_name(crtc_state->output_format)); 1103 1104 out: drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1105 1106 return ret; 1107 } 1108 1109 static ssize_t i915_dsc_output_format_write(struct file *file, 1110 const char __user *ubuf, 1111 size_t len, loff_t *offp) 1112 { 1113 struct seq_file *m = file->private_data; 1114 struct intel_connector *connector = m->private; 1115 struct intel_encoder *encoder = intel_attached_encoder(connector); 1116 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1117 int dsc_output_format = 0; 1118 int ret; 1119 1120 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1121 if (ret < 0) 1122 return ret; 1123 1124 intel_dp->force_dsc_output_format = dsc_output_format; 1125 *offp += len; 1126 1127 return len; 1128 } 1129 1130 static int i915_dsc_output_format_open(struct inode *inode, 1131 struct file *file) 1132 { 1133 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1134 } 1135 1136 static const struct file_operations i915_dsc_output_format_fops = { 1137 .owner = THIS_MODULE, 1138 .open = i915_dsc_output_format_open, 1139 .read = seq_read, 1140 .llseek = seq_lseek, 1141 .release = single_release, 1142 .write = i915_dsc_output_format_write 1143 }; 1144 1145 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1146 { 1147 struct intel_connector *connector = m->private; 1148 struct intel_display *display = to_intel_display(connector); 1149 struct intel_encoder *encoder = intel_attached_encoder(connector); 1150 struct drm_crtc *crtc; 1151 struct intel_dp *intel_dp; 1152 int ret; 1153 1154 if (!encoder) 1155 return -ENODEV; 1156 1157 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1158 if (ret) 1159 return ret; 1160 1161 crtc = connector->base.state->crtc; 1162 if (connector->base.status != connector_status_connected || !crtc) { 1163 ret = -ENODEV; 1164 goto out; 1165 } 1166 1167 intel_dp = intel_attached_dp(connector); 1168 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1169 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1170 1171 out: 1172 drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1173 1174 return ret; 1175 } 1176 1177 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1178 const char __user *ubuf, 1179 size_t len, loff_t *offp) 1180 { 1181 struct seq_file *m = file->private_data; 1182 struct intel_connector *connector = m->private; 1183 struct intel_display *display = to_intel_display(connector); 1184 struct intel_encoder *encoder = intel_attached_encoder(connector); 1185 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1186 bool dsc_fractional_bpp_enable = false; 1187 int ret; 1188 1189 if (len == 0) 1190 return 0; 1191 1192 drm_dbg(display->drm, 1193 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1194 1195 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1196 if (ret < 0) 1197 return ret; 1198 1199 drm_dbg(display->drm, "Got %s for DSC Fractional BPP Enable\n", 1200 (dsc_fractional_bpp_enable) ? "true" : "false"); 1201 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1202 1203 *offp += len; 1204 1205 return len; 1206 } 1207 1208 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1209 struct file *file) 1210 { 1211 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1212 } 1213 1214 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1215 .owner = THIS_MODULE, 1216 .open = i915_dsc_fractional_bpp_open, 1217 .read = seq_read, 1218 .llseek = seq_lseek, 1219 .release = single_release, 1220 .write = i915_dsc_fractional_bpp_write 1221 }; 1222 1223 /* 1224 * Returns the Current CRTC's bpc. 1225 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1226 */ 1227 static int i915_current_bpc_show(struct seq_file *m, void *data) 1228 { 1229 struct intel_crtc *crtc = m->private; 1230 struct intel_crtc_state *crtc_state; 1231 int ret; 1232 1233 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1234 if (ret) 1235 return ret; 1236 1237 crtc_state = to_intel_crtc_state(crtc->base.state); 1238 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1239 1240 drm_modeset_unlock(&crtc->base.mutex); 1241 1242 return ret; 1243 } 1244 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1245 1246 /* Pipe may differ from crtc index if pipes are fused off */ 1247 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1248 { 1249 struct intel_crtc *crtc = m->private; 1250 1251 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1252 1253 return 0; 1254 } 1255 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1256 1257 static int i915_joiner_show(struct seq_file *m, void *data) 1258 { 1259 struct intel_connector *connector = m->private; 1260 1261 seq_printf(m, "%d\n", connector->force_joined_pipes); 1262 1263 return 0; 1264 } 1265 1266 static ssize_t i915_joiner_write(struct file *file, 1267 const char __user *ubuf, 1268 size_t len, loff_t *offp) 1269 { 1270 struct seq_file *m = file->private_data; 1271 struct intel_connector *connector = m->private; 1272 struct intel_display *display = to_intel_display(connector); 1273 int force_joined_pipes = 0; 1274 int ret; 1275 1276 if (len == 0) 1277 return 0; 1278 1279 ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes); 1280 if (ret < 0) 1281 return ret; 1282 1283 switch (force_joined_pipes) { 1284 case 0: 1285 case 1: 1286 case 2: 1287 connector->force_joined_pipes = force_joined_pipes; 1288 break; 1289 case 4: 1290 if (HAS_ULTRAJOINER(display)) { 1291 connector->force_joined_pipes = force_joined_pipes; 1292 break; 1293 } 1294 1295 fallthrough; 1296 default: 1297 return -EINVAL; 1298 } 1299 1300 *offp += len; 1301 1302 return len; 1303 } 1304 1305 static int i915_joiner_open(struct inode *inode, struct file *file) 1306 { 1307 return single_open(file, i915_joiner_show, inode->i_private); 1308 } 1309 1310 static const struct file_operations i915_joiner_fops = { 1311 .owner = THIS_MODULE, 1312 .open = i915_joiner_open, 1313 .read = seq_read, 1314 .llseek = seq_lseek, 1315 .release = single_release, 1316 .write = i915_joiner_write 1317 }; 1318 1319 /** 1320 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1321 * @connector: pointer to a registered intel_connector 1322 * 1323 * Cleanup will be done by drm_connector_unregister() through a call to 1324 * drm_debugfs_connector_remove(). 1325 */ 1326 void intel_connector_debugfs_add(struct intel_connector *connector) 1327 { 1328 struct intel_display *display = to_intel_display(connector); 1329 struct dentry *root = connector->base.debugfs_entry; 1330 int connector_type = connector->base.connector_type; 1331 1332 /* The connector must have been registered beforehands. */ 1333 if (!root) 1334 return; 1335 1336 intel_drrs_connector_debugfs_add(connector); 1337 intel_hdcp_connector_debugfs_add(connector); 1338 intel_pps_connector_debugfs_add(connector); 1339 intel_psr_connector_debugfs_add(connector); 1340 intel_alpm_lobf_debugfs_add(connector); 1341 intel_dp_link_training_debugfs_add(connector); 1342 1343 if (DISPLAY_VER(display) >= 11 && 1344 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst.dp) || 1345 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1346 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1347 connector, &i915_dsc_fec_support_fops); 1348 1349 debugfs_create_file("i915_dsc_bpc", 0644, root, 1350 connector, &i915_dsc_bpc_fops); 1351 1352 debugfs_create_file("i915_dsc_output_format", 0644, root, 1353 connector, &i915_dsc_output_format_fops); 1354 1355 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1356 connector, &i915_dsc_fractional_bpp_fops); 1357 } 1358 1359 if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1360 connector_type == DRM_MODE_CONNECTOR_eDP) && 1361 intel_dp_has_joiner(intel_attached_dp(connector))) { 1362 debugfs_create_file("i915_joiner_force_enable", 0644, root, 1363 connector, &i915_joiner_fops); 1364 } 1365 1366 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1367 connector_type == DRM_MODE_CONNECTOR_eDP || 1368 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1369 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1370 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1371 debugfs_create_file("i915_lpsp_capability", 0444, root, 1372 connector, &i915_lpsp_capability_fops); 1373 } 1374 1375 /** 1376 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1377 * @crtc: pointer to a drm_crtc 1378 * 1379 * Failure to add debugfs entries should generally be ignored. 1380 */ 1381 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1382 { 1383 struct dentry *root = crtc->base.debugfs_entry; 1384 1385 if (!root) 1386 return; 1387 1388 crtc_updates_add(crtc); 1389 intel_drrs_crtc_debugfs_add(crtc); 1390 intel_fbc_crtc_debugfs_add(crtc); 1391 hsw_ips_crtc_debugfs_add(crtc); 1392 1393 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1394 &i915_current_bpc_fops); 1395 debugfs_create_file("i915_pipe", 0444, root, crtc, 1396 &intel_crtc_pipe_fops); 1397 } 1398