1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/string_helpers.h> 7 8 #include <drm/drm_debugfs.h> 9 #include <drm/drm_edid.h> 10 #include <drm/drm_fourcc.h> 11 12 #include "hsw_ips.h" 13 #include "i915_debugfs.h" 14 #include "i915_irq.h" 15 #include "i915_reg.h" 16 #include "intel_alpm.h" 17 #include "intel_crtc.h" 18 #include "intel_de.h" 19 #include "intel_crtc_state_dump.h" 20 #include "intel_display_debugfs.h" 21 #include "intel_display_debugfs_params.h" 22 #include "intel_display_power.h" 23 #include "intel_display_power_well.h" 24 #include "intel_display_types.h" 25 #include "intel_dmc.h" 26 #include "intel_dp.h" 27 #include "intel_dp_mst.h" 28 #include "intel_drrs.h" 29 #include "intel_fbc.h" 30 #include "intel_fbdev.h" 31 #include "intel_hdcp.h" 32 #include "intel_hdmi.h" 33 #include "intel_hotplug.h" 34 #include "intel_panel.h" 35 #include "intel_pps.h" 36 #include "intel_psr.h" 37 #include "intel_psr_regs.h" 38 #include "intel_wm.h" 39 40 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 41 { 42 return to_i915(node->minor->dev); 43 } 44 45 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 46 { 47 struct drm_i915_private *dev_priv = node_to_i915(m->private); 48 49 spin_lock(&dev_priv->display.fb_tracking.lock); 50 51 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 52 dev_priv->display.fb_tracking.busy_bits); 53 54 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 55 dev_priv->display.fb_tracking.flip_bits); 56 57 spin_unlock(&dev_priv->display.fb_tracking.lock); 58 59 return 0; 60 } 61 62 static int i915_sr_status(struct seq_file *m, void *unused) 63 { 64 struct drm_i915_private *dev_priv = node_to_i915(m->private); 65 intel_wakeref_t wakeref; 66 bool sr_enabled = false; 67 68 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 69 70 if (DISPLAY_VER(dev_priv) >= 9) 71 /* no global SR status; inspect per-plane WM */; 72 else if (HAS_PCH_SPLIT(dev_priv)) 73 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 74 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 75 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 76 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 77 else if (IS_I915GM(dev_priv)) 78 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 79 else if (IS_PINEVIEW(dev_priv)) 80 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 81 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 82 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 83 84 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 85 86 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 87 88 return 0; 89 } 90 91 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 92 { 93 struct drm_i915_private *dev_priv = node_to_i915(m->private); 94 struct intel_framebuffer *fbdev_fb = NULL; 95 struct drm_framebuffer *drm_fb; 96 97 #ifdef CONFIG_DRM_FBDEV_EMULATION 98 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 99 if (fbdev_fb) { 100 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 101 fbdev_fb->base.width, 102 fbdev_fb->base.height, 103 fbdev_fb->base.format->depth, 104 fbdev_fb->base.format->cpp[0] * 8, 105 fbdev_fb->base.modifier, 106 drm_framebuffer_read_refcount(&fbdev_fb->base)); 107 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 108 seq_putc(m, '\n'); 109 } 110 #endif 111 112 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 113 drm_for_each_fb(drm_fb, &dev_priv->drm) { 114 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 115 if (fb == fbdev_fb) 116 continue; 117 118 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 119 fb->base.width, 120 fb->base.height, 121 fb->base.format->depth, 122 fb->base.format->cpp[0] * 8, 123 fb->base.modifier, 124 drm_framebuffer_read_refcount(&fb->base)); 125 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 126 seq_putc(m, '\n'); 127 } 128 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 129 130 return 0; 131 } 132 133 static int i915_power_domain_info(struct seq_file *m, void *unused) 134 { 135 struct drm_i915_private *i915 = node_to_i915(m->private); 136 137 intel_display_power_debug(i915, m); 138 139 return 0; 140 } 141 142 static void intel_seq_print_mode(struct seq_file *m, int tabs, 143 const struct drm_display_mode *mode) 144 { 145 int i; 146 147 for (i = 0; i < tabs; i++) 148 seq_putc(m, '\t'); 149 150 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 151 } 152 153 static void intel_encoder_info(struct seq_file *m, 154 struct intel_crtc *crtc, 155 struct intel_encoder *encoder) 156 { 157 struct drm_i915_private *dev_priv = node_to_i915(m->private); 158 struct drm_connector_list_iter conn_iter; 159 struct drm_connector *connector; 160 161 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 162 encoder->base.base.id, encoder->base.name); 163 164 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 165 drm_for_each_connector_iter(connector, &conn_iter) { 166 const struct drm_connector_state *conn_state = 167 connector->state; 168 169 if (conn_state->best_encoder != &encoder->base) 170 continue; 171 172 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 173 connector->base.id, connector->name); 174 } 175 drm_connector_list_iter_end(&conn_iter); 176 } 177 178 static void intel_panel_info(struct seq_file *m, 179 struct intel_connector *connector) 180 { 181 const struct drm_display_mode *fixed_mode; 182 183 if (list_empty(&connector->panel.fixed_modes)) 184 return; 185 186 seq_puts(m, "\tfixed modes:\n"); 187 188 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 189 intel_seq_print_mode(m, 2, fixed_mode); 190 } 191 192 static void intel_hdcp_info(struct seq_file *m, 193 struct intel_connector *intel_connector, 194 bool remote_req) 195 { 196 bool hdcp_cap = false, hdcp2_cap = false; 197 198 if (!intel_connector->hdcp.shim) { 199 seq_puts(m, "No Connector Support"); 200 goto out; 201 } 202 203 if (remote_req) { 204 intel_hdcp_get_remote_capability(intel_connector, 205 &hdcp_cap, 206 &hdcp2_cap); 207 } else { 208 hdcp_cap = intel_hdcp_get_capability(intel_connector); 209 hdcp2_cap = intel_hdcp2_get_capability(intel_connector); 210 } 211 212 if (hdcp_cap) 213 seq_puts(m, "HDCP1.4 "); 214 if (hdcp2_cap) 215 seq_puts(m, "HDCP2.2 "); 216 217 if (!hdcp_cap && !hdcp2_cap) 218 seq_puts(m, "None"); 219 220 out: 221 seq_puts(m, "\n"); 222 } 223 224 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 225 { 226 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 227 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 228 229 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 230 seq_printf(m, "\taudio support: %s\n", 231 str_yes_no(connector->base.display_info.has_audio)); 232 233 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 234 connector->detect_edid, &intel_dp->aux); 235 } 236 237 static void intel_dp_mst_info(struct seq_file *m, 238 struct intel_connector *connector) 239 { 240 bool has_audio = connector->base.display_info.has_audio; 241 242 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 243 } 244 245 static void intel_hdmi_info(struct seq_file *m, 246 struct intel_connector *connector) 247 { 248 bool has_audio = connector->base.display_info.has_audio; 249 250 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 251 } 252 253 static void intel_connector_info(struct seq_file *m, 254 struct drm_connector *connector) 255 { 256 struct intel_connector *intel_connector = to_intel_connector(connector); 257 const struct drm_display_mode *mode; 258 259 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 260 connector->base.id, connector->name, 261 drm_get_connector_status_name(connector->status)); 262 263 if (connector->status == connector_status_disconnected) 264 return; 265 266 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 267 connector->display_info.width_mm, 268 connector->display_info.height_mm); 269 seq_printf(m, "\tsubpixel order: %s\n", 270 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 271 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 272 273 switch (connector->connector_type) { 274 case DRM_MODE_CONNECTOR_DisplayPort: 275 case DRM_MODE_CONNECTOR_eDP: 276 if (intel_connector->mst_port) 277 intel_dp_mst_info(m, intel_connector); 278 else 279 intel_dp_info(m, intel_connector); 280 break; 281 case DRM_MODE_CONNECTOR_HDMIA: 282 intel_hdmi_info(m, intel_connector); 283 break; 284 default: 285 break; 286 } 287 288 seq_puts(m, "\tHDCP version: "); 289 if (intel_connector->mst_port) { 290 intel_hdcp_info(m, intel_connector, true); 291 seq_puts(m, "\tMST Hub HDCP version: "); 292 } 293 intel_hdcp_info(m, intel_connector, false); 294 295 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 296 297 intel_panel_info(m, intel_connector); 298 299 seq_printf(m, "\tmodes:\n"); 300 list_for_each_entry(mode, &connector->modes, head) 301 intel_seq_print_mode(m, 2, mode); 302 } 303 304 static const char *plane_type(enum drm_plane_type type) 305 { 306 switch (type) { 307 case DRM_PLANE_TYPE_OVERLAY: 308 return "OVL"; 309 case DRM_PLANE_TYPE_PRIMARY: 310 return "PRI"; 311 case DRM_PLANE_TYPE_CURSOR: 312 return "CUR"; 313 /* 314 * Deliberately omitting default: to generate compiler warnings 315 * when a new drm_plane_type gets added. 316 */ 317 } 318 319 return "unknown"; 320 } 321 322 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 323 { 324 /* 325 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 326 * will print them all to visualize if the values are misused 327 */ 328 snprintf(buf, bufsize, 329 "%s%s%s%s%s%s(0x%08x)", 330 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 331 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 332 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 333 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 334 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 335 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 336 rotation); 337 } 338 339 static const char *plane_visibility(const struct intel_plane_state *plane_state) 340 { 341 if (plane_state->uapi.visible) 342 return "visible"; 343 344 if (plane_state->planar_slave) 345 return "planar-slave"; 346 347 return "hidden"; 348 } 349 350 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 351 { 352 const struct intel_plane_state *plane_state = 353 to_intel_plane_state(plane->base.state); 354 const struct drm_framebuffer *fb = plane_state->uapi.fb; 355 struct drm_rect src, dst; 356 char rot_str[48]; 357 358 src = drm_plane_state_src(&plane_state->uapi); 359 dst = drm_plane_state_dest(&plane_state->uapi); 360 361 plane_rotation(rot_str, sizeof(rot_str), 362 plane_state->uapi.rotation); 363 364 seq_puts(m, "\t\tuapi: [FB:"); 365 if (fb) 366 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 367 &fb->format->format, fb->modifier, fb->width, 368 fb->height); 369 else 370 seq_puts(m, "0] n/a,0x0,0x0,"); 371 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 372 ", rotation=%s\n", plane_visibility(plane_state), 373 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 374 375 if (plane_state->planar_linked_plane) 376 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 377 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 378 plane_state->planar_slave ? "slave" : "master"); 379 } 380 381 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 382 { 383 const struct intel_plane_state *plane_state = 384 to_intel_plane_state(plane->base.state); 385 const struct drm_framebuffer *fb = plane_state->hw.fb; 386 char rot_str[48]; 387 388 if (!fb) 389 return; 390 391 plane_rotation(rot_str, sizeof(rot_str), 392 plane_state->hw.rotation); 393 394 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 395 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 396 fb->base.id, &fb->format->format, 397 fb->modifier, fb->width, fb->height, 398 str_yes_no(plane_state->uapi.visible), 399 DRM_RECT_FP_ARG(&plane_state->uapi.src), 400 DRM_RECT_ARG(&plane_state->uapi.dst), 401 rot_str); 402 } 403 404 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 405 { 406 struct drm_i915_private *dev_priv = node_to_i915(m->private); 407 struct intel_plane *plane; 408 409 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 410 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 411 plane->base.base.id, plane->base.name, 412 plane_type(plane->base.type)); 413 intel_plane_uapi_info(m, plane); 414 intel_plane_hw_info(m, plane); 415 } 416 } 417 418 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 419 { 420 const struct intel_crtc_state *crtc_state = 421 to_intel_crtc_state(crtc->base.state); 422 int num_scalers = crtc->num_scalers; 423 int i; 424 425 /* Not all platformas have a scaler */ 426 if (num_scalers) { 427 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 428 num_scalers, 429 crtc_state->scaler_state.scaler_users, 430 crtc_state->scaler_state.scaler_id, 431 crtc_state->hw.scaling_filter); 432 433 for (i = 0; i < num_scalers; i++) { 434 const struct intel_scaler *sc = 435 &crtc_state->scaler_state.scalers[i]; 436 437 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 438 i, str_yes_no(sc->in_use), sc->mode); 439 } 440 seq_puts(m, "\n"); 441 } else { 442 seq_puts(m, "\tNo scalers available on this platform\n"); 443 } 444 } 445 446 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 447 static void crtc_updates_info(struct seq_file *m, 448 struct intel_crtc *crtc, 449 const char *hdr) 450 { 451 u64 count; 452 int row; 453 454 count = 0; 455 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 456 count += crtc->debug.vbl.times[row]; 457 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 458 if (!count) 459 return; 460 461 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 462 char columns[80] = " |"; 463 unsigned int x; 464 465 if (row & 1) { 466 const char *units; 467 468 if (row > 10) { 469 x = 1000000; 470 units = "ms"; 471 } else { 472 x = 1000; 473 units = "us"; 474 } 475 476 snprintf(columns, sizeof(columns), "%4ld%s |", 477 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 478 } 479 480 if (crtc->debug.vbl.times[row]) { 481 x = ilog2(crtc->debug.vbl.times[row]); 482 memset(columns + 8, '*', x); 483 columns[8 + x] = '\0'; 484 } 485 486 seq_printf(m, "%s%s\n", hdr, columns); 487 } 488 489 seq_printf(m, "%sMin update: %lluns\n", 490 hdr, crtc->debug.vbl.min); 491 seq_printf(m, "%sMax update: %lluns\n", 492 hdr, crtc->debug.vbl.max); 493 seq_printf(m, "%sAverage update: %lluns\n", 494 hdr, div64_u64(crtc->debug.vbl.sum, count)); 495 seq_printf(m, "%sOverruns > %uus: %u\n", 496 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 497 } 498 499 static int crtc_updates_show(struct seq_file *m, void *data) 500 { 501 crtc_updates_info(m, m->private, ""); 502 return 0; 503 } 504 505 static int crtc_updates_open(struct inode *inode, struct file *file) 506 { 507 return single_open(file, crtc_updates_show, inode->i_private); 508 } 509 510 static ssize_t crtc_updates_write(struct file *file, 511 const char __user *ubuf, 512 size_t len, loff_t *offp) 513 { 514 struct seq_file *m = file->private_data; 515 struct intel_crtc *crtc = m->private; 516 517 /* May race with an update. Meh. */ 518 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 519 520 return len; 521 } 522 523 static const struct file_operations crtc_updates_fops = { 524 .owner = THIS_MODULE, 525 .open = crtc_updates_open, 526 .read = seq_read, 527 .llseek = seq_lseek, 528 .release = single_release, 529 .write = crtc_updates_write 530 }; 531 532 static void crtc_updates_add(struct intel_crtc *crtc) 533 { 534 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 535 crtc, &crtc_updates_fops); 536 } 537 538 #else 539 static void crtc_updates_info(struct seq_file *m, 540 struct intel_crtc *crtc, 541 const char *hdr) 542 { 543 } 544 545 static void crtc_updates_add(struct intel_crtc *crtc) 546 { 547 } 548 #endif 549 550 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 551 { 552 struct drm_i915_private *dev_priv = node_to_i915(m->private); 553 const struct intel_crtc_state *crtc_state = 554 to_intel_crtc_state(crtc->base.state); 555 struct intel_encoder *encoder; 556 557 seq_printf(m, "[CRTC:%d:%s]:\n", 558 crtc->base.base.id, crtc->base.name); 559 560 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 561 str_yes_no(crtc_state->uapi.enable), 562 str_yes_no(crtc_state->uapi.active), 563 DRM_MODE_ARG(&crtc_state->uapi.mode)); 564 565 seq_printf(m, "\thw: enable=%s, active=%s\n", 566 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 567 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 568 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 569 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 570 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 571 572 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 573 DRM_RECT_ARG(&crtc_state->pipe_src), 574 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 575 576 intel_scaler_info(m, crtc); 577 578 if (crtc_state->bigjoiner_pipes) 579 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 580 crtc_state->bigjoiner_pipes, 581 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); 582 583 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 584 crtc_state->uapi.encoder_mask) 585 intel_encoder_info(m, crtc, encoder); 586 587 intel_plane_info(m, crtc); 588 589 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 590 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 591 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 592 593 crtc_updates_info(m, crtc, "\t"); 594 } 595 596 static int i915_display_info(struct seq_file *m, void *unused) 597 { 598 struct drm_i915_private *dev_priv = node_to_i915(m->private); 599 struct intel_crtc *crtc; 600 struct drm_connector *connector; 601 struct drm_connector_list_iter conn_iter; 602 intel_wakeref_t wakeref; 603 604 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 605 606 drm_modeset_lock_all(&dev_priv->drm); 607 608 seq_printf(m, "CRTC info\n"); 609 seq_printf(m, "---------\n"); 610 for_each_intel_crtc(&dev_priv->drm, crtc) 611 intel_crtc_info(m, crtc); 612 613 seq_printf(m, "\n"); 614 seq_printf(m, "Connector info\n"); 615 seq_printf(m, "--------------\n"); 616 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 617 drm_for_each_connector_iter(connector, &conn_iter) 618 intel_connector_info(m, connector); 619 drm_connector_list_iter_end(&conn_iter); 620 621 drm_modeset_unlock_all(&dev_priv->drm); 622 623 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 624 625 return 0; 626 } 627 628 static int i915_display_capabilities(struct seq_file *m, void *unused) 629 { 630 struct drm_i915_private *i915 = node_to_i915(m->private); 631 struct drm_printer p = drm_seq_file_printer(m); 632 633 intel_display_device_info_print(DISPLAY_INFO(i915), 634 DISPLAY_RUNTIME_INFO(i915), &p); 635 636 return 0; 637 } 638 639 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 640 { 641 struct drm_i915_private *dev_priv = node_to_i915(m->private); 642 struct drm_printer p = drm_seq_file_printer(m); 643 struct intel_shared_dpll *pll; 644 int i; 645 646 drm_modeset_lock_all(&dev_priv->drm); 647 648 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 649 dev_priv->display.dpll.ref_clks.nssc, 650 dev_priv->display.dpll.ref_clks.ssc); 651 652 for_each_shared_dpll(dev_priv, pll, i) { 653 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 654 pll->info->name, pll->info->id); 655 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 656 pll->state.pipe_mask, pll->active_mask, 657 str_yes_no(pll->on)); 658 drm_printf(&p, " tracked hardware state:\n"); 659 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state); 660 } 661 drm_modeset_unlock_all(&dev_priv->drm); 662 663 return 0; 664 } 665 666 static int i915_ddb_info(struct seq_file *m, void *unused) 667 { 668 struct drm_i915_private *dev_priv = node_to_i915(m->private); 669 struct skl_ddb_entry *entry; 670 struct intel_crtc *crtc; 671 672 if (DISPLAY_VER(dev_priv) < 9) 673 return -ENODEV; 674 675 drm_modeset_lock_all(&dev_priv->drm); 676 677 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 678 679 for_each_intel_crtc(&dev_priv->drm, crtc) { 680 struct intel_crtc_state *crtc_state = 681 to_intel_crtc_state(crtc->base.state); 682 enum pipe pipe = crtc->pipe; 683 enum plane_id plane_id; 684 685 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 686 687 for_each_plane_id_on_crtc(crtc, plane_id) { 688 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 689 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 690 entry->start, entry->end, 691 skl_ddb_entry_size(entry)); 692 } 693 694 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 695 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 696 entry->end, skl_ddb_entry_size(entry)); 697 } 698 699 drm_modeset_unlock_all(&dev_priv->drm); 700 701 return 0; 702 } 703 704 static bool 705 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 706 enum i915_power_well_id power_well_id) 707 { 708 intel_wakeref_t wakeref; 709 bool is_enabled; 710 711 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 712 is_enabled = intel_display_power_well_is_enabled(i915, 713 power_well_id); 714 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 715 716 return is_enabled; 717 } 718 719 static int i915_lpsp_status(struct seq_file *m, void *unused) 720 { 721 struct drm_i915_private *i915 = node_to_i915(m->private); 722 bool lpsp_enabled = false; 723 724 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 725 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 726 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 727 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 728 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 729 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 730 } else { 731 seq_puts(m, "LPSP: not supported\n"); 732 return 0; 733 } 734 735 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 736 737 return 0; 738 } 739 740 static int i915_dp_mst_info(struct seq_file *m, void *unused) 741 { 742 struct drm_i915_private *dev_priv = node_to_i915(m->private); 743 struct intel_encoder *intel_encoder; 744 struct intel_digital_port *dig_port; 745 struct drm_connector *connector; 746 struct drm_connector_list_iter conn_iter; 747 748 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 749 drm_for_each_connector_iter(connector, &conn_iter) { 750 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 751 continue; 752 753 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 754 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 755 continue; 756 757 dig_port = enc_to_dig_port(intel_encoder); 758 if (!intel_dp_mst_source_support(&dig_port->dp)) 759 continue; 760 761 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 762 dig_port->base.base.base.id, 763 dig_port->base.base.name); 764 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 765 } 766 drm_connector_list_iter_end(&conn_iter); 767 768 return 0; 769 } 770 771 static ssize_t i915_displayport_test_active_write(struct file *file, 772 const char __user *ubuf, 773 size_t len, loff_t *offp) 774 { 775 char *input_buffer; 776 int status = 0; 777 struct drm_device *dev; 778 struct drm_connector *connector; 779 struct drm_connector_list_iter conn_iter; 780 struct intel_dp *intel_dp; 781 int val = 0; 782 783 dev = ((struct seq_file *)file->private_data)->private; 784 785 if (len == 0) 786 return 0; 787 788 input_buffer = memdup_user_nul(ubuf, len); 789 if (IS_ERR(input_buffer)) 790 return PTR_ERR(input_buffer); 791 792 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len); 793 794 drm_connector_list_iter_begin(dev, &conn_iter); 795 drm_for_each_connector_iter(connector, &conn_iter) { 796 struct intel_encoder *encoder; 797 798 if (connector->connector_type != 799 DRM_MODE_CONNECTOR_DisplayPort) 800 continue; 801 802 encoder = to_intel_encoder(connector->encoder); 803 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 804 continue; 805 806 if (encoder && connector->status == connector_status_connected) { 807 intel_dp = enc_to_intel_dp(encoder); 808 status = kstrtoint(input_buffer, 10, &val); 809 if (status < 0) 810 break; 811 drm_dbg(dev, "Got %d for test active\n", val); 812 /* To prevent erroneous activation of the compliance 813 * testing code, only accept an actual value of 1 here 814 */ 815 if (val == 1) 816 intel_dp->compliance.test_active = true; 817 else 818 intel_dp->compliance.test_active = false; 819 } 820 } 821 drm_connector_list_iter_end(&conn_iter); 822 kfree(input_buffer); 823 if (status < 0) 824 return status; 825 826 *offp += len; 827 return len; 828 } 829 830 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 831 { 832 struct drm_i915_private *dev_priv = m->private; 833 struct drm_connector *connector; 834 struct drm_connector_list_iter conn_iter; 835 struct intel_dp *intel_dp; 836 837 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 838 drm_for_each_connector_iter(connector, &conn_iter) { 839 struct intel_encoder *encoder; 840 841 if (connector->connector_type != 842 DRM_MODE_CONNECTOR_DisplayPort) 843 continue; 844 845 encoder = to_intel_encoder(connector->encoder); 846 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 847 continue; 848 849 if (encoder && connector->status == connector_status_connected) { 850 intel_dp = enc_to_intel_dp(encoder); 851 if (intel_dp->compliance.test_active) 852 seq_puts(m, "1"); 853 else 854 seq_puts(m, "0"); 855 } else 856 seq_puts(m, "0"); 857 } 858 drm_connector_list_iter_end(&conn_iter); 859 860 return 0; 861 } 862 863 static int i915_displayport_test_active_open(struct inode *inode, 864 struct file *file) 865 { 866 return single_open(file, i915_displayport_test_active_show, 867 inode->i_private); 868 } 869 870 static const struct file_operations i915_displayport_test_active_fops = { 871 .owner = THIS_MODULE, 872 .open = i915_displayport_test_active_open, 873 .read = seq_read, 874 .llseek = seq_lseek, 875 .release = single_release, 876 .write = i915_displayport_test_active_write 877 }; 878 879 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 880 { 881 struct drm_i915_private *dev_priv = m->private; 882 struct drm_connector *connector; 883 struct drm_connector_list_iter conn_iter; 884 struct intel_dp *intel_dp; 885 886 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 887 drm_for_each_connector_iter(connector, &conn_iter) { 888 struct intel_encoder *encoder; 889 890 if (connector->connector_type != 891 DRM_MODE_CONNECTOR_DisplayPort) 892 continue; 893 894 encoder = to_intel_encoder(connector->encoder); 895 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 896 continue; 897 898 if (encoder && connector->status == connector_status_connected) { 899 intel_dp = enc_to_intel_dp(encoder); 900 if (intel_dp->compliance.test_type == 901 DP_TEST_LINK_EDID_READ) 902 seq_printf(m, "%lx", 903 intel_dp->compliance.test_data.edid); 904 else if (intel_dp->compliance.test_type == 905 DP_TEST_LINK_VIDEO_PATTERN) { 906 seq_printf(m, "hdisplay: %d\n", 907 intel_dp->compliance.test_data.hdisplay); 908 seq_printf(m, "vdisplay: %d\n", 909 intel_dp->compliance.test_data.vdisplay); 910 seq_printf(m, "bpc: %u\n", 911 intel_dp->compliance.test_data.bpc); 912 } else if (intel_dp->compliance.test_type == 913 DP_TEST_LINK_PHY_TEST_PATTERN) { 914 seq_printf(m, "pattern: %d\n", 915 intel_dp->compliance.test_data.phytest.phy_pattern); 916 seq_printf(m, "Number of lanes: %d\n", 917 intel_dp->compliance.test_data.phytest.num_lanes); 918 seq_printf(m, "Link Rate: %d\n", 919 intel_dp->compliance.test_data.phytest.link_rate); 920 seq_printf(m, "level: %02x\n", 921 intel_dp->train_set[0]); 922 } 923 } else 924 seq_puts(m, "0"); 925 } 926 drm_connector_list_iter_end(&conn_iter); 927 928 return 0; 929 } 930 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 931 932 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 933 { 934 struct drm_i915_private *dev_priv = m->private; 935 struct drm_connector *connector; 936 struct drm_connector_list_iter conn_iter; 937 struct intel_dp *intel_dp; 938 939 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 940 drm_for_each_connector_iter(connector, &conn_iter) { 941 struct intel_encoder *encoder; 942 943 if (connector->connector_type != 944 DRM_MODE_CONNECTOR_DisplayPort) 945 continue; 946 947 encoder = to_intel_encoder(connector->encoder); 948 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 949 continue; 950 951 if (encoder && connector->status == connector_status_connected) { 952 intel_dp = enc_to_intel_dp(encoder); 953 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 954 } else 955 seq_puts(m, "0"); 956 } 957 drm_connector_list_iter_end(&conn_iter); 958 959 return 0; 960 } 961 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 962 963 static ssize_t 964 i915_fifo_underrun_reset_write(struct file *filp, 965 const char __user *ubuf, 966 size_t cnt, loff_t *ppos) 967 { 968 struct drm_i915_private *dev_priv = filp->private_data; 969 struct intel_crtc *crtc; 970 int ret; 971 bool reset; 972 973 ret = kstrtobool_from_user(ubuf, cnt, &reset); 974 if (ret) 975 return ret; 976 977 if (!reset) 978 return cnt; 979 980 for_each_intel_crtc(&dev_priv->drm, crtc) { 981 struct drm_crtc_commit *commit; 982 struct intel_crtc_state *crtc_state; 983 984 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 985 if (ret) 986 return ret; 987 988 crtc_state = to_intel_crtc_state(crtc->base.state); 989 commit = crtc_state->uapi.commit; 990 if (commit) { 991 ret = wait_for_completion_interruptible(&commit->hw_done); 992 if (!ret) 993 ret = wait_for_completion_interruptible(&commit->flip_done); 994 } 995 996 if (!ret && crtc_state->hw.active) { 997 drm_dbg_kms(&dev_priv->drm, 998 "Re-arming FIFO underruns on pipe %c\n", 999 pipe_name(crtc->pipe)); 1000 1001 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1002 } 1003 1004 drm_modeset_unlock(&crtc->base.mutex); 1005 1006 if (ret) 1007 return ret; 1008 } 1009 1010 intel_fbc_reset_underrun(dev_priv); 1011 1012 return cnt; 1013 } 1014 1015 static const struct file_operations i915_fifo_underrun_reset_ops = { 1016 .owner = THIS_MODULE, 1017 .open = simple_open, 1018 .write = i915_fifo_underrun_reset_write, 1019 .llseek = default_llseek, 1020 }; 1021 1022 static const struct drm_info_list intel_display_debugfs_list[] = { 1023 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1024 {"i915_sr_status", i915_sr_status, 0}, 1025 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1026 {"i915_power_domain_info", i915_power_domain_info, 0}, 1027 {"i915_display_info", i915_display_info, 0}, 1028 {"i915_display_capabilities", i915_display_capabilities, 0}, 1029 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1030 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1031 {"i915_ddb_info", i915_ddb_info, 0}, 1032 {"i915_lpsp_status", i915_lpsp_status, 0}, 1033 }; 1034 1035 static const struct { 1036 const char *name; 1037 const struct file_operations *fops; 1038 } intel_display_debugfs_files[] = { 1039 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1040 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1041 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1042 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1043 }; 1044 1045 void intel_display_debugfs_register(struct drm_i915_private *i915) 1046 { 1047 struct drm_minor *minor = i915->drm.primary; 1048 int i; 1049 1050 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1051 debugfs_create_file(intel_display_debugfs_files[i].name, 1052 0644, 1053 minor->debugfs_root, 1054 to_i915(minor->dev), 1055 intel_display_debugfs_files[i].fops); 1056 } 1057 1058 drm_debugfs_create_files(intel_display_debugfs_list, 1059 ARRAY_SIZE(intel_display_debugfs_list), 1060 minor->debugfs_root, minor); 1061 1062 intel_bios_debugfs_register(i915); 1063 intel_cdclk_debugfs_register(i915); 1064 intel_dmc_debugfs_register(i915); 1065 intel_fbc_debugfs_register(i915); 1066 intel_hpd_debugfs_register(i915); 1067 intel_opregion_debugfs_register(i915); 1068 intel_psr_debugfs_register(i915); 1069 intel_wm_debugfs_register(i915); 1070 intel_display_debugfs_params(i915); 1071 } 1072 1073 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1074 { 1075 struct intel_connector *connector = m->private; 1076 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1077 int ret; 1078 1079 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1080 if (ret) 1081 return ret; 1082 1083 if (!connector->base.encoder || 1084 connector->base.status != connector_status_connected) { 1085 ret = -ENODEV; 1086 goto out; 1087 } 1088 1089 seq_printf(m, "%s:%d HDCP version: ", connector->base.name, 1090 connector->base.base.id); 1091 intel_hdcp_info(m, connector, false); 1092 1093 out: 1094 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1095 1096 return ret; 1097 } 1098 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1099 1100 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1101 { 1102 struct intel_connector *connector = m->private; 1103 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1104 struct intel_encoder *encoder = intel_attached_encoder(connector); 1105 int connector_type = connector->base.connector_type; 1106 bool lpsp_capable = false; 1107 1108 if (!encoder) 1109 return -ENODEV; 1110 1111 if (connector->base.status != connector_status_connected) 1112 return -ENODEV; 1113 1114 if (DISPLAY_VER(i915) >= 13) 1115 lpsp_capable = encoder->port <= PORT_B; 1116 else if (DISPLAY_VER(i915) >= 12) 1117 /* 1118 * Actually TGL can drive LPSP on port till DDI_C 1119 * but there is no physical connected DDI_C on TGL sku's, 1120 * even driver is not initilizing DDI_C port for gen12. 1121 */ 1122 lpsp_capable = encoder->port <= PORT_B; 1123 else if (DISPLAY_VER(i915) == 11) 1124 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 1125 connector_type == DRM_MODE_CONNECTOR_eDP); 1126 else if (IS_DISPLAY_VER(i915, 9, 10)) 1127 lpsp_capable = (encoder->port == PORT_A && 1128 (connector_type == DRM_MODE_CONNECTOR_DSI || 1129 connector_type == DRM_MODE_CONNECTOR_eDP || 1130 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1131 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1132 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 1133 1134 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1135 1136 return 0; 1137 } 1138 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1139 1140 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1141 { 1142 struct intel_connector *connector = m->private; 1143 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1144 struct drm_crtc *crtc; 1145 struct intel_dp *intel_dp; 1146 struct drm_modeset_acquire_ctx ctx; 1147 struct intel_crtc_state *crtc_state = NULL; 1148 int ret = 0; 1149 bool try_again = false; 1150 1151 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1152 1153 do { 1154 try_again = false; 1155 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, 1156 &ctx); 1157 if (ret) { 1158 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1159 try_again = true; 1160 continue; 1161 } 1162 break; 1163 } 1164 crtc = connector->base.state->crtc; 1165 if (connector->base.status != connector_status_connected || !crtc) { 1166 ret = -ENODEV; 1167 break; 1168 } 1169 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1170 if (ret == -EDEADLK) { 1171 ret = drm_modeset_backoff(&ctx); 1172 if (!ret) { 1173 try_again = true; 1174 continue; 1175 } 1176 break; 1177 } else if (ret) { 1178 break; 1179 } 1180 intel_dp = intel_attached_dp(connector); 1181 crtc_state = to_intel_crtc_state(crtc->state); 1182 seq_printf(m, "DSC_Enabled: %s\n", 1183 str_yes_no(crtc_state->dsc.compression_enable)); 1184 seq_printf(m, "DSC_Sink_Support: %s\n", 1185 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 1186 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1187 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1188 DP_DSC_RGB)), 1189 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1190 DP_DSC_YCbCr420_Native)), 1191 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1192 DP_DSC_YCbCr444))); 1193 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 1194 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 1195 seq_printf(m, "Force_DSC_Enable: %s\n", 1196 str_yes_no(intel_dp->force_dsc_en)); 1197 if (!intel_dp_is_edp(intel_dp)) 1198 seq_printf(m, "FEC_Sink_Support: %s\n", 1199 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 1200 } while (try_again); 1201 1202 drm_modeset_drop_locks(&ctx); 1203 drm_modeset_acquire_fini(&ctx); 1204 1205 return ret; 1206 } 1207 1208 static ssize_t i915_dsc_fec_support_write(struct file *file, 1209 const char __user *ubuf, 1210 size_t len, loff_t *offp) 1211 { 1212 struct seq_file *m = file->private_data; 1213 struct intel_connector *connector = m->private; 1214 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1215 struct intel_encoder *encoder = intel_attached_encoder(connector); 1216 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1217 bool dsc_enable = false; 1218 int ret; 1219 1220 if (len == 0) 1221 return 0; 1222 1223 drm_dbg(&i915->drm, 1224 "Copied %zu bytes from user to force DSC\n", len); 1225 1226 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1227 if (ret < 0) 1228 return ret; 1229 1230 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1231 (dsc_enable) ? "true" : "false"); 1232 intel_dp->force_dsc_en = dsc_enable; 1233 1234 *offp += len; 1235 return len; 1236 } 1237 1238 static int i915_dsc_fec_support_open(struct inode *inode, 1239 struct file *file) 1240 { 1241 return single_open(file, i915_dsc_fec_support_show, 1242 inode->i_private); 1243 } 1244 1245 static const struct file_operations i915_dsc_fec_support_fops = { 1246 .owner = THIS_MODULE, 1247 .open = i915_dsc_fec_support_open, 1248 .read = seq_read, 1249 .llseek = seq_lseek, 1250 .release = single_release, 1251 .write = i915_dsc_fec_support_write 1252 }; 1253 1254 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1255 { 1256 struct intel_connector *connector = m->private; 1257 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1258 struct intel_encoder *encoder = intel_attached_encoder(connector); 1259 struct drm_crtc *crtc; 1260 struct intel_crtc_state *crtc_state; 1261 int ret; 1262 1263 if (!encoder) 1264 return -ENODEV; 1265 1266 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1267 if (ret) 1268 return ret; 1269 1270 crtc = connector->base.state->crtc; 1271 if (connector->base.status != connector_status_connected || !crtc) { 1272 ret = -ENODEV; 1273 goto out; 1274 } 1275 1276 crtc_state = to_intel_crtc_state(crtc->state); 1277 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1278 1279 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1280 1281 return ret; 1282 } 1283 1284 static ssize_t i915_dsc_bpc_write(struct file *file, 1285 const char __user *ubuf, 1286 size_t len, loff_t *offp) 1287 { 1288 struct seq_file *m = file->private_data; 1289 struct intel_connector *connector = m->private; 1290 struct intel_encoder *encoder = intel_attached_encoder(connector); 1291 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1292 int dsc_bpc = 0; 1293 int ret; 1294 1295 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1296 if (ret < 0) 1297 return ret; 1298 1299 intel_dp->force_dsc_bpc = dsc_bpc; 1300 *offp += len; 1301 1302 return len; 1303 } 1304 1305 static int i915_dsc_bpc_open(struct inode *inode, 1306 struct file *file) 1307 { 1308 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1309 } 1310 1311 static const struct file_operations i915_dsc_bpc_fops = { 1312 .owner = THIS_MODULE, 1313 .open = i915_dsc_bpc_open, 1314 .read = seq_read, 1315 .llseek = seq_lseek, 1316 .release = single_release, 1317 .write = i915_dsc_bpc_write 1318 }; 1319 1320 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1321 { 1322 struct intel_connector *connector = m->private; 1323 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1324 struct intel_encoder *encoder = intel_attached_encoder(connector); 1325 struct drm_crtc *crtc; 1326 struct intel_crtc_state *crtc_state; 1327 int ret; 1328 1329 if (!encoder) 1330 return -ENODEV; 1331 1332 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1333 if (ret) 1334 return ret; 1335 1336 crtc = connector->base.state->crtc; 1337 if (connector->base.status != connector_status_connected || !crtc) { 1338 ret = -ENODEV; 1339 goto out; 1340 } 1341 1342 crtc_state = to_intel_crtc_state(crtc->state); 1343 seq_printf(m, "DSC_Output_Format: %s\n", 1344 intel_output_format_name(crtc_state->output_format)); 1345 1346 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1347 1348 return ret; 1349 } 1350 1351 static ssize_t i915_dsc_output_format_write(struct file *file, 1352 const char __user *ubuf, 1353 size_t len, loff_t *offp) 1354 { 1355 struct seq_file *m = file->private_data; 1356 struct intel_connector *connector = m->private; 1357 struct intel_encoder *encoder = intel_attached_encoder(connector); 1358 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1359 int dsc_output_format = 0; 1360 int ret; 1361 1362 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1363 if (ret < 0) 1364 return ret; 1365 1366 intel_dp->force_dsc_output_format = dsc_output_format; 1367 *offp += len; 1368 1369 return len; 1370 } 1371 1372 static int i915_dsc_output_format_open(struct inode *inode, 1373 struct file *file) 1374 { 1375 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1376 } 1377 1378 static const struct file_operations i915_dsc_output_format_fops = { 1379 .owner = THIS_MODULE, 1380 .open = i915_dsc_output_format_open, 1381 .read = seq_read, 1382 .llseek = seq_lseek, 1383 .release = single_release, 1384 .write = i915_dsc_output_format_write 1385 }; 1386 1387 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1388 { 1389 struct intel_connector *connector = m->private; 1390 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1391 struct intel_encoder *encoder = intel_attached_encoder(connector); 1392 struct drm_crtc *crtc; 1393 struct intel_dp *intel_dp; 1394 int ret; 1395 1396 if (!encoder) 1397 return -ENODEV; 1398 1399 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1400 if (ret) 1401 return ret; 1402 1403 crtc = connector->base.state->crtc; 1404 if (connector->base.status != connector_status_connected || !crtc) { 1405 ret = -ENODEV; 1406 goto out; 1407 } 1408 1409 intel_dp = intel_attached_dp(connector); 1410 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1411 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1412 1413 out: 1414 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1415 1416 return ret; 1417 } 1418 1419 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1420 const char __user *ubuf, 1421 size_t len, loff_t *offp) 1422 { 1423 struct seq_file *m = file->private_data; 1424 struct intel_connector *connector = m->private; 1425 struct intel_encoder *encoder = intel_attached_encoder(connector); 1426 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1427 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1428 bool dsc_fractional_bpp_enable = false; 1429 int ret; 1430 1431 if (len == 0) 1432 return 0; 1433 1434 drm_dbg(&i915->drm, 1435 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1436 1437 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1438 if (ret < 0) 1439 return ret; 1440 1441 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n", 1442 (dsc_fractional_bpp_enable) ? "true" : "false"); 1443 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1444 1445 *offp += len; 1446 1447 return len; 1448 } 1449 1450 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1451 struct file *file) 1452 { 1453 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1454 } 1455 1456 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1457 .owner = THIS_MODULE, 1458 .open = i915_dsc_fractional_bpp_open, 1459 .read = seq_read, 1460 .llseek = seq_lseek, 1461 .release = single_release, 1462 .write = i915_dsc_fractional_bpp_write 1463 }; 1464 1465 /* 1466 * Returns the Current CRTC's bpc. 1467 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1468 */ 1469 static int i915_current_bpc_show(struct seq_file *m, void *data) 1470 { 1471 struct intel_crtc *crtc = m->private; 1472 struct intel_crtc_state *crtc_state; 1473 int ret; 1474 1475 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1476 if (ret) 1477 return ret; 1478 1479 crtc_state = to_intel_crtc_state(crtc->base.state); 1480 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1481 1482 drm_modeset_unlock(&crtc->base.mutex); 1483 1484 return ret; 1485 } 1486 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1487 1488 /* Pipe may differ from crtc index if pipes are fused off */ 1489 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1490 { 1491 struct intel_crtc *crtc = m->private; 1492 1493 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1494 1495 return 0; 1496 } 1497 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1498 1499 /** 1500 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1501 * @connector: pointer to a registered intel_connector 1502 * 1503 * Cleanup will be done by drm_connector_unregister() through a call to 1504 * drm_debugfs_connector_remove(). 1505 */ 1506 void intel_connector_debugfs_add(struct intel_connector *connector) 1507 { 1508 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1509 struct dentry *root = connector->base.debugfs_entry; 1510 int connector_type = connector->base.connector_type; 1511 1512 /* The connector must have been registered beforehands. */ 1513 if (!root) 1514 return; 1515 1516 intel_drrs_connector_debugfs_add(connector); 1517 intel_pps_connector_debugfs_add(connector); 1518 intel_psr_connector_debugfs_add(connector); 1519 intel_alpm_lobf_debugfs_add(connector); 1520 1521 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1522 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1523 connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1524 debugfs_create_file("i915_hdcp_sink_capability", 0444, root, 1525 connector, &i915_hdcp_sink_capability_fops); 1526 } 1527 1528 if (DISPLAY_VER(i915) >= 11 && 1529 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) || 1530 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1531 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1532 connector, &i915_dsc_fec_support_fops); 1533 1534 debugfs_create_file("i915_dsc_bpc", 0644, root, 1535 connector, &i915_dsc_bpc_fops); 1536 1537 debugfs_create_file("i915_dsc_output_format", 0644, root, 1538 connector, &i915_dsc_output_format_fops); 1539 1540 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1541 connector, &i915_dsc_fractional_bpp_fops); 1542 } 1543 1544 if (DISPLAY_VER(i915) >= 11 && 1545 (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1546 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1547 debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root, 1548 &connector->force_bigjoiner_enable); 1549 } 1550 1551 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1552 connector_type == DRM_MODE_CONNECTOR_eDP || 1553 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1554 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1555 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1556 debugfs_create_file("i915_lpsp_capability", 0444, root, 1557 connector, &i915_lpsp_capability_fops); 1558 } 1559 1560 /** 1561 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1562 * @crtc: pointer to a drm_crtc 1563 * 1564 * Failure to add debugfs entries should generally be ignored. 1565 */ 1566 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1567 { 1568 struct dentry *root = crtc->base.debugfs_entry; 1569 1570 if (!root) 1571 return; 1572 1573 crtc_updates_add(crtc); 1574 intel_drrs_crtc_debugfs_add(crtc); 1575 intel_fbc_crtc_debugfs_add(crtc); 1576 hsw_ips_crtc_debugfs_add(crtc); 1577 1578 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1579 &i915_current_bpc_fops); 1580 debugfs_create_file("i915_pipe", 0444, root, crtc, 1581 &intel_crtc_pipe_fops); 1582 } 1583