1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 28 #include "ObjectID.h" 29 #include "atomfirmware.h" 30 31 #include "include/bios_parser_types.h" 32 33 #include "command_table_helper2.h" 34 35 bool dal_bios_parser_init_cmd_tbl_helper2( 36 const struct command_table_helper **h, 37 enum dce_version dce) 38 { 39 switch (dce) { 40 #if defined(CONFIG_DRM_AMD_DC_SI) 41 case DCE_VERSION_6_0: 42 case DCE_VERSION_6_1: 43 case DCE_VERSION_6_4: 44 *h = dal_cmd_tbl_helper_dce60_get_table(); 45 return true; 46 #endif 47 48 case DCE_VERSION_8_0: 49 case DCE_VERSION_8_1: 50 case DCE_VERSION_8_3: 51 *h = dal_cmd_tbl_helper_dce80_get_table(); 52 return true; 53 54 case DCE_VERSION_10_0: 55 *h = dal_cmd_tbl_helper_dce110_get_table(); 56 return true; 57 58 case DCE_VERSION_11_0: 59 *h = dal_cmd_tbl_helper_dce110_get_table(); 60 return true; 61 62 case DCE_VERSION_11_2: 63 case DCE_VERSION_11_22: 64 case DCE_VERSION_12_0: 65 case DCE_VERSION_12_1: 66 *h = dal_cmd_tbl_helper_dce112_get_table2(); 67 return true; 68 case DCN_VERSION_1_0: 69 case DCN_VERSION_1_01: 70 case DCN_VERSION_2_0: 71 case DCN_VERSION_2_1: 72 case DCN_VERSION_2_01: 73 case DCN_VERSION_3_0: 74 case DCN_VERSION_3_01: 75 case DCN_VERSION_3_02: 76 case DCN_VERSION_3_03: 77 case DCN_VERSION_3_1: 78 case DCN_VERSION_3_14: 79 case DCN_VERSION_3_15: 80 case DCN_VERSION_3_16: 81 case DCN_VERSION_3_2: 82 case DCN_VERSION_3_21: 83 case DCN_VERSION_3_5: 84 case DCN_VERSION_3_51: 85 case DCN_VERSION_3_6: 86 case DCN_VERSION_4_01: 87 *h = dal_cmd_tbl_helper_dce112_get_table2(); 88 return true; 89 90 default: 91 /* Unsupported DCE */ 92 BREAK_TO_DEBUGGER(); 93 return false; 94 } 95 } 96 97 /* real implementations */ 98 99 bool dal_cmd_table_helper_controller_id_to_atom2( 100 enum controller_id id, 101 uint8_t *atom_id) 102 { 103 if (atom_id == NULL) { 104 BREAK_TO_DEBUGGER(); 105 return false; 106 } 107 108 switch (id) { 109 case CONTROLLER_ID_D0: 110 *atom_id = ATOM_CRTC1; 111 return true; 112 case CONTROLLER_ID_D1: 113 *atom_id = ATOM_CRTC2; 114 return true; 115 case CONTROLLER_ID_D2: 116 *atom_id = ATOM_CRTC3; 117 return true; 118 case CONTROLLER_ID_D3: 119 *atom_id = ATOM_CRTC4; 120 return true; 121 case CONTROLLER_ID_D4: 122 *atom_id = ATOM_CRTC5; 123 return true; 124 case CONTROLLER_ID_D5: 125 *atom_id = ATOM_CRTC6; 126 return true; 127 /* TODO :case CONTROLLER_ID_UNDERLAY0: 128 *atom_id = ATOM_UNDERLAY_PIPE0; 129 return true; 130 */ 131 case CONTROLLER_ID_UNDEFINED: 132 *atom_id = ATOM_CRTC_INVALID; 133 return true; 134 default: 135 /* Wrong controller id */ 136 BREAK_TO_DEBUGGER(); 137 return false; 138 } 139 } 140 141 /** 142 * dal_cmd_table_helper_transmitter_bp_to_atom2 - Translate the Transmitter to the 143 * corresponding ATOM BIOS value 144 * @t: transmitter 145 * returns: digitalTransmitter 146 * // =00: Digital Transmitter1 ( UNIPHY linkAB ) 147 * // =01: Digital Transmitter2 ( UNIPHY linkCD ) 148 * // =02: Digital Transmitter3 ( UNIPHY linkEF ) 149 */ 150 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2( 151 enum transmitter t) 152 { 153 switch (t) { 154 case TRANSMITTER_UNIPHY_A: 155 case TRANSMITTER_UNIPHY_B: 156 case TRANSMITTER_TRAVIS_LCD: 157 return 0; 158 case TRANSMITTER_UNIPHY_C: 159 case TRANSMITTER_UNIPHY_D: 160 return 1; 161 case TRANSMITTER_UNIPHY_E: 162 case TRANSMITTER_UNIPHY_F: 163 return 2; 164 default: 165 /* Invalid Transmitter Type! */ 166 BREAK_TO_DEBUGGER(); 167 return 0; 168 } 169 } 170 171 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2( 172 enum signal_type s, 173 bool enable_dp_audio) 174 { 175 switch (s) { 176 case SIGNAL_TYPE_DVI_SINGLE_LINK: 177 case SIGNAL_TYPE_DVI_DUAL_LINK: 178 return ATOM_ENCODER_MODE_DVI; 179 case SIGNAL_TYPE_HDMI_TYPE_A: 180 return ATOM_ENCODER_MODE_HDMI; 181 case SIGNAL_TYPE_LVDS: 182 return ATOM_ENCODER_MODE_LVDS; 183 case SIGNAL_TYPE_EDP: 184 case SIGNAL_TYPE_DISPLAY_PORT_MST: 185 case SIGNAL_TYPE_DISPLAY_PORT: 186 case SIGNAL_TYPE_VIRTUAL: 187 if (enable_dp_audio) 188 return ATOM_ENCODER_MODE_DP_AUDIO; 189 else 190 return ATOM_ENCODER_MODE_DP; 191 case SIGNAL_TYPE_RGB: 192 return ATOM_ENCODER_MODE_CRT; 193 default: 194 return ATOM_ENCODER_MODE_CRT; 195 } 196 } 197 198 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2( 199 enum clock_source_id id, 200 uint32_t *ref_clk_src_id) 201 { 202 if (ref_clk_src_id == NULL) { 203 BREAK_TO_DEBUGGER(); 204 return false; 205 } 206 207 switch (id) { 208 case CLOCK_SOURCE_ID_PLL1: 209 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL; 210 return true; 211 case CLOCK_SOURCE_ID_PLL2: 212 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL; 213 return true; 214 /*TODO:case CLOCK_SOURCE_ID_DCPLL: 215 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL; 216 return true; 217 */ 218 case CLOCK_SOURCE_ID_EXTERNAL: 219 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK; 220 return true; 221 case CLOCK_SOURCE_ID_UNDEFINED: 222 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID; 223 return true; 224 default: 225 /* Unsupported clock source id */ 226 BREAK_TO_DEBUGGER(); 227 return false; 228 } 229 } 230 231 uint8_t dal_cmd_table_helper_encoder_id_to_atom2( 232 enum encoder_id id) 233 { 234 switch (id) { 235 case ENCODER_ID_INTERNAL_LVDS: 236 return ENCODER_OBJECT_ID_INTERNAL_LVDS; 237 case ENCODER_ID_INTERNAL_TMDS1: 238 return ENCODER_OBJECT_ID_INTERNAL_TMDS1; 239 case ENCODER_ID_INTERNAL_TMDS2: 240 return ENCODER_OBJECT_ID_INTERNAL_TMDS2; 241 case ENCODER_ID_INTERNAL_DAC1: 242 return ENCODER_OBJECT_ID_INTERNAL_DAC1; 243 case ENCODER_ID_INTERNAL_DAC2: 244 return ENCODER_OBJECT_ID_INTERNAL_DAC2; 245 case ENCODER_ID_INTERNAL_LVTM1: 246 return ENCODER_OBJECT_ID_INTERNAL_LVTM1; 247 case ENCODER_ID_INTERNAL_HDMI: 248 return ENCODER_OBJECT_ID_HDMI_INTERNAL; 249 case ENCODER_ID_EXTERNAL_TRAVIS: 250 return ENCODER_OBJECT_ID_TRAVIS; 251 case ENCODER_ID_EXTERNAL_NUTMEG: 252 return ENCODER_OBJECT_ID_NUTMEG; 253 case ENCODER_ID_INTERNAL_KLDSCP_TMDS1: 254 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1; 255 case ENCODER_ID_INTERNAL_KLDSCP_DAC1: 256 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1; 257 case ENCODER_ID_INTERNAL_KLDSCP_DAC2: 258 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2; 259 case ENCODER_ID_EXTERNAL_MVPU_FPGA: 260 return ENCODER_OBJECT_ID_MVPU_FPGA; 261 case ENCODER_ID_INTERNAL_DDI: 262 return ENCODER_OBJECT_ID_INTERNAL_DDI; 263 case ENCODER_ID_INTERNAL_UNIPHY: 264 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY; 265 case ENCODER_ID_INTERNAL_KLDSCP_LVTMA: 266 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA; 267 case ENCODER_ID_INTERNAL_UNIPHY1: 268 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1; 269 case ENCODER_ID_INTERNAL_UNIPHY2: 270 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2; 271 case ENCODER_ID_INTERNAL_UNIPHY3: 272 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3; 273 case ENCODER_ID_INTERNAL_WIRELESS: 274 return ENCODER_OBJECT_ID_INTERNAL_VCE; 275 case ENCODER_ID_INTERNAL_VIRTUAL: 276 return ENCODER_OBJECT_ID_NONE; 277 case ENCODER_ID_UNKNOWN: 278 return ENCODER_OBJECT_ID_NONE; 279 default: 280 /* Invalid encoder id */ 281 BREAK_TO_DEBUGGER(); 282 return ENCODER_OBJECT_ID_NONE; 283 } 284 } 285