1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright 2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27 #include "dm_services_types.h" 28 29 #include "amdgpu.h" 30 #include "amdgpu_dm.h" 31 #include "amdgpu_dm_wb.h" 32 #include "amdgpu_display.h" 33 #include "dc.h" 34 35 #include <drm/drm_atomic_state_helper.h> 36 #include <drm/drm_modeset_helper_vtables.h> 37 38 static const u32 amdgpu_dm_wb_formats[] = { 39 DRM_FORMAT_XRGB2101010, 40 }; 41 42 static int amdgpu_dm_wb_encoder_atomic_check(struct drm_encoder *encoder, 43 struct drm_crtc_state *crtc_state, 44 struct drm_connector_state *conn_state) 45 { 46 struct drm_framebuffer *fb; 47 const struct drm_display_mode *mode = &crtc_state->mode; 48 bool found = false; 49 uint8_t i; 50 51 if (!conn_state->writeback_job || !conn_state->writeback_job->fb) 52 return 0; 53 54 fb = conn_state->writeback_job->fb; 55 if (fb->width != mode->hdisplay || fb->height != mode->vdisplay) { 56 DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n", 57 fb->width, fb->height); 58 return -EINVAL; 59 } 60 61 for (i = 0; i < sizeof(amdgpu_dm_wb_formats) / sizeof(u32); i++) { 62 if (fb->format->format == amdgpu_dm_wb_formats[i]) 63 found = true; 64 } 65 66 if (!found) { 67 DRM_DEBUG_KMS("Invalid pixel format %p4cc\n", 68 &fb->format->format); 69 return -EINVAL; 70 } 71 72 return 0; 73 } 74 75 76 static int amdgpu_dm_wb_connector_get_modes(struct drm_connector *connector) 77 { 78 struct drm_device *dev = connector->dev; 79 80 return drm_add_modes_noedid(connector, dev->mode_config.max_width, 81 dev->mode_config.max_height); 82 } 83 84 static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector, 85 struct drm_writeback_job *job) 86 { 87 struct amdgpu_framebuffer *afb; 88 struct drm_gem_object *obj; 89 struct amdgpu_device *adev; 90 struct amdgpu_bo *rbo; 91 uint32_t domain; 92 int r; 93 94 if (!job->fb) { 95 DRM_DEBUG_KMS("No FB bound\n"); 96 return 0; 97 } 98 99 afb = to_amdgpu_framebuffer(job->fb); 100 obj = job->fb->obj[0]; 101 rbo = gem_to_amdgpu_bo(obj); 102 adev = amdgpu_ttm_adev(rbo->tbo.bdev); 103 104 r = amdgpu_bo_reserve(rbo, true); 105 if (r) { 106 dev_err(adev->dev, "fail to reserve bo (%d)\n", r); 107 return r; 108 } 109 110 r = dma_resv_reserve_fences(rbo->tbo.base.resv, 1); 111 if (r) { 112 dev_err(adev->dev, "reserving fence slot failed (%d)\n", r); 113 goto error_unlock; 114 } 115 116 domain = amdgpu_display_supported_domains(adev, rbo->flags); 117 118 r = amdgpu_bo_pin(rbo, domain); 119 if (unlikely(r != 0)) { 120 if (r != -ERESTARTSYS) 121 DRM_ERROR("Failed to pin framebuffer with error %d\n", r); 122 goto error_unlock; 123 } 124 125 r = amdgpu_ttm_alloc_gart(&rbo->tbo); 126 if (unlikely(r != 0)) { 127 DRM_ERROR("%p bind failed\n", rbo); 128 goto error_unpin; 129 } 130 131 amdgpu_bo_unreserve(rbo); 132 133 afb->address = amdgpu_bo_gpu_offset(rbo); 134 135 amdgpu_bo_ref(rbo); 136 137 return 0; 138 139 error_unpin: 140 amdgpu_bo_unpin(rbo); 141 142 error_unlock: 143 amdgpu_bo_unreserve(rbo); 144 return r; 145 } 146 147 static void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connector *connector, 148 struct drm_writeback_job *job) 149 { 150 struct amdgpu_bo *rbo; 151 int r; 152 153 if (!job->fb) 154 return; 155 156 rbo = gem_to_amdgpu_bo(job->fb->obj[0]); 157 r = amdgpu_bo_reserve(rbo, false); 158 if (unlikely(r)) { 159 DRM_ERROR("failed to reserve rbo before unpin\n"); 160 return; 161 } 162 163 amdgpu_bo_unpin(rbo); 164 amdgpu_bo_unreserve(rbo); 165 amdgpu_bo_unref(&rbo); 166 } 167 168 static const struct drm_encoder_helper_funcs amdgpu_dm_wb_encoder_helper_funcs = { 169 .atomic_check = amdgpu_dm_wb_encoder_atomic_check, 170 }; 171 172 static const struct drm_connector_funcs amdgpu_dm_wb_connector_funcs = { 173 .fill_modes = drm_helper_probe_single_connector_modes, 174 .destroy = drm_connector_cleanup, 175 .reset = amdgpu_dm_connector_funcs_reset, 176 .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state, 177 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 178 }; 179 180 static const struct drm_connector_helper_funcs amdgpu_dm_wb_conn_helper_funcs = { 181 .get_modes = amdgpu_dm_wb_connector_get_modes, 182 .prepare_writeback_job = amdgpu_dm_wb_prepare_job, 183 .cleanup_writeback_job = amdgpu_dm_wb_cleanup_job, 184 }; 185 186 int amdgpu_dm_wb_connector_init(struct amdgpu_display_manager *dm, 187 struct amdgpu_dm_wb_connector *wbcon, 188 uint32_t link_index) 189 { 190 struct dc *dc = dm->dc; 191 struct dc_link *link = dc_get_link_at_index(dc, link_index); 192 int res = 0; 193 194 wbcon->link = link; 195 196 drm_connector_helper_add(&wbcon->base.base, &amdgpu_dm_wb_conn_helper_funcs); 197 198 res = drm_writeback_connector_init(&dm->adev->ddev, &wbcon->base, 199 &amdgpu_dm_wb_connector_funcs, 200 &amdgpu_dm_wb_encoder_helper_funcs, 201 amdgpu_dm_wb_formats, 202 ARRAY_SIZE(amdgpu_dm_wb_formats), 203 amdgpu_dm_get_encoder_crtc_mask(dm->adev)); 204 205 if (res) 206 return res; 207 /* 208 * Some of the properties below require access to state, like bpc. 209 * Allocate some default initial connector state with our reset helper. 210 */ 211 if (wbcon->base.base.funcs->reset) 212 wbcon->base.base.funcs->reset(&wbcon->base.base); 213 214 return 0; 215 } 216