1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "amdgpu_dm_hdcp.h"
27 #include "amdgpu.h"
28 #include "amdgpu_dm.h"
29 #include "dm_helpers.h"
30 #include <drm/drm_hdcp.h>
31 #include "hdcp_psp.h"
32 
33 /*
34  * If the SRM version being loaded is less than or equal to the
35  * currently loaded SRM, psp will return 0xFFFF as the version
36  */
37 #define PSP_SRM_VERSION_MAX 0xFFFF
38 
39 static bool
40 lp_write_i2c(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
41 {
42 
43 	struct dc_link *link = handle;
44 	struct i2c_payload i2c_payloads[] = {{true, address, size, (void *)data} };
45 	struct i2c_command cmd = {i2c_payloads, 1, I2C_COMMAND_ENGINE_HW, link->dc->caps.i2c_speed_in_khz};
46 
47 	return dm_helpers_submit_i2c(link->ctx, link, &cmd);
48 }
49 
50 static bool
51 lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *data, uint32_t size)
52 {
53 	struct dc_link *link = handle;
54 
55 	struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset}, {false, address, size, data} };
56 	struct i2c_command cmd = {i2c_payloads, 2, I2C_COMMAND_ENGINE_HW, link->dc->caps.i2c_speed_in_khz};
57 
58 	return dm_helpers_submit_i2c(link->ctx, link, &cmd);
59 }
60 
61 static bool
62 lp_write_dpcd(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
63 {
64 	struct dc_link *link = handle;
65 
66 	return dm_helpers_dp_write_dpcd(link->ctx, link, address, data, size);
67 }
68 
69 static bool
70 lp_read_dpcd(void *handle, uint32_t address, uint8_t *data, uint32_t size)
71 {
72 	struct dc_link *link = handle;
73 
74 	return dm_helpers_dp_read_dpcd(link->ctx, link, address, data, size);
75 }
76 
77 static uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint32_t *srm_size)
78 {
79 
80 	struct ta_hdcp_shared_memory *hdcp_cmd;
81 
82 	if (!psp->hdcp_context.hdcp_initialized) {
83 		DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
84 		return NULL;
85 	}
86 
87 	hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.hdcp_shared_buf;
88 	memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
89 
90 	hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_GET_SRM;
91 	psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
92 
93 	if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS)
94 		return NULL;
95 
96 	*srm_version = hdcp_cmd->out_msg.hdcp_get_srm.srm_version;
97 	*srm_size = hdcp_cmd->out_msg.hdcp_get_srm.srm_buf_size;
98 
99 
100 	return hdcp_cmd->out_msg.hdcp_get_srm.srm_buf;
101 }
102 
103 static int psp_set_srm(struct psp_context *psp, uint8_t *srm, uint32_t srm_size, uint32_t *srm_version)
104 {
105 
106 	struct ta_hdcp_shared_memory *hdcp_cmd;
107 
108 	if (!psp->hdcp_context.hdcp_initialized) {
109 		DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
110 		return -EINVAL;
111 	}
112 
113 	hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.hdcp_shared_buf;
114 	memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
115 
116 	memcpy(hdcp_cmd->in_msg.hdcp_set_srm.srm_buf, srm, srm_size);
117 	hdcp_cmd->in_msg.hdcp_set_srm.srm_buf_size = srm_size;
118 	hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_SET_SRM;
119 
120 	psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
121 
122 	if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS || hdcp_cmd->out_msg.hdcp_set_srm.valid_signature != 1 ||
123 	    hdcp_cmd->out_msg.hdcp_set_srm.srm_version == PSP_SRM_VERSION_MAX)
124 		return -EINVAL;
125 
126 	*srm_version = hdcp_cmd->out_msg.hdcp_set_srm.srm_version;
127 	return 0;
128 }
129 
130 static void process_output(struct hdcp_workqueue *hdcp_work)
131 {
132 	struct mod_hdcp_output output = hdcp_work->output;
133 
134 	if (output.callback_stop)
135 		cancel_delayed_work(&hdcp_work->callback_dwork);
136 
137 	if (output.callback_needed)
138 		schedule_delayed_work(&hdcp_work->callback_dwork,
139 				      msecs_to_jiffies(output.callback_delay));
140 
141 	if (output.watchdog_timer_stop)
142 		cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
143 
144 	if (output.watchdog_timer_needed)
145 		schedule_delayed_work(&hdcp_work->watchdog_timer_dwork,
146 				      msecs_to_jiffies(output.watchdog_timer_delay));
147 
148 	schedule_delayed_work(&hdcp_work->property_validate_dwork, msecs_to_jiffies(0));
149 }
150 
151 static void link_lock(struct hdcp_workqueue *work, bool lock)
152 {
153 
154 	int i = 0;
155 
156 	for (i = 0; i < work->max_link; i++) {
157 		if (lock)
158 			mutex_lock(&work[i].mutex);
159 		else
160 			mutex_unlock(&work[i].mutex);
161 	}
162 }
163 void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
164 			 unsigned int link_index,
165 			 struct amdgpu_dm_connector *aconnector,
166 			 uint8_t content_type,
167 			 bool enable_encryption)
168 {
169 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
170 	struct mod_hdcp_display *display = &hdcp_work[link_index].display;
171 	struct mod_hdcp_link *link = &hdcp_work[link_index].link;
172 	struct mod_hdcp_display_query query;
173 
174 	mutex_lock(&hdcp_w->mutex);
175 	hdcp_w->aconnector = aconnector;
176 
177 	query.display = NULL;
178 	mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
179 
180 	if (query.display != NULL) {
181 		memcpy(display, query.display, sizeof(struct mod_hdcp_display));
182 		mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
183 
184 		hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
185 
186 		if (enable_encryption) {
187 			/* Explicitly set the saved SRM as sysfs call will be after we already enabled hdcp
188 			 * (s3 resume case)
189 			 */
190 			if (hdcp_work->srm_size > 0)
191 				psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm, hdcp_work->srm_size,
192 					    &hdcp_work->srm_version);
193 
194 			display->adjust.disable = 0;
195 			if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
196 				hdcp_w->link.adjust.hdcp1.disable = 0;
197 				hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
198 			} else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
199 				hdcp_w->link.adjust.hdcp1.disable = 1;
200 				hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
201 			}
202 
203 			schedule_delayed_work(&hdcp_w->property_validate_dwork,
204 					      msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
205 		} else {
206 			display->adjust.disable = 1;
207 			hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
208 			cancel_delayed_work(&hdcp_w->property_validate_dwork);
209 		}
210 
211 		display->state = MOD_HDCP_DISPLAY_ACTIVE;
212 	}
213 
214 	mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
215 
216 	process_output(hdcp_w);
217 	mutex_unlock(&hdcp_w->mutex);
218 }
219 
220 static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
221 			 unsigned int link_index,
222 			 struct amdgpu_dm_connector *aconnector)
223 {
224 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
225 
226 	mutex_lock(&hdcp_w->mutex);
227 	hdcp_w->aconnector = aconnector;
228 
229 	mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
230 
231 	process_output(hdcp_w);
232 	mutex_unlock(&hdcp_w->mutex);
233 }
234 void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
235 {
236 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
237 
238 	mutex_lock(&hdcp_w->mutex);
239 
240 	mod_hdcp_reset_connection(&hdcp_w->hdcp,  &hdcp_w->output);
241 
242 	cancel_delayed_work(&hdcp_w->property_validate_dwork);
243 	hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
244 
245 	process_output(hdcp_w);
246 
247 	mutex_unlock(&hdcp_w->mutex);
248 }
249 
250 void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
251 {
252 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
253 
254 	schedule_work(&hdcp_w->cpirq_work);
255 }
256 
257 
258 
259 
260 static void event_callback(struct work_struct *work)
261 {
262 	struct hdcp_workqueue *hdcp_work;
263 
264 	hdcp_work = container_of(to_delayed_work(work), struct hdcp_workqueue,
265 				      callback_dwork);
266 
267 	mutex_lock(&hdcp_work->mutex);
268 
269 	cancel_delayed_work(&hdcp_work->callback_dwork);
270 
271 	mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CALLBACK,
272 			       &hdcp_work->output);
273 
274 	process_output(hdcp_work);
275 
276 	mutex_unlock(&hdcp_work->mutex);
277 
278 
279 }
280 static void event_property_update(struct work_struct *work)
281 {
282 
283 	struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue, property_update_work);
284 	struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
285 	struct drm_device *dev = hdcp_work->aconnector->base.dev;
286 	long ret;
287 
288 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
289 	mutex_lock(&hdcp_work->mutex);
290 
291 
292 	if (aconnector->base.state->commit) {
293 		ret = wait_for_completion_interruptible_timeout(&aconnector->base.state->commit->hw_done, 10 * HZ);
294 
295 		if (ret == 0) {
296 			DRM_ERROR("HDCP state unknown! Setting it to DESIRED");
297 			hdcp_work->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
298 		}
299 	}
300 
301 	if (hdcp_work->encryption_status != MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
302 		if (aconnector->base.state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE0 &&
303 		    hdcp_work->encryption_status <= MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON)
304 			drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_ENABLED);
305 		else if (aconnector->base.state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE1 &&
306 			 hdcp_work->encryption_status == MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON)
307 			drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_ENABLED);
308 	} else {
309 		drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_DESIRED);
310 	}
311 
312 
313 	mutex_unlock(&hdcp_work->mutex);
314 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
315 }
316 
317 static void event_property_validate(struct work_struct *work)
318 {
319 	struct hdcp_workqueue *hdcp_work =
320 		container_of(to_delayed_work(work), struct hdcp_workqueue, property_validate_dwork);
321 	struct mod_hdcp_display_query query;
322 	struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
323 
324 	if (!aconnector)
325 		return;
326 
327 	mutex_lock(&hdcp_work->mutex);
328 
329 	query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
330 	mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index, &query);
331 
332 	if (query.encryption_status != hdcp_work->encryption_status) {
333 		hdcp_work->encryption_status = query.encryption_status;
334 		schedule_work(&hdcp_work->property_update_work);
335 	}
336 
337 	mutex_unlock(&hdcp_work->mutex);
338 }
339 
340 static void event_watchdog_timer(struct work_struct *work)
341 {
342 	struct hdcp_workqueue *hdcp_work;
343 
344 	hdcp_work = container_of(to_delayed_work(work),
345 				      struct hdcp_workqueue,
346 				      watchdog_timer_dwork);
347 
348 	mutex_lock(&hdcp_work->mutex);
349 
350 	cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
351 
352 	mod_hdcp_process_event(&hdcp_work->hdcp,
353 			       MOD_HDCP_EVENT_WATCHDOG_TIMEOUT,
354 			       &hdcp_work->output);
355 
356 	process_output(hdcp_work);
357 
358 	mutex_unlock(&hdcp_work->mutex);
359 
360 }
361 
362 static void event_cpirq(struct work_struct *work)
363 {
364 	struct hdcp_workqueue *hdcp_work;
365 
366 	hdcp_work = container_of(work, struct hdcp_workqueue, cpirq_work);
367 
368 	mutex_lock(&hdcp_work->mutex);
369 
370 	mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CPIRQ, &hdcp_work->output);
371 
372 	process_output(hdcp_work);
373 
374 	mutex_unlock(&hdcp_work->mutex);
375 
376 }
377 
378 
379 void hdcp_destroy(struct hdcp_workqueue *hdcp_work)
380 {
381 	int i = 0;
382 
383 	for (i = 0; i < hdcp_work->max_link; i++) {
384 		cancel_delayed_work_sync(&hdcp_work[i].callback_dwork);
385 		cancel_delayed_work_sync(&hdcp_work[i].watchdog_timer_dwork);
386 	}
387 
388 	kfree(hdcp_work->srm);
389 	kfree(hdcp_work->srm_temp);
390 	kfree(hdcp_work);
391 }
392 
393 static void update_config(void *handle, struct cp_psp_stream_config *config)
394 {
395 	struct hdcp_workqueue *hdcp_work = handle;
396 	struct amdgpu_dm_connector *aconnector = config->dm_stream_ctx;
397 	int link_index = aconnector->dc_link->link_index;
398 	struct mod_hdcp_display *display = &hdcp_work[link_index].display;
399 	struct mod_hdcp_link *link = &hdcp_work[link_index].link;
400 
401 	memset(display, 0, sizeof(*display));
402 	memset(link, 0, sizeof(*link));
403 
404 	display->index = aconnector->base.index;
405 
406 	if (config->dpms_off) {
407 		hdcp_remove_display(hdcp_work, link_index, aconnector);
408 		return;
409 	}
410 	display->state = MOD_HDCP_DISPLAY_ACTIVE;
411 
412 	if (aconnector->dc_sink != NULL)
413 		link->mode = mod_hdcp_signal_type_to_operation_mode(aconnector->dc_sink->sink_signal);
414 
415 	display->controller = CONTROLLER_ID_D0 + config->otg_inst;
416 	display->dig_fe = config->stream_enc_inst;
417 	link->dig_be = config->link_enc_inst;
418 	link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1;
419 	link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
420 	link->dp.mst_supported = config->mst_supported;
421 	display->adjust.disable = 1;
422 	link->adjust.auth_delay = 3;
423 	link->adjust.hdcp1.disable = 0;
424 
425 	hdcp_update_display(hdcp_work, link_index, aconnector, DRM_MODE_HDCP_CONTENT_TYPE0, false);
426 }
427 
428 
429 /* NOTE: From the usermodes prospective you only need to call write *ONCE*, the kernel
430  *      will automatically call once or twice depending on the size
431  *
432  * call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no matter what the size is
433  *
434  * The kernel can only send PAGE_SIZE at once and since MAX_SRM_FILE(5120) > PAGE_SIZE(4096),
435  * srm_data_write can be called multiple times.
436  *
437  * sysfs interface doesn't tell us the size we will get so we are sending partial SRMs to psp and on
438  * the last call we will send the full SRM. PSP will fail on every call before the last.
439  *
440  * This means we don't know if the SRM is good until the last call. And because of this limitation we
441  * cannot throw errors early as it will stop the kernel from writing to sysfs
442  *
443  * Example 1:
444  * 	Good SRM size = 5096
445  * 	first call to write 4096 -> PSP fails
446  * 	Second call to write 1000 -> PSP Pass -> SRM is set
447  *
448  * Example 2:
449  * 	Bad SRM size = 4096
450  * 	first call to write 4096 -> PSP fails (This is the same as above, but we don't know if this
451  * 	is the last call)
452  *
453  * Solution?:
454  * 	1: Parse the SRM? -> It is signed so we don't know the EOF
455  * 	2: We can have another sysfs that passes the size before calling set. -> simpler solution
456  * 	below
457  *
458  * Easy Solution:
459  * Always call get after Set to verify if set was successful.
460  * +----------------------+
461  * |   Why it works:      |
462  * +----------------------+
463  * PSP will only update its srm if its older than the one we are trying to load.
464  * Always do set first than get.
465  * 	-if we try to "1. SET" a older version PSP will reject it and we can "2. GET" the newer
466  * 	version and save it
467  *
468  * 	-if we try to "1. SET" a newer version PSP will accept it and we can "2. GET" the
469  * 	same(newer) version back and save it
470  *
471  * 	-if we try to "1. SET" a newer version and PSP rejects it. That means the format is
472  * 	incorrect/corrupted and we should correct our SRM by getting it from PSP
473  */
474 static ssize_t srm_data_write(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer,
475 			      loff_t pos, size_t count)
476 {
477 	struct hdcp_workqueue *work;
478 	uint32_t srm_version = 0;
479 
480 	work = container_of(bin_attr, struct hdcp_workqueue, attr);
481 	link_lock(work, true);
482 
483 	memcpy(work->srm_temp + pos, buffer, count);
484 
485 	if (!psp_set_srm(work->hdcp.config.psp.handle, work->srm_temp, pos + count, &srm_version)) {
486 		DRM_DEBUG_DRIVER("HDCP SRM SET version 0x%X", srm_version);
487 		memcpy(work->srm, work->srm_temp, pos + count);
488 		work->srm_size = pos + count;
489 		work->srm_version = srm_version;
490 	}
491 
492 
493 	link_lock(work, false);
494 
495 	return count;
496 }
497 
498 static ssize_t srm_data_read(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer,
499 			     loff_t pos, size_t count)
500 {
501 	struct hdcp_workqueue *work;
502 	uint8_t *srm = NULL;
503 	uint32_t srm_version;
504 	uint32_t srm_size;
505 	size_t ret = count;
506 
507 	work = container_of(bin_attr, struct hdcp_workqueue, attr);
508 
509 	link_lock(work, true);
510 
511 	srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size);
512 
513 	if (!srm)
514 		return -EINVAL;
515 
516 	if (pos >= srm_size)
517 		ret = 0;
518 
519 	if (srm_size - pos < count) {
520 		memcpy(buffer, srm + pos, srm_size - pos);
521 		ret = srm_size - pos;
522 		goto ret;
523 	}
524 
525 	memcpy(buffer, srm + pos, count);
526 
527 ret:
528 	link_lock(work, false);
529 	return ret;
530 }
531 
532 /* From the hdcp spec (5.Renewability) SRM needs to be stored in a non-volatile memory.
533  *
534  * For example,
535  * 	if Application "A" sets the SRM (ver 2) and we reboot/suspend and later when Application "B"
536  * 	needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM should be persistent
537  * 	across boot/reboots/suspend/resume/shutdown
538  *
539  * Currently when the system goes down (suspend/shutdown) the SRM is cleared from PSP. For HDCP we need
540  * to make the SRM persistent.
541  *
542  * -PSP owns the checking of SRM but doesn't have the ability to store it in a non-volatile memory.
543  * -The kernel cannot write to the file systems.
544  * -So we need usermode to do this for us, which is why an interface for usermode is needed
545  *
546  *
547  *
548  * Usermode can read/write to/from PSP using the sysfs interface
549  * For example:
550  * 	to save SRM from PSP to storage : cat /sys/class/drm/card0/device/hdcp_srm > srmfile
551  * 	to load from storage to PSP: cat srmfile > /sys/class/drm/card0/device/hdcp_srm
552  */
553 static const struct bin_attribute data_attr = {
554 	.attr = {.name = "hdcp_srm", .mode = 0664},
555 	.size = PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, /* Limit SRM size */
556 	.write = srm_data_write,
557 	.read = srm_data_read,
558 };
559 
560 
561 struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct cp_psp *cp_psp, struct dc *dc)
562 {
563 
564 	int max_caps = dc->caps.max_links;
565 	struct hdcp_workqueue *hdcp_work;
566 	int i = 0;
567 
568 	hdcp_work = kcalloc(max_caps, sizeof(*hdcp_work), GFP_KERNEL);
569 	if (hdcp_work == NULL)
570 		return NULL;
571 
572 	hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm), GFP_KERNEL);
573 
574 	if (hdcp_work->srm == NULL)
575 		goto fail_alloc_context;
576 
577 	hdcp_work->srm_temp = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm_temp), GFP_KERNEL);
578 
579 	if (hdcp_work->srm_temp == NULL)
580 		goto fail_alloc_context;
581 
582 	hdcp_work->max_link = max_caps;
583 
584 	for (i = 0; i < max_caps; i++) {
585 		mutex_init(&hdcp_work[i].mutex);
586 
587 		INIT_WORK(&hdcp_work[i].cpirq_work, event_cpirq);
588 		INIT_WORK(&hdcp_work[i].property_update_work, event_property_update);
589 		INIT_DELAYED_WORK(&hdcp_work[i].callback_dwork, event_callback);
590 		INIT_DELAYED_WORK(&hdcp_work[i].watchdog_timer_dwork, event_watchdog_timer);
591 		INIT_DELAYED_WORK(&hdcp_work[i].property_validate_dwork, event_property_validate);
592 
593 		hdcp_work[i].hdcp.config.psp.handle = &adev->psp;
594 		hdcp_work[i].hdcp.config.ddc.handle = dc_get_link_at_index(dc, i);
595 		hdcp_work[i].hdcp.config.ddc.funcs.write_i2c = lp_write_i2c;
596 		hdcp_work[i].hdcp.config.ddc.funcs.read_i2c = lp_read_i2c;
597 		hdcp_work[i].hdcp.config.ddc.funcs.write_dpcd = lp_write_dpcd;
598 		hdcp_work[i].hdcp.config.ddc.funcs.read_dpcd = lp_read_dpcd;
599 	}
600 
601 	cp_psp->funcs.update_stream_config = update_config;
602 	cp_psp->handle = hdcp_work;
603 
604 	/* File created at /sys/class/drm/card0/device/hdcp_srm*/
605 	hdcp_work[0].attr = data_attr;
606 
607 	if (sysfs_create_bin_file(&adev->dev->kobj, &hdcp_work[0].attr))
608 		DRM_WARN("Failed to create device file hdcp_srm");
609 
610 	return hdcp_work;
611 
612 fail_alloc_context:
613 	kfree(hdcp_work->srm);
614 	kfree(hdcp_work->srm_temp);
615 	kfree(hdcp_work);
616 
617 	return NULL;
618 
619 
620 
621 }
622 
623 
624 
625