1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "amdgpu_dm_hdcp.h"
27 #include "amdgpu.h"
28 #include "amdgpu_dm.h"
29 #include "dm_helpers.h"
30 #include <drm/drm_hdcp.h>
31 #include "hdcp_psp.h"
32 
33 /*
34  * If the SRM version being loaded is less than or equal to the
35  * currently loaded SRM, psp will return 0xFFFF as the version
36  */
37 #define PSP_SRM_VERSION_MAX 0xFFFF
38 
39 static bool
40 lp_write_i2c(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
41 {
42 
43 	struct dc_link *link = handle;
44 	struct i2c_payload i2c_payloads[] = {{true, address, size, (void *)data} };
45 	struct i2c_command cmd = {i2c_payloads, 1, I2C_COMMAND_ENGINE_HW, link->dc->caps.i2c_speed_in_khz};
46 
47 	return dm_helpers_submit_i2c(link->ctx, link, &cmd);
48 }
49 
50 static bool
51 lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *data, uint32_t size)
52 {
53 	struct dc_link *link = handle;
54 
55 	struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset}, {false, address, size, data} };
56 	struct i2c_command cmd = {i2c_payloads, 2, I2C_COMMAND_ENGINE_HW, link->dc->caps.i2c_speed_in_khz};
57 
58 	return dm_helpers_submit_i2c(link->ctx, link, &cmd);
59 }
60 
61 static bool
62 lp_write_dpcd(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
63 {
64 	struct dc_link *link = handle;
65 
66 	return dm_helpers_dp_write_dpcd(link->ctx, link, address, data, size);
67 }
68 
69 static bool
70 lp_read_dpcd(void *handle, uint32_t address, uint8_t *data, uint32_t size)
71 {
72 	struct dc_link *link = handle;
73 
74 	return dm_helpers_dp_read_dpcd(link->ctx, link, address, data, size);
75 }
76 
77 static uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint32_t *srm_size)
78 {
79 
80 	struct ta_hdcp_shared_memory *hdcp_cmd;
81 
82 	if (!psp->hdcp_context.hdcp_initialized) {
83 		DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
84 		return NULL;
85 	}
86 
87 	hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.hdcp_shared_buf;
88 	memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
89 
90 	hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_GET_SRM;
91 	psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
92 
93 	if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS)
94 		return NULL;
95 
96 	*srm_version = hdcp_cmd->out_msg.hdcp_get_srm.srm_version;
97 	*srm_size = hdcp_cmd->out_msg.hdcp_get_srm.srm_buf_size;
98 
99 
100 	return hdcp_cmd->out_msg.hdcp_get_srm.srm_buf;
101 }
102 
103 static int psp_set_srm(struct psp_context *psp, uint8_t *srm, uint32_t srm_size, uint32_t *srm_version)
104 {
105 
106 	struct ta_hdcp_shared_memory *hdcp_cmd;
107 
108 	if (!psp->hdcp_context.hdcp_initialized) {
109 		DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
110 		return -EINVAL;
111 	}
112 
113 	hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.hdcp_shared_buf;
114 	memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
115 
116 	memcpy(hdcp_cmd->in_msg.hdcp_set_srm.srm_buf, srm, srm_size);
117 	hdcp_cmd->in_msg.hdcp_set_srm.srm_buf_size = srm_size;
118 	hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_SET_SRM;
119 
120 	psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
121 
122 	if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS || hdcp_cmd->out_msg.hdcp_set_srm.valid_signature != 1 ||
123 	    hdcp_cmd->out_msg.hdcp_set_srm.srm_version == PSP_SRM_VERSION_MAX)
124 		return -EINVAL;
125 
126 	*srm_version = hdcp_cmd->out_msg.hdcp_set_srm.srm_version;
127 	return 0;
128 }
129 
130 static void process_output(struct hdcp_workqueue *hdcp_work)
131 {
132 	struct mod_hdcp_output output = hdcp_work->output;
133 
134 	if (output.callback_stop)
135 		cancel_delayed_work(&hdcp_work->callback_dwork);
136 
137 	if (output.callback_needed)
138 		schedule_delayed_work(&hdcp_work->callback_dwork,
139 				      msecs_to_jiffies(output.callback_delay));
140 
141 	if (output.watchdog_timer_stop)
142 		cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
143 
144 	if (output.watchdog_timer_needed)
145 		schedule_delayed_work(&hdcp_work->watchdog_timer_dwork,
146 				      msecs_to_jiffies(output.watchdog_timer_delay));
147 
148 	schedule_delayed_work(&hdcp_work->property_validate_dwork, msecs_to_jiffies(0));
149 }
150 
151 static void link_lock(struct hdcp_workqueue *work, bool lock)
152 {
153 
154 	int i = 0;
155 
156 	for (i = 0; i < work->max_link; i++) {
157 		if (lock)
158 			mutex_lock(&work[i].mutex);
159 		else
160 			mutex_unlock(&work[i].mutex);
161 	}
162 }
163 void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
164 			 unsigned int link_index,
165 			 struct amdgpu_dm_connector *aconnector,
166 			 uint8_t content_type,
167 			 bool enable_encryption)
168 {
169 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
170 	struct mod_hdcp_display *display = &hdcp_work[link_index].display;
171 	struct mod_hdcp_link *link = &hdcp_work[link_index].link;
172 	struct mod_hdcp_display_query query;
173 
174 	mutex_lock(&hdcp_w->mutex);
175 	hdcp_w->aconnector = aconnector;
176 
177 	query.display = NULL;
178 	mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
179 
180 	if (query.display != NULL) {
181 		memcpy(display, query.display, sizeof(struct mod_hdcp_display));
182 		mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
183 
184 		hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
185 
186 		if (enable_encryption) {
187 			/* Explicitly set the saved SRM as sysfs call will be after we already enabled hdcp
188 			 * (s3 resume case)
189 			 */
190 			if (hdcp_work->srm_size > 0)
191 				psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm, hdcp_work->srm_size,
192 					    &hdcp_work->srm_version);
193 
194 			display->adjust.disable = 0;
195 			if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0)
196 				hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
197 			else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1)
198 				hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
199 
200 			schedule_delayed_work(&hdcp_w->property_validate_dwork,
201 					      msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
202 		} else {
203 			display->adjust.disable = 1;
204 			hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
205 			cancel_delayed_work(&hdcp_w->property_validate_dwork);
206 		}
207 
208 		display->state = MOD_HDCP_DISPLAY_ACTIVE;
209 	}
210 
211 	mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
212 
213 	process_output(hdcp_w);
214 	mutex_unlock(&hdcp_w->mutex);
215 }
216 
217 static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
218 			 unsigned int link_index,
219 			 struct amdgpu_dm_connector *aconnector)
220 {
221 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
222 
223 	mutex_lock(&hdcp_w->mutex);
224 	hdcp_w->aconnector = aconnector;
225 
226 	mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
227 
228 	process_output(hdcp_w);
229 	mutex_unlock(&hdcp_w->mutex);
230 }
231 void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
232 {
233 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
234 
235 	mutex_lock(&hdcp_w->mutex);
236 
237 	mod_hdcp_reset_connection(&hdcp_w->hdcp,  &hdcp_w->output);
238 
239 	cancel_delayed_work(&hdcp_w->property_validate_dwork);
240 	hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
241 
242 	process_output(hdcp_w);
243 
244 	mutex_unlock(&hdcp_w->mutex);
245 }
246 
247 void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
248 {
249 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
250 
251 	schedule_work(&hdcp_w->cpirq_work);
252 }
253 
254 
255 
256 
257 static void event_callback(struct work_struct *work)
258 {
259 	struct hdcp_workqueue *hdcp_work;
260 
261 	hdcp_work = container_of(to_delayed_work(work), struct hdcp_workqueue,
262 				      callback_dwork);
263 
264 	mutex_lock(&hdcp_work->mutex);
265 
266 	cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
267 
268 	mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CALLBACK,
269 			       &hdcp_work->output);
270 
271 	process_output(hdcp_work);
272 
273 	mutex_unlock(&hdcp_work->mutex);
274 
275 
276 }
277 static void event_property_update(struct work_struct *work)
278 {
279 
280 	struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue, property_update_work);
281 	struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
282 	struct drm_device *dev = hdcp_work->aconnector->base.dev;
283 	long ret;
284 
285 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
286 	mutex_lock(&hdcp_work->mutex);
287 
288 
289 	if (aconnector->base.state->commit) {
290 		ret = wait_for_completion_interruptible_timeout(&aconnector->base.state->commit->hw_done, 10 * HZ);
291 
292 		if (ret == 0) {
293 			DRM_ERROR("HDCP state unknown! Setting it to DESIRED");
294 			hdcp_work->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
295 		}
296 	}
297 
298 	if (hdcp_work->encryption_status != MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
299 		if (aconnector->base.state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE0 &&
300 		    hdcp_work->encryption_status <= MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON)
301 			drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_ENABLED);
302 		else if (aconnector->base.state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE1 &&
303 			 hdcp_work->encryption_status == MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON)
304 			drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_ENABLED);
305 	} else {
306 		drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_DESIRED);
307 	}
308 
309 
310 	mutex_unlock(&hdcp_work->mutex);
311 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
312 }
313 
314 static void event_property_validate(struct work_struct *work)
315 {
316 	struct hdcp_workqueue *hdcp_work =
317 		container_of(to_delayed_work(work), struct hdcp_workqueue, property_validate_dwork);
318 	struct mod_hdcp_display_query query;
319 	struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
320 
321 	if (!aconnector)
322 		return;
323 
324 	mutex_lock(&hdcp_work->mutex);
325 
326 	query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
327 	mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index, &query);
328 
329 	if (query.encryption_status != hdcp_work->encryption_status) {
330 		hdcp_work->encryption_status = query.encryption_status;
331 		schedule_work(&hdcp_work->property_update_work);
332 	}
333 
334 	mutex_unlock(&hdcp_work->mutex);
335 }
336 
337 static void event_watchdog_timer(struct work_struct *work)
338 {
339 	struct hdcp_workqueue *hdcp_work;
340 
341 	hdcp_work = container_of(to_delayed_work(work),
342 				      struct hdcp_workqueue,
343 				      watchdog_timer_dwork);
344 
345 	mutex_lock(&hdcp_work->mutex);
346 
347 	mod_hdcp_process_event(&hdcp_work->hdcp,
348 			       MOD_HDCP_EVENT_WATCHDOG_TIMEOUT,
349 			       &hdcp_work->output);
350 
351 	process_output(hdcp_work);
352 
353 	mutex_unlock(&hdcp_work->mutex);
354 
355 }
356 
357 static void event_cpirq(struct work_struct *work)
358 {
359 	struct hdcp_workqueue *hdcp_work;
360 
361 	hdcp_work = container_of(work, struct hdcp_workqueue, cpirq_work);
362 
363 	mutex_lock(&hdcp_work->mutex);
364 
365 	mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CPIRQ, &hdcp_work->output);
366 
367 	process_output(hdcp_work);
368 
369 	mutex_unlock(&hdcp_work->mutex);
370 
371 }
372 
373 
374 void hdcp_destroy(struct hdcp_workqueue *hdcp_work)
375 {
376 	int i = 0;
377 
378 	for (i = 0; i < hdcp_work->max_link; i++) {
379 		cancel_delayed_work_sync(&hdcp_work[i].callback_dwork);
380 		cancel_delayed_work_sync(&hdcp_work[i].watchdog_timer_dwork);
381 	}
382 
383 	kfree(hdcp_work->srm);
384 	kfree(hdcp_work->srm_temp);
385 	kfree(hdcp_work);
386 }
387 
388 static void update_config(void *handle, struct cp_psp_stream_config *config)
389 {
390 	struct hdcp_workqueue *hdcp_work = handle;
391 	struct amdgpu_dm_connector *aconnector = config->dm_stream_ctx;
392 	int link_index = aconnector->dc_link->link_index;
393 	struct mod_hdcp_display *display = &hdcp_work[link_index].display;
394 	struct mod_hdcp_link *link = &hdcp_work[link_index].link;
395 
396 	memset(display, 0, sizeof(*display));
397 	memset(link, 0, sizeof(*link));
398 
399 	display->index = aconnector->base.index;
400 
401 	if (config->dpms_off) {
402 		hdcp_remove_display(hdcp_work, link_index, aconnector);
403 		return;
404 	}
405 	display->state = MOD_HDCP_DISPLAY_ACTIVE;
406 
407 	if (aconnector->dc_sink != NULL)
408 		link->mode = mod_hdcp_signal_type_to_operation_mode(aconnector->dc_sink->sink_signal);
409 
410 	display->controller = CONTROLLER_ID_D0 + config->otg_inst;
411 	display->dig_fe = config->stream_enc_inst;
412 	link->dig_be = config->link_enc_inst;
413 	link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1;
414 	link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
415 	link->dp.mst_supported = config->mst_supported;
416 	display->adjust.disable = 1;
417 	link->adjust.auth_delay = 2;
418 
419 	hdcp_update_display(hdcp_work, link_index, aconnector, DRM_MODE_HDCP_CONTENT_TYPE0, false);
420 }
421 
422 
423 /* NOTE: From the usermodes prospective you only need to call write *ONCE*, the kernel
424  *      will automatically call once or twice depending on the size
425  *
426  * call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no matter what the size is
427  *
428  * The kernel can only send PAGE_SIZE at once and since MAX_SRM_FILE(5120) > PAGE_SIZE(4096),
429  * srm_data_write can be called multiple times.
430  *
431  * sysfs interface doesn't tell us the size we will get so we are sending partial SRMs to psp and on
432  * the last call we will send the full SRM. PSP will fail on every call before the last.
433  *
434  * This means we don't know if the SRM is good until the last call. And because of this limitation we
435  * cannot throw errors early as it will stop the kernel from writing to sysfs
436  *
437  * Example 1:
438  * 	Good SRM size = 5096
439  * 	first call to write 4096 -> PSP fails
440  * 	Second call to write 1000 -> PSP Pass -> SRM is set
441  *
442  * Example 2:
443  * 	Bad SRM size = 4096
444  * 	first call to write 4096 -> PSP fails (This is the same as above, but we don't know if this
445  * 	is the last call)
446  *
447  * Solution?:
448  * 	1: Parse the SRM? -> It is signed so we don't know the EOF
449  * 	2: We can have another sysfs that passes the size before calling set. -> simpler solution
450  * 	below
451  *
452  * Easy Solution:
453  * Always call get after Set to verify if set was successful.
454  * +----------------------+
455  * |   Why it works:      |
456  * +----------------------+
457  * PSP will only update its srm if its older than the one we are trying to load.
458  * Always do set first than get.
459  * 	-if we try to "1. SET" a older version PSP will reject it and we can "2. GET" the newer
460  * 	version and save it
461  *
462  * 	-if we try to "1. SET" a newer version PSP will accept it and we can "2. GET" the
463  * 	same(newer) version back and save it
464  *
465  * 	-if we try to "1. SET" a newer version and PSP rejects it. That means the format is
466  * 	incorrect/corrupted and we should correct our SRM by getting it from PSP
467  */
468 static ssize_t srm_data_write(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer,
469 			      loff_t pos, size_t count)
470 {
471 	struct hdcp_workqueue *work;
472 	uint32_t srm_version = 0;
473 
474 	work = container_of(bin_attr, struct hdcp_workqueue, attr);
475 	link_lock(work, true);
476 
477 	memcpy(work->srm_temp + pos, buffer, count);
478 
479 	if (!psp_set_srm(work->hdcp.config.psp.handle, work->srm_temp, pos + count, &srm_version)) {
480 		DRM_DEBUG_DRIVER("HDCP SRM SET version 0x%X", srm_version);
481 		memcpy(work->srm, work->srm_temp, pos + count);
482 		work->srm_size = pos + count;
483 		work->srm_version = srm_version;
484 	}
485 
486 
487 	link_lock(work, false);
488 
489 	return count;
490 }
491 
492 static ssize_t srm_data_read(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer,
493 			     loff_t pos, size_t count)
494 {
495 	struct hdcp_workqueue *work;
496 	uint8_t *srm = NULL;
497 	uint32_t srm_version;
498 	uint32_t srm_size;
499 	size_t ret = count;
500 
501 	work = container_of(bin_attr, struct hdcp_workqueue, attr);
502 
503 	link_lock(work, true);
504 
505 	srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size);
506 
507 	if (!srm)
508 		return -EINVAL;
509 
510 	if (pos >= srm_size)
511 		ret = 0;
512 
513 	if (srm_size - pos < count) {
514 		memcpy(buffer, srm + pos, srm_size - pos);
515 		ret = srm_size - pos;
516 		goto ret;
517 	}
518 
519 	memcpy(buffer, srm + pos, count);
520 
521 ret:
522 	link_lock(work, false);
523 	return ret;
524 }
525 
526 /* From the hdcp spec (5.Renewability) SRM needs to be stored in a non-volatile memory.
527  *
528  * For example,
529  * 	if Application "A" sets the SRM (ver 2) and we reboot/suspend and later when Application "B"
530  * 	needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM should be persistent
531  * 	across boot/reboots/suspend/resume/shutdown
532  *
533  * Currently when the system goes down (suspend/shutdown) the SRM is cleared from PSP. For HDCP we need
534  * to make the SRM persistent.
535  *
536  * -PSP owns the checking of SRM but doesn't have the ability to store it in a non-volatile memory.
537  * -The kernel cannot write to the file systems.
538  * -So we need usermode to do this for us, which is why an interface for usermode is needed
539  *
540  *
541  *
542  * Usermode can read/write to/from PSP using the sysfs interface
543  * For example:
544  * 	to save SRM from PSP to storage : cat /sys/class/drm/card0/device/hdcp_srm > srmfile
545  * 	to load from storage to PSP: cat srmfile > /sys/class/drm/card0/device/hdcp_srm
546  */
547 static const struct bin_attribute data_attr = {
548 	.attr = {.name = "hdcp_srm", .mode = 0664},
549 	.size = PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, /* Limit SRM size */
550 	.write = srm_data_write,
551 	.read = srm_data_read,
552 };
553 
554 
555 struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct cp_psp *cp_psp, struct dc *dc)
556 {
557 
558 	int max_caps = dc->caps.max_links;
559 	struct hdcp_workqueue *hdcp_work;
560 	int i = 0;
561 
562 	hdcp_work = kcalloc(max_caps, sizeof(*hdcp_work), GFP_KERNEL);
563 	if (hdcp_work == NULL)
564 		return NULL;
565 
566 	hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm), GFP_KERNEL);
567 
568 	if (hdcp_work->srm == NULL)
569 		goto fail_alloc_context;
570 
571 	hdcp_work->srm_temp = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm_temp), GFP_KERNEL);
572 
573 	if (hdcp_work->srm_temp == NULL)
574 		goto fail_alloc_context;
575 
576 	hdcp_work->max_link = max_caps;
577 
578 	for (i = 0; i < max_caps; i++) {
579 		mutex_init(&hdcp_work[i].mutex);
580 
581 		INIT_WORK(&hdcp_work[i].cpirq_work, event_cpirq);
582 		INIT_WORK(&hdcp_work[i].property_update_work, event_property_update);
583 		INIT_DELAYED_WORK(&hdcp_work[i].callback_dwork, event_callback);
584 		INIT_DELAYED_WORK(&hdcp_work[i].watchdog_timer_dwork, event_watchdog_timer);
585 		INIT_DELAYED_WORK(&hdcp_work[i].property_validate_dwork, event_property_validate);
586 
587 		hdcp_work[i].hdcp.config.psp.handle = &adev->psp;
588 		hdcp_work[i].hdcp.config.ddc.handle = dc_get_link_at_index(dc, i);
589 		hdcp_work[i].hdcp.config.ddc.funcs.write_i2c = lp_write_i2c;
590 		hdcp_work[i].hdcp.config.ddc.funcs.read_i2c = lp_read_i2c;
591 		hdcp_work[i].hdcp.config.ddc.funcs.write_dpcd = lp_write_dpcd;
592 		hdcp_work[i].hdcp.config.ddc.funcs.read_dpcd = lp_read_dpcd;
593 	}
594 
595 	cp_psp->funcs.update_stream_config = update_config;
596 	cp_psp->handle = hdcp_work;
597 
598 	/* File created at /sys/class/drm/card0/device/hdcp_srm*/
599 	hdcp_work[0].attr = data_attr;
600 
601 	if (sysfs_create_bin_file(&adev->dev->kobj, &hdcp_work[0].attr))
602 		DRM_WARN("Failed to create device file hdcp_srm");
603 
604 	return hdcp_work;
605 
606 fail_alloc_context:
607 	kfree(hdcp_work->srm);
608 	kfree(hdcp_work->srm_temp);
609 	kfree(hdcp_work);
610 
611 	return NULL;
612 
613 
614 
615 }
616 
617 
618 
619