1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef AMD_DAL_DEV_AMDGPU_DM_AMDGPU_DM_CRC_H_ 27 #define AMD_DAL_DEV_AMDGPU_DM_AMDGPU_DM_CRC_H_ 28 29 enum amdgpu_dm_pipe_crc_source { 30 AMDGPU_DM_PIPE_CRC_SOURCE_NONE = 0, 31 AMDGPU_DM_PIPE_CRC_SOURCE_CRTC, 32 AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER, 33 AMDGPU_DM_PIPE_CRC_SOURCE_DPRX, 34 AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER, 35 AMDGPU_DM_PIPE_CRC_SOURCE_MAX, 36 AMDGPU_DM_PIPE_CRC_SOURCE_INVALID = -1, 37 }; 38 39 static inline bool amdgpu_dm_is_valid_crc_source(enum amdgpu_dm_pipe_crc_source source) 40 { 41 return (source > AMDGPU_DM_PIPE_CRC_SOURCE_NONE) && 42 (source < AMDGPU_DM_PIPE_CRC_SOURCE_MAX); 43 } 44 45 /* amdgpu_dm_crc.c */ 46 #ifdef CONFIG_DEBUG_FS 47 int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name); 48 int amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, 49 const char *src_name, 50 size_t *values_cnt); 51 const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc, 52 size_t *count); 53 void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc); 54 #else 55 #define amdgpu_dm_crtc_set_crc_source NULL 56 #define amdgpu_dm_crtc_verify_crc_source NULL 57 #define amdgpu_dm_crtc_get_crc_sources NULL 58 #define amdgpu_dm_crtc_handle_crc_irq(x) 59 #endif 60 61 #endif /* AMD_DAL_DEV_AMDGPU_DM_AMDGPU_DM_CRC_H_ */ 62