1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include <drm/drm_crtc.h> 27 28 #include "amdgpu.h" 29 #include "amdgpu_dm.h" 30 #include "dc.h" 31 32 enum amdgpu_dm_pipe_crc_source { 33 AMDGPU_DM_PIPE_CRC_SOURCE_NONE = 0, 34 AMDGPU_DM_PIPE_CRC_SOURCE_AUTO, 35 AMDGPU_DM_PIPE_CRC_SOURCE_MAX, 36 AMDGPU_DM_PIPE_CRC_SOURCE_INVALID = -1, 37 }; 38 39 static enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const char *source) 40 { 41 if (!source || !strcmp(source, "none")) 42 return AMDGPU_DM_PIPE_CRC_SOURCE_NONE; 43 if (!strcmp(source, "auto")) 44 return AMDGPU_DM_PIPE_CRC_SOURCE_AUTO; 45 46 return AMDGPU_DM_PIPE_CRC_SOURCE_INVALID; 47 } 48 49 int 50 amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, const char *src_name, 51 size_t *values_cnt) 52 { 53 enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name); 54 55 if (source < 0) { 56 DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n", 57 src_name, crtc->index); 58 return -EINVAL; 59 } 60 61 *values_cnt = 3; 62 return 0; 63 } 64 65 int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name) 66 { 67 struct dm_crtc_state *crtc_state = to_dm_crtc_state(crtc->state); 68 struct dc_stream_state *stream_state = crtc_state->stream; 69 70 enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name); 71 72 if (source < 0) { 73 DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n", 74 src_name, crtc->index); 75 return -EINVAL; 76 } 77 78 /* When enabling CRC, we should also disable dithering. */ 79 if (source == AMDGPU_DM_PIPE_CRC_SOURCE_AUTO) { 80 if (dc_stream_configure_crc(stream_state->ctx->dc, 81 stream_state, 82 true, true)) { 83 crtc_state->crc_enabled = true; 84 dc_stream_set_dither_option(stream_state, 85 DITHER_OPTION_TRUN8); 86 } 87 else 88 return -EINVAL; 89 } else { 90 if (dc_stream_configure_crc(stream_state->ctx->dc, 91 stream_state, 92 false, false)) { 93 crtc_state->crc_enabled = false; 94 dc_stream_set_dither_option(stream_state, 95 DITHER_OPTION_DEFAULT); 96 } 97 else 98 return -EINVAL; 99 } 100 101 /* Reset crc_skipped on dm state */ 102 crtc_state->crc_skip_count = 0; 103 return 0; 104 } 105 106 /** 107 * amdgpu_dm_crtc_handle_crc_irq: Report to DRM the CRC on given CRTC. 108 * @crtc: DRM CRTC object. 109 * 110 * This function should be called at the end of a vblank, when the fb has been 111 * fully processed through the pipe. 112 */ 113 void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc) 114 { 115 struct dm_crtc_state *crtc_state; 116 struct dc_stream_state *stream_state; 117 uint32_t crcs[3]; 118 119 if (crtc == NULL) 120 return; 121 122 crtc_state = to_dm_crtc_state(crtc->state); 123 stream_state = crtc_state->stream; 124 125 /* Early return if CRC capture is not enabled. */ 126 if (!crtc_state->crc_enabled) 127 return; 128 129 /* 130 * Since flipping and crc enablement happen asynchronously, we - more 131 * often than not - will be returning an 'uncooked' crc on first frame. 132 * Probably because hw isn't ready yet. For added security, skip the 133 * first two CRC values. 134 */ 135 if (crtc_state->crc_skip_count < 2) { 136 crtc_state->crc_skip_count += 1; 137 return; 138 } 139 140 if (!dc_stream_get_crc(stream_state->ctx->dc, stream_state, 141 &crcs[0], &crcs[1], &crcs[2])) 142 return; 143 144 drm_crtc_add_crc_entry(crtc, true, 145 drm_crtc_accurate_vblank_count(crtc), crcs); 146 } 147