1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx, uint64_t *vram_pages) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 uint64_t vram_pages_dev; 168 int i, r; 169 170 if (!addr) { 171 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 172 if (!addr) 173 return -ENOMEM; 174 prange->dma_addr[gpuidx] = addr; 175 } 176 177 vram_pages_dev = 0; 178 addr += offset; 179 for (i = 0; i < npages; i++) { 180 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 181 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 182 183 page = hmm_pfn_to_page(hmm_pfns[i]); 184 if (is_zone_device_page(page)) { 185 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 186 187 vram_pages_dev++; 188 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 189 bo_adev->vm_manager.vram_base_offset - 190 bo_adev->kfd.pgmap.range.start; 191 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 192 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 193 continue; 194 } 195 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 196 r = dma_mapping_error(dev, addr[i]); 197 if (r) { 198 dev_err(dev, "failed %d dma_map_page\n", r); 199 return r; 200 } 201 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 202 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 203 } 204 *vram_pages = vram_pages_dev; 205 return 0; 206 } 207 208 static int 209 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 210 unsigned long offset, unsigned long npages, 211 unsigned long *hmm_pfns, uint64_t *vram_pages) 212 { 213 struct kfd_process *p; 214 uint32_t gpuidx; 215 int r; 216 217 p = container_of(prange->svms, struct kfd_process, svms); 218 219 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 220 struct kfd_process_device *pdd; 221 222 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 223 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 224 if (!pdd) { 225 pr_debug("failed to find device idx %d\n", gpuidx); 226 return -EINVAL; 227 } 228 229 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 230 hmm_pfns, gpuidx, vram_pages); 231 if (r) 232 break; 233 } 234 235 return r; 236 } 237 238 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 239 unsigned long offset, unsigned long npages) 240 { 241 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 242 int i; 243 244 if (!dma_addr) 245 return; 246 247 for (i = offset; i < offset + npages; i++) { 248 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 249 continue; 250 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 251 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 252 dma_addr[i] = 0; 253 } 254 } 255 256 void svm_range_dma_unmap(struct svm_range *prange) 257 { 258 struct kfd_process_device *pdd; 259 dma_addr_t *dma_addr; 260 struct device *dev; 261 struct kfd_process *p; 262 uint32_t gpuidx; 263 264 p = container_of(prange->svms, struct kfd_process, svms); 265 266 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 267 dma_addr = prange->dma_addr[gpuidx]; 268 if (!dma_addr) 269 continue; 270 271 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 272 if (!pdd) { 273 pr_debug("failed to find device idx %d\n", gpuidx); 274 continue; 275 } 276 dev = &pdd->dev->adev->pdev->dev; 277 278 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 279 } 280 } 281 282 static void svm_range_free(struct svm_range *prange, bool do_unmap) 283 { 284 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 285 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 286 uint32_t gpuidx; 287 288 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 289 prange->start, prange->last); 290 291 svm_range_vram_node_free(prange); 292 if (do_unmap) 293 svm_range_dma_unmap(prange); 294 295 if (do_unmap && !p->xnack_enabled) { 296 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 297 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 298 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 299 } 300 301 /* free dma_addr array for each gpu */ 302 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 303 if (prange->dma_addr[gpuidx]) { 304 kvfree(prange->dma_addr[gpuidx]); 305 prange->dma_addr[gpuidx] = NULL; 306 } 307 } 308 309 mutex_destroy(&prange->lock); 310 mutex_destroy(&prange->migrate_mutex); 311 kfree(prange); 312 } 313 314 static void 315 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 316 uint8_t *granularity, uint32_t *flags) 317 { 318 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 319 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 320 *granularity = 9; 321 *flags = 322 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 323 } 324 325 static struct 326 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 327 uint64_t last, bool update_mem_usage) 328 { 329 uint64_t size = last - start + 1; 330 struct svm_range *prange; 331 struct kfd_process *p; 332 333 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 334 if (!prange) 335 return NULL; 336 337 p = container_of(svms, struct kfd_process, svms); 338 if (!p->xnack_enabled && update_mem_usage && 339 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 340 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 341 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 342 kfree(prange); 343 return NULL; 344 } 345 prange->npages = size; 346 prange->svms = svms; 347 prange->start = start; 348 prange->last = last; 349 INIT_LIST_HEAD(&prange->list); 350 INIT_LIST_HEAD(&prange->update_list); 351 INIT_LIST_HEAD(&prange->svm_bo_list); 352 INIT_LIST_HEAD(&prange->deferred_list); 353 INIT_LIST_HEAD(&prange->child_list); 354 atomic_set(&prange->invalid, 0); 355 prange->validate_timestamp = 0; 356 prange->vram_pages = 0; 357 mutex_init(&prange->migrate_mutex); 358 mutex_init(&prange->lock); 359 360 if (p->xnack_enabled) 361 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 362 MAX_GPU_INSTANCE); 363 364 svm_range_set_default_attributes(&prange->preferred_loc, 365 &prange->prefetch_loc, 366 &prange->granularity, &prange->flags); 367 368 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 369 370 return prange; 371 } 372 373 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 374 { 375 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 376 return false; 377 378 return true; 379 } 380 381 static void svm_range_bo_release(struct kref *kref) 382 { 383 struct svm_range_bo *svm_bo; 384 385 svm_bo = container_of(kref, struct svm_range_bo, kref); 386 pr_debug("svm_bo 0x%p\n", svm_bo); 387 388 spin_lock(&svm_bo->list_lock); 389 while (!list_empty(&svm_bo->range_list)) { 390 struct svm_range *prange = 391 list_first_entry(&svm_bo->range_list, 392 struct svm_range, svm_bo_list); 393 /* list_del_init tells a concurrent svm_range_vram_node_new when 394 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 395 */ 396 list_del_init(&prange->svm_bo_list); 397 spin_unlock(&svm_bo->list_lock); 398 399 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 400 prange->start, prange->last); 401 mutex_lock(&prange->lock); 402 prange->svm_bo = NULL; 403 /* prange should not hold vram page now */ 404 WARN_ON(prange->actual_loc); 405 mutex_unlock(&prange->lock); 406 407 spin_lock(&svm_bo->list_lock); 408 } 409 spin_unlock(&svm_bo->list_lock); 410 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 411 /* We're not in the eviction worker. 412 * Signal the fence and synchronize with any 413 * pending eviction work. 414 */ 415 dma_fence_signal(&svm_bo->eviction_fence->base); 416 cancel_work_sync(&svm_bo->eviction_work); 417 } 418 dma_fence_put(&svm_bo->eviction_fence->base); 419 amdgpu_bo_unref(&svm_bo->bo); 420 kfree(svm_bo); 421 } 422 423 static void svm_range_bo_wq_release(struct work_struct *work) 424 { 425 struct svm_range_bo *svm_bo; 426 427 svm_bo = container_of(work, struct svm_range_bo, release_work); 428 svm_range_bo_release(&svm_bo->kref); 429 } 430 431 static void svm_range_bo_release_async(struct kref *kref) 432 { 433 struct svm_range_bo *svm_bo; 434 435 svm_bo = container_of(kref, struct svm_range_bo, kref); 436 pr_debug("svm_bo 0x%p\n", svm_bo); 437 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 438 schedule_work(&svm_bo->release_work); 439 } 440 441 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 442 { 443 kref_put(&svm_bo->kref, svm_range_bo_release_async); 444 } 445 446 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 447 { 448 if (svm_bo) 449 kref_put(&svm_bo->kref, svm_range_bo_release); 450 } 451 452 static bool 453 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 454 { 455 mutex_lock(&prange->lock); 456 if (!prange->svm_bo) { 457 mutex_unlock(&prange->lock); 458 return false; 459 } 460 if (prange->ttm_res) { 461 /* We still have a reference, all is well */ 462 mutex_unlock(&prange->lock); 463 return true; 464 } 465 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 466 /* 467 * Migrate from GPU to GPU, remove range from source svm_bo->node 468 * range list, and return false to allocate svm_bo from destination 469 * node. 470 */ 471 if (prange->svm_bo->node != node) { 472 mutex_unlock(&prange->lock); 473 474 spin_lock(&prange->svm_bo->list_lock); 475 list_del_init(&prange->svm_bo_list); 476 spin_unlock(&prange->svm_bo->list_lock); 477 478 svm_range_bo_unref(prange->svm_bo); 479 return false; 480 } 481 if (READ_ONCE(prange->svm_bo->evicting)) { 482 struct dma_fence *f; 483 struct svm_range_bo *svm_bo; 484 /* The BO is getting evicted, 485 * we need to get a new one 486 */ 487 mutex_unlock(&prange->lock); 488 svm_bo = prange->svm_bo; 489 f = dma_fence_get(&svm_bo->eviction_fence->base); 490 svm_range_bo_unref(prange->svm_bo); 491 /* wait for the fence to avoid long spin-loop 492 * at list_empty_careful 493 */ 494 dma_fence_wait(f, false); 495 dma_fence_put(f); 496 } else { 497 /* The BO was still around and we got 498 * a new reference to it 499 */ 500 mutex_unlock(&prange->lock); 501 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 502 prange->svms, prange->start, prange->last); 503 504 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 505 return true; 506 } 507 508 } else { 509 mutex_unlock(&prange->lock); 510 } 511 512 /* We need a new svm_bo. Spin-loop to wait for concurrent 513 * svm_range_bo_release to finish removing this range from 514 * its range list and set prange->svm_bo to null. After this, 515 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 516 */ 517 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 518 cond_resched(); 519 520 return false; 521 } 522 523 static struct svm_range_bo *svm_range_bo_new(void) 524 { 525 struct svm_range_bo *svm_bo; 526 527 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 528 if (!svm_bo) 529 return NULL; 530 531 kref_init(&svm_bo->kref); 532 INIT_LIST_HEAD(&svm_bo->range_list); 533 spin_lock_init(&svm_bo->list_lock); 534 535 return svm_bo; 536 } 537 538 int 539 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 540 bool clear) 541 { 542 struct amdgpu_bo_param bp; 543 struct svm_range_bo *svm_bo; 544 struct amdgpu_bo_user *ubo; 545 struct amdgpu_bo *bo; 546 struct kfd_process *p; 547 struct mm_struct *mm; 548 int r; 549 550 p = container_of(prange->svms, struct kfd_process, svms); 551 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 552 prange->start, prange->last); 553 554 if (svm_range_validate_svm_bo(node, prange)) 555 return 0; 556 557 svm_bo = svm_range_bo_new(); 558 if (!svm_bo) { 559 pr_debug("failed to alloc svm bo\n"); 560 return -ENOMEM; 561 } 562 mm = get_task_mm(p->lead_thread); 563 if (!mm) { 564 pr_debug("failed to get mm\n"); 565 kfree(svm_bo); 566 return -ESRCH; 567 } 568 svm_bo->node = node; 569 svm_bo->eviction_fence = 570 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 571 mm, 572 svm_bo); 573 mmput(mm); 574 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 575 svm_bo->evicting = 0; 576 memset(&bp, 0, sizeof(bp)); 577 bp.size = prange->npages * PAGE_SIZE; 578 bp.byte_align = PAGE_SIZE; 579 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 580 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 581 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 582 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 583 bp.type = ttm_bo_type_device; 584 bp.resv = NULL; 585 if (node->xcp) 586 bp.xcp_id_plus1 = node->xcp->id + 1; 587 588 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 589 if (r) { 590 pr_debug("failed %d to create bo\n", r); 591 goto create_bo_failed; 592 } 593 bo = &ubo->bo; 594 595 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 596 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 597 bp.xcp_id_plus1 - 1); 598 599 r = amdgpu_bo_reserve(bo, true); 600 if (r) { 601 pr_debug("failed %d to reserve bo\n", r); 602 goto reserve_bo_failed; 603 } 604 605 if (clear) { 606 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 607 if (r) { 608 pr_debug("failed %d to sync bo\n", r); 609 amdgpu_bo_unreserve(bo); 610 goto reserve_bo_failed; 611 } 612 } 613 614 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 615 if (r) { 616 pr_debug("failed %d to reserve bo\n", r); 617 amdgpu_bo_unreserve(bo); 618 goto reserve_bo_failed; 619 } 620 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 621 622 amdgpu_bo_unreserve(bo); 623 624 svm_bo->bo = bo; 625 prange->svm_bo = svm_bo; 626 prange->ttm_res = bo->tbo.resource; 627 prange->offset = 0; 628 629 spin_lock(&svm_bo->list_lock); 630 list_add(&prange->svm_bo_list, &svm_bo->range_list); 631 spin_unlock(&svm_bo->list_lock); 632 633 return 0; 634 635 reserve_bo_failed: 636 amdgpu_bo_unref(&bo); 637 create_bo_failed: 638 dma_fence_put(&svm_bo->eviction_fence->base); 639 kfree(svm_bo); 640 prange->ttm_res = NULL; 641 642 return r; 643 } 644 645 void svm_range_vram_node_free(struct svm_range *prange) 646 { 647 /* serialize prange->svm_bo unref */ 648 mutex_lock(&prange->lock); 649 /* prange->svm_bo has not been unref */ 650 if (prange->ttm_res) { 651 prange->ttm_res = NULL; 652 mutex_unlock(&prange->lock); 653 svm_range_bo_unref(prange->svm_bo); 654 } else 655 mutex_unlock(&prange->lock); 656 } 657 658 struct kfd_node * 659 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 660 { 661 struct kfd_process *p; 662 struct kfd_process_device *pdd; 663 664 p = container_of(prange->svms, struct kfd_process, svms); 665 pdd = kfd_process_device_data_by_id(p, gpu_id); 666 if (!pdd) { 667 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 668 return NULL; 669 } 670 671 return pdd->dev; 672 } 673 674 struct kfd_process_device * 675 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 676 { 677 struct kfd_process *p; 678 679 p = container_of(prange->svms, struct kfd_process, svms); 680 681 return kfd_get_process_device_data(node, p); 682 } 683 684 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 685 { 686 struct ttm_operation_ctx ctx = { false, false }; 687 688 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 689 690 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 691 } 692 693 static int 694 svm_range_check_attr(struct kfd_process *p, 695 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 696 { 697 uint32_t i; 698 699 for (i = 0; i < nattr; i++) { 700 uint32_t val = attrs[i].value; 701 int gpuidx = MAX_GPU_INSTANCE; 702 703 switch (attrs[i].type) { 704 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 705 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 706 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 707 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 708 break; 709 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 710 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 711 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 712 break; 713 case KFD_IOCTL_SVM_ATTR_ACCESS: 714 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 715 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 716 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 717 break; 718 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 719 break; 720 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 721 break; 722 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 723 break; 724 default: 725 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 726 return -EINVAL; 727 } 728 729 if (gpuidx < 0) { 730 pr_debug("no GPU 0x%x found\n", val); 731 return -EINVAL; 732 } else if (gpuidx < MAX_GPU_INSTANCE && 733 !test_bit(gpuidx, p->svms.bitmap_supported)) { 734 pr_debug("GPU 0x%x not supported\n", val); 735 return -EINVAL; 736 } 737 } 738 739 return 0; 740 } 741 742 static void 743 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 744 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 745 bool *update_mapping) 746 { 747 uint32_t i; 748 int gpuidx; 749 750 for (i = 0; i < nattr; i++) { 751 switch (attrs[i].type) { 752 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 753 prange->preferred_loc = attrs[i].value; 754 break; 755 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 756 prange->prefetch_loc = attrs[i].value; 757 break; 758 case KFD_IOCTL_SVM_ATTR_ACCESS: 759 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 760 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 761 if (!p->xnack_enabled) 762 *update_mapping = true; 763 764 gpuidx = kfd_process_gpuidx_from_gpuid(p, 765 attrs[i].value); 766 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 767 bitmap_clear(prange->bitmap_access, gpuidx, 1); 768 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 769 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 770 bitmap_set(prange->bitmap_access, gpuidx, 1); 771 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 772 } else { 773 bitmap_clear(prange->bitmap_access, gpuidx, 1); 774 bitmap_set(prange->bitmap_aip, gpuidx, 1); 775 } 776 break; 777 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 778 *update_mapping = true; 779 prange->flags |= attrs[i].value; 780 break; 781 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 782 *update_mapping = true; 783 prange->flags &= ~attrs[i].value; 784 break; 785 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 786 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 787 break; 788 default: 789 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 790 } 791 } 792 } 793 794 static bool 795 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 796 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 797 { 798 uint32_t i; 799 int gpuidx; 800 801 for (i = 0; i < nattr; i++) { 802 switch (attrs[i].type) { 803 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 804 if (prange->preferred_loc != attrs[i].value) 805 return false; 806 break; 807 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 808 /* Prefetch should always trigger a migration even 809 * if the value of the attribute didn't change. 810 */ 811 return false; 812 case KFD_IOCTL_SVM_ATTR_ACCESS: 813 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 814 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 815 gpuidx = kfd_process_gpuidx_from_gpuid(p, 816 attrs[i].value); 817 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 818 if (test_bit(gpuidx, prange->bitmap_access) || 819 test_bit(gpuidx, prange->bitmap_aip)) 820 return false; 821 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 822 if (!test_bit(gpuidx, prange->bitmap_access)) 823 return false; 824 } else { 825 if (!test_bit(gpuidx, prange->bitmap_aip)) 826 return false; 827 } 828 break; 829 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 830 if ((prange->flags & attrs[i].value) != attrs[i].value) 831 return false; 832 break; 833 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 834 if ((prange->flags & attrs[i].value) != 0) 835 return false; 836 break; 837 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 838 if (prange->granularity != attrs[i].value) 839 return false; 840 break; 841 default: 842 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 843 } 844 } 845 846 return true; 847 } 848 849 /** 850 * svm_range_debug_dump - print all range information from svms 851 * @svms: svm range list header 852 * 853 * debug output svm range start, end, prefetch location from svms 854 * interval tree and link list 855 * 856 * Context: The caller must hold svms->lock 857 */ 858 static void svm_range_debug_dump(struct svm_range_list *svms) 859 { 860 struct interval_tree_node *node; 861 struct svm_range *prange; 862 863 pr_debug("dump svms 0x%p list\n", svms); 864 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 865 866 list_for_each_entry(prange, &svms->list, list) { 867 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 868 prange, prange->start, prange->npages, 869 prange->start + prange->npages - 1, 870 prange->actual_loc); 871 } 872 873 pr_debug("dump svms 0x%p interval tree\n", svms); 874 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 875 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 876 while (node) { 877 prange = container_of(node, struct svm_range, it_node); 878 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 879 prange, prange->start, prange->npages, 880 prange->start + prange->npages - 1, 881 prange->actual_loc); 882 node = interval_tree_iter_next(node, 0, ~0ULL); 883 } 884 } 885 886 static void * 887 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 888 uint64_t offset) 889 { 890 unsigned char *dst; 891 892 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 893 if (!dst) 894 return NULL; 895 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 896 897 return (void *)dst; 898 } 899 900 static int 901 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 902 { 903 int i; 904 905 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 906 if (!src->dma_addr[i]) 907 continue; 908 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 909 sizeof(*src->dma_addr[i]), src->npages, 0); 910 if (!dst->dma_addr[i]) 911 return -ENOMEM; 912 } 913 914 return 0; 915 } 916 917 static int 918 svm_range_split_array(void *ppnew, void *ppold, size_t size, 919 uint64_t old_start, uint64_t old_n, 920 uint64_t new_start, uint64_t new_n) 921 { 922 unsigned char *new, *old, *pold; 923 uint64_t d; 924 925 if (!ppold) 926 return 0; 927 pold = *(unsigned char **)ppold; 928 if (!pold) 929 return 0; 930 931 d = (new_start - old_start) * size; 932 new = svm_range_copy_array(pold, size, new_n, d); 933 if (!new) 934 return -ENOMEM; 935 d = (new_start == old_start) ? new_n * size : 0; 936 old = svm_range_copy_array(pold, size, old_n, d); 937 if (!old) { 938 kvfree(new); 939 return -ENOMEM; 940 } 941 kvfree(pold); 942 *(void **)ppold = old; 943 *(void **)ppnew = new; 944 945 return 0; 946 } 947 948 static int 949 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 950 uint64_t start, uint64_t last) 951 { 952 uint64_t npages = last - start + 1; 953 int i, r; 954 955 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 956 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 957 sizeof(*old->dma_addr[i]), old->start, 958 npages, new->start, new->npages); 959 if (r) 960 return r; 961 } 962 963 return 0; 964 } 965 966 static int 967 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 968 uint64_t start, uint64_t last) 969 { 970 uint64_t npages = last - start + 1; 971 972 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 973 new->svms, new, new->start, start, last); 974 975 if (new->start == old->start) { 976 new->offset = old->offset; 977 old->offset += new->npages; 978 } else { 979 new->offset = old->offset + npages; 980 } 981 982 new->svm_bo = svm_range_bo_ref(old->svm_bo); 983 new->ttm_res = old->ttm_res; 984 985 /* set new's vram_pages as old range's now, the acurate vram_pages 986 * will be updated during mapping 987 */ 988 new->vram_pages = min(old->vram_pages, new->npages); 989 990 spin_lock(&new->svm_bo->list_lock); 991 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 992 spin_unlock(&new->svm_bo->list_lock); 993 994 return 0; 995 } 996 997 /** 998 * svm_range_split_adjust - split range and adjust 999 * 1000 * @new: new range 1001 * @old: the old range 1002 * @start: the old range adjust to start address in pages 1003 * @last: the old range adjust to last address in pages 1004 * 1005 * Copy system memory dma_addr or vram ttm_res in old range to new 1006 * range from new_start up to size new->npages, the remaining old range is from 1007 * start to last 1008 * 1009 * Return: 1010 * 0 - OK, -ENOMEM - out of memory 1011 */ 1012 static int 1013 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1014 uint64_t start, uint64_t last) 1015 { 1016 int r; 1017 1018 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1019 new->svms, new->start, old->start, old->last, start, last); 1020 1021 if (new->start < old->start || 1022 new->last > old->last) { 1023 WARN_ONCE(1, "invalid new range start or last\n"); 1024 return -EINVAL; 1025 } 1026 1027 r = svm_range_split_pages(new, old, start, last); 1028 if (r) 1029 return r; 1030 1031 if (old->actual_loc && old->ttm_res) { 1032 r = svm_range_split_nodes(new, old, start, last); 1033 if (r) 1034 return r; 1035 } 1036 1037 old->npages = last - start + 1; 1038 old->start = start; 1039 old->last = last; 1040 new->flags = old->flags; 1041 new->preferred_loc = old->preferred_loc; 1042 new->prefetch_loc = old->prefetch_loc; 1043 new->actual_loc = old->actual_loc; 1044 new->granularity = old->granularity; 1045 new->mapped_to_gpu = old->mapped_to_gpu; 1046 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1047 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1048 1049 return 0; 1050 } 1051 1052 /** 1053 * svm_range_split - split a range in 2 ranges 1054 * 1055 * @prange: the svm range to split 1056 * @start: the remaining range start address in pages 1057 * @last: the remaining range last address in pages 1058 * @new: the result new range generated 1059 * 1060 * Two cases only: 1061 * case 1: if start == prange->start 1062 * prange ==> prange[start, last] 1063 * new range [last + 1, prange->last] 1064 * 1065 * case 2: if last == prange->last 1066 * prange ==> prange[start, last] 1067 * new range [prange->start, start - 1] 1068 * 1069 * Return: 1070 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1071 */ 1072 static int 1073 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1074 struct svm_range **new) 1075 { 1076 uint64_t old_start = prange->start; 1077 uint64_t old_last = prange->last; 1078 struct svm_range_list *svms; 1079 int r = 0; 1080 1081 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1082 old_start, old_last, start, last); 1083 1084 if (old_start != start && old_last != last) 1085 return -EINVAL; 1086 if (start < old_start || last > old_last) 1087 return -EINVAL; 1088 1089 svms = prange->svms; 1090 if (old_start == start) 1091 *new = svm_range_new(svms, last + 1, old_last, false); 1092 else 1093 *new = svm_range_new(svms, old_start, start - 1, false); 1094 if (!*new) 1095 return -ENOMEM; 1096 1097 r = svm_range_split_adjust(*new, prange, start, last); 1098 if (r) { 1099 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1100 r, old_start, old_last, start, last); 1101 svm_range_free(*new, false); 1102 *new = NULL; 1103 } 1104 1105 return r; 1106 } 1107 1108 static int 1109 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1110 struct list_head *insert_list, struct list_head *remap_list) 1111 { 1112 struct svm_range *tail; 1113 int r = svm_range_split(prange, prange->start, new_last, &tail); 1114 1115 if (!r) { 1116 list_add(&tail->list, insert_list); 1117 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1118 list_add(&tail->update_list, remap_list); 1119 } 1120 return r; 1121 } 1122 1123 static int 1124 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1125 struct list_head *insert_list, struct list_head *remap_list) 1126 { 1127 struct svm_range *head; 1128 int r = svm_range_split(prange, new_start, prange->last, &head); 1129 1130 if (!r) { 1131 list_add(&head->list, insert_list); 1132 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1133 list_add(&head->update_list, remap_list); 1134 } 1135 return r; 1136 } 1137 1138 static void 1139 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1140 struct svm_range *pchild, enum svm_work_list_ops op) 1141 { 1142 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1143 pchild, pchild->start, pchild->last, prange, op); 1144 1145 pchild->work_item.mm = mm; 1146 pchild->work_item.op = op; 1147 list_add_tail(&pchild->child_list, &prange->child_list); 1148 } 1149 1150 static bool 1151 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1152 { 1153 return (node_a->adev == node_b->adev || 1154 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1155 } 1156 1157 static uint64_t 1158 svm_range_get_pte_flags(struct kfd_node *node, 1159 struct svm_range *prange, int domain) 1160 { 1161 struct kfd_node *bo_node; 1162 uint32_t flags = prange->flags; 1163 uint32_t mapping_flags = 0; 1164 uint64_t pte_flags; 1165 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1166 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1167 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1168 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1169 unsigned int mtype_local; 1170 1171 if (domain == SVM_RANGE_VRAM_DOMAIN) 1172 bo_node = prange->svm_bo->node; 1173 1174 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1175 case IP_VERSION(9, 4, 1): 1176 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1177 if (bo_node == node) { 1178 mapping_flags |= coherent ? 1179 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1180 } else { 1181 mapping_flags |= coherent ? 1182 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1183 if (svm_nodes_in_same_hive(node, bo_node)) 1184 snoop = true; 1185 } 1186 } else { 1187 mapping_flags |= coherent ? 1188 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1189 } 1190 break; 1191 case IP_VERSION(9, 4, 2): 1192 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1193 if (bo_node == node) { 1194 mapping_flags |= coherent ? 1195 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1196 if (node->adev->gmc.xgmi.connected_to_cpu) 1197 snoop = true; 1198 } else { 1199 mapping_flags |= coherent ? 1200 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1201 if (svm_nodes_in_same_hive(node, bo_node)) 1202 snoop = true; 1203 } 1204 } else { 1205 mapping_flags |= coherent ? 1206 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1207 } 1208 break; 1209 case IP_VERSION(9, 4, 3): 1210 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1211 (amdgpu_mtype_local == 2 || ext_coherent ? 1212 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW); 1213 snoop = true; 1214 if (uncached) { 1215 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1216 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1217 /* local HBM region close to partition */ 1218 if (bo_node->adev == node->adev && 1219 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1220 mapping_flags |= mtype_local; 1221 /* local HBM region far from partition or remote XGMI GPU 1222 * with regular system scope coherence 1223 */ 1224 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1225 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1226 /* PCIe P2P or extended system scope coherence */ 1227 else 1228 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1229 /* system memory accessed by the APU */ 1230 } else if (node->adev->flags & AMD_IS_APU) { 1231 /* On NUMA systems, locality is determined per-page 1232 * in amdgpu_gmc_override_vm_pte_flags 1233 */ 1234 if (num_possible_nodes() <= 1) 1235 mapping_flags |= mtype_local; 1236 else 1237 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1238 /* system memory accessed by the dGPU */ 1239 } else { 1240 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1241 } 1242 break; 1243 default: 1244 mapping_flags |= coherent ? 1245 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1246 } 1247 1248 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1249 1250 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1251 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1252 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1253 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1254 1255 pte_flags = AMDGPU_PTE_VALID; 1256 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1257 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1258 1259 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1260 return pte_flags; 1261 } 1262 1263 static int 1264 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1265 uint64_t start, uint64_t last, 1266 struct dma_fence **fence) 1267 { 1268 uint64_t init_pte_value = 0; 1269 1270 pr_debug("[0x%llx 0x%llx]\n", start, last); 1271 1272 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1273 last, init_pte_value, 0, 0, NULL, NULL, 1274 fence); 1275 } 1276 1277 static int 1278 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1279 unsigned long last, uint32_t trigger) 1280 { 1281 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1282 struct kfd_process_device *pdd; 1283 struct dma_fence *fence = NULL; 1284 struct kfd_process *p; 1285 uint32_t gpuidx; 1286 int r = 0; 1287 1288 if (!prange->mapped_to_gpu) { 1289 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1290 prange, prange->start, prange->last); 1291 return 0; 1292 } 1293 1294 if (prange->start == start && prange->last == last) { 1295 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1296 prange->mapped_to_gpu = false; 1297 } 1298 1299 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1300 MAX_GPU_INSTANCE); 1301 p = container_of(prange->svms, struct kfd_process, svms); 1302 1303 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1304 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1305 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1306 if (!pdd) { 1307 pr_debug("failed to find device idx %d\n", gpuidx); 1308 return -EINVAL; 1309 } 1310 1311 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1312 start, last, trigger); 1313 1314 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1315 drm_priv_to_vm(pdd->drm_priv), 1316 start, last, &fence); 1317 if (r) 1318 break; 1319 1320 if (fence) { 1321 r = dma_fence_wait(fence, false); 1322 dma_fence_put(fence); 1323 fence = NULL; 1324 if (r) 1325 break; 1326 } 1327 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1328 } 1329 1330 return r; 1331 } 1332 1333 static int 1334 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1335 unsigned long offset, unsigned long npages, bool readonly, 1336 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1337 struct dma_fence **fence, bool flush_tlb) 1338 { 1339 struct amdgpu_device *adev = pdd->dev->adev; 1340 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1341 uint64_t pte_flags; 1342 unsigned long last_start; 1343 int last_domain; 1344 int r = 0; 1345 int64_t i, j; 1346 1347 last_start = prange->start + offset; 1348 1349 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1350 last_start, last_start + npages - 1, readonly); 1351 1352 for (i = offset; i < offset + npages; i++) { 1353 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1354 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1355 1356 /* Collect all pages in the same address range and memory domain 1357 * that can be mapped with a single call to update mapping. 1358 */ 1359 if (i < offset + npages - 1 && 1360 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1361 continue; 1362 1363 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1364 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1365 1366 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1367 if (readonly) 1368 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1369 1370 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1371 prange->svms, last_start, prange->start + i, 1372 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1373 pte_flags); 1374 1375 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1376 * different memory partition based on fpfn/lpfn, we should use 1377 * same vm_manager.vram_base_offset regardless memory partition. 1378 */ 1379 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1380 last_start, prange->start + i, 1381 pte_flags, 1382 (last_start - prange->start) << PAGE_SHIFT, 1383 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1384 NULL, dma_addr, &vm->last_update); 1385 1386 for (j = last_start - prange->start; j <= i; j++) 1387 dma_addr[j] |= last_domain; 1388 1389 if (r) { 1390 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1391 goto out; 1392 } 1393 last_start = prange->start + i + 1; 1394 } 1395 1396 r = amdgpu_vm_update_pdes(adev, vm, false); 1397 if (r) { 1398 pr_debug("failed %d to update directories 0x%lx\n", r, 1399 prange->start); 1400 goto out; 1401 } 1402 1403 if (fence) 1404 *fence = dma_fence_get(vm->last_update); 1405 1406 out: 1407 return r; 1408 } 1409 1410 static int 1411 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1412 unsigned long npages, bool readonly, 1413 unsigned long *bitmap, bool wait, bool flush_tlb) 1414 { 1415 struct kfd_process_device *pdd; 1416 struct amdgpu_device *bo_adev = NULL; 1417 struct kfd_process *p; 1418 struct dma_fence *fence = NULL; 1419 uint32_t gpuidx; 1420 int r = 0; 1421 1422 if (prange->svm_bo && prange->ttm_res) 1423 bo_adev = prange->svm_bo->node->adev; 1424 1425 p = container_of(prange->svms, struct kfd_process, svms); 1426 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1427 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1428 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1429 if (!pdd) { 1430 pr_debug("failed to find device idx %d\n", gpuidx); 1431 return -EINVAL; 1432 } 1433 1434 pdd = kfd_bind_process_to_device(pdd->dev, p); 1435 if (IS_ERR(pdd)) 1436 return -EINVAL; 1437 1438 if (bo_adev && pdd->dev->adev != bo_adev && 1439 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1440 pr_debug("cannot map to device idx %d\n", gpuidx); 1441 continue; 1442 } 1443 1444 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1445 prange->dma_addr[gpuidx], 1446 bo_adev, wait ? &fence : NULL, 1447 flush_tlb); 1448 if (r) 1449 break; 1450 1451 if (fence) { 1452 r = dma_fence_wait(fence, false); 1453 dma_fence_put(fence); 1454 fence = NULL; 1455 if (r) { 1456 pr_debug("failed %d to dma fence wait\n", r); 1457 break; 1458 } 1459 } 1460 1461 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1462 } 1463 1464 return r; 1465 } 1466 1467 struct svm_validate_context { 1468 struct kfd_process *process; 1469 struct svm_range *prange; 1470 bool intr; 1471 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1472 struct drm_exec exec; 1473 }; 1474 1475 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1476 { 1477 struct kfd_process_device *pdd; 1478 struct amdgpu_vm *vm; 1479 uint32_t gpuidx; 1480 int r; 1481 1482 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1483 drm_exec_until_all_locked(&ctx->exec) { 1484 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1485 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1486 if (!pdd) { 1487 pr_debug("failed to find device idx %d\n", gpuidx); 1488 r = -EINVAL; 1489 goto unreserve_out; 1490 } 1491 vm = drm_priv_to_vm(pdd->drm_priv); 1492 1493 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1494 drm_exec_retry_on_contention(&ctx->exec); 1495 if (unlikely(r)) { 1496 pr_debug("failed %d to reserve bo\n", r); 1497 goto unreserve_out; 1498 } 1499 } 1500 } 1501 1502 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1503 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1504 if (!pdd) { 1505 pr_debug("failed to find device idx %d\n", gpuidx); 1506 r = -EINVAL; 1507 goto unreserve_out; 1508 } 1509 1510 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1511 drm_priv_to_vm(pdd->drm_priv), 1512 svm_range_bo_validate, NULL); 1513 if (r) { 1514 pr_debug("failed %d validate pt bos\n", r); 1515 goto unreserve_out; 1516 } 1517 } 1518 1519 return 0; 1520 1521 unreserve_out: 1522 drm_exec_fini(&ctx->exec); 1523 return r; 1524 } 1525 1526 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1527 { 1528 drm_exec_fini(&ctx->exec); 1529 } 1530 1531 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1532 { 1533 struct kfd_process_device *pdd; 1534 1535 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1536 if (!pdd) 1537 return NULL; 1538 1539 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1540 } 1541 1542 /* 1543 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1544 * 1545 * To prevent concurrent destruction or change of range attributes, the 1546 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1547 * because that would block concurrent evictions and lead to deadlocks. To 1548 * serialize concurrent migrations or validations of the same range, the 1549 * prange->migrate_mutex must be held. 1550 * 1551 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1552 * eviction fence. 1553 * 1554 * The following sequence ensures race-free validation and GPU mapping: 1555 * 1556 * 1. Reserve page table (and SVM BO if range is in VRAM) 1557 * 2. hmm_range_fault to get page addresses (if system memory) 1558 * 3. DMA-map pages (if system memory) 1559 * 4-a. Take notifier lock 1560 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1561 * 4-c. Check that the range was not split or otherwise invalidated 1562 * 4-d. Update GPU page table 1563 * 4.e. Release notifier lock 1564 * 5. Release page table (and SVM BO) reservation 1565 */ 1566 static int svm_range_validate_and_map(struct mm_struct *mm, 1567 struct svm_range *prange, int32_t gpuidx, 1568 bool intr, bool wait, bool flush_tlb) 1569 { 1570 struct svm_validate_context *ctx; 1571 unsigned long start, end, addr; 1572 struct kfd_process *p; 1573 uint64_t vram_pages; 1574 void *owner; 1575 int32_t idx; 1576 int r = 0; 1577 1578 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1579 if (!ctx) 1580 return -ENOMEM; 1581 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1582 ctx->prange = prange; 1583 ctx->intr = intr; 1584 1585 if (gpuidx < MAX_GPU_INSTANCE) { 1586 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1587 bitmap_set(ctx->bitmap, gpuidx, 1); 1588 } else if (ctx->process->xnack_enabled) { 1589 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1590 1591 /* If prefetch range to GPU, or GPU retry fault migrate range to 1592 * GPU, which has ACCESS attribute to the range, create mapping 1593 * on that GPU. 1594 */ 1595 if (prange->actual_loc) { 1596 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1597 prange->actual_loc); 1598 if (gpuidx < 0) { 1599 WARN_ONCE(1, "failed get device by id 0x%x\n", 1600 prange->actual_loc); 1601 r = -EINVAL; 1602 goto free_ctx; 1603 } 1604 if (test_bit(gpuidx, prange->bitmap_access)) 1605 bitmap_set(ctx->bitmap, gpuidx, 1); 1606 } 1607 } else { 1608 bitmap_or(ctx->bitmap, prange->bitmap_access, 1609 prange->bitmap_aip, MAX_GPU_INSTANCE); 1610 } 1611 1612 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1613 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1614 if (!prange->mapped_to_gpu || 1615 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1616 r = 0; 1617 goto free_ctx; 1618 } 1619 } 1620 1621 if (prange->actual_loc && !prange->ttm_res) { 1622 /* This should never happen. actual_loc gets set by 1623 * svm_migrate_ram_to_vram after allocating a BO. 1624 */ 1625 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1626 r = -EINVAL; 1627 goto free_ctx; 1628 } 1629 1630 svm_range_reserve_bos(ctx, intr); 1631 1632 p = container_of(prange->svms, struct kfd_process, svms); 1633 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1634 MAX_GPU_INSTANCE)); 1635 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1636 if (kfd_svm_page_owner(p, idx) != owner) { 1637 owner = NULL; 1638 break; 1639 } 1640 } 1641 1642 vram_pages = 0; 1643 start = prange->start << PAGE_SHIFT; 1644 end = (prange->last + 1) << PAGE_SHIFT; 1645 for (addr = start; !r && addr < end; ) { 1646 struct hmm_range *hmm_range; 1647 struct vm_area_struct *vma; 1648 uint64_t vram_pages_vma; 1649 unsigned long next = 0; 1650 unsigned long offset; 1651 unsigned long npages; 1652 bool readonly; 1653 1654 vma = vma_lookup(mm, addr); 1655 if (vma) { 1656 readonly = !(vma->vm_flags & VM_WRITE); 1657 1658 next = min(vma->vm_end, end); 1659 npages = (next - addr) >> PAGE_SHIFT; 1660 WRITE_ONCE(p->svms.faulting_task, current); 1661 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1662 readonly, owner, NULL, 1663 &hmm_range); 1664 WRITE_ONCE(p->svms.faulting_task, NULL); 1665 if (r) { 1666 pr_debug("failed %d to get svm range pages\n", r); 1667 if (r == -EBUSY) 1668 r = -EAGAIN; 1669 } 1670 } else { 1671 r = -EFAULT; 1672 } 1673 1674 if (!r) { 1675 offset = (addr - start) >> PAGE_SHIFT; 1676 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1677 hmm_range->hmm_pfns, &vram_pages_vma); 1678 if (r) 1679 pr_debug("failed %d to dma map range\n", r); 1680 else 1681 vram_pages += vram_pages_vma; 1682 } 1683 1684 svm_range_lock(prange); 1685 if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) { 1686 pr_debug("hmm update the range, need validate again\n"); 1687 r = -EAGAIN; 1688 } 1689 1690 if (!r && !list_empty(&prange->child_list)) { 1691 pr_debug("range split by unmap in parallel, validate again\n"); 1692 r = -EAGAIN; 1693 } 1694 1695 if (!r) 1696 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1697 ctx->bitmap, wait, flush_tlb); 1698 1699 if (!r && next == end) 1700 prange->mapped_to_gpu = true; 1701 1702 svm_range_unlock(prange); 1703 1704 addr = next; 1705 } 1706 1707 if (addr == end) { 1708 prange->vram_pages = vram_pages; 1709 1710 /* if prange does not include any vram page and it 1711 * has not released svm_bo drop its svm_bo reference 1712 * and set its actaul_loc to sys ram 1713 */ 1714 if (!vram_pages && prange->ttm_res) { 1715 prange->actual_loc = 0; 1716 svm_range_vram_node_free(prange); 1717 } 1718 } 1719 1720 svm_range_unreserve_bos(ctx); 1721 if (!r) 1722 prange->validate_timestamp = ktime_get_boottime(); 1723 1724 free_ctx: 1725 kfree(ctx); 1726 1727 return r; 1728 } 1729 1730 /** 1731 * svm_range_list_lock_and_flush_work - flush pending deferred work 1732 * 1733 * @svms: the svm range list 1734 * @mm: the mm structure 1735 * 1736 * Context: Returns with mmap write lock held, pending deferred work flushed 1737 * 1738 */ 1739 void 1740 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1741 struct mm_struct *mm) 1742 { 1743 retry_flush_work: 1744 flush_work(&svms->deferred_list_work); 1745 mmap_write_lock(mm); 1746 1747 if (list_empty(&svms->deferred_range_list)) 1748 return; 1749 mmap_write_unlock(mm); 1750 pr_debug("retry flush\n"); 1751 goto retry_flush_work; 1752 } 1753 1754 static void svm_range_restore_work(struct work_struct *work) 1755 { 1756 struct delayed_work *dwork = to_delayed_work(work); 1757 struct amdkfd_process_info *process_info; 1758 struct svm_range_list *svms; 1759 struct svm_range *prange; 1760 struct kfd_process *p; 1761 struct mm_struct *mm; 1762 int evicted_ranges; 1763 int invalid; 1764 int r; 1765 1766 svms = container_of(dwork, struct svm_range_list, restore_work); 1767 evicted_ranges = atomic_read(&svms->evicted_ranges); 1768 if (!evicted_ranges) 1769 return; 1770 1771 pr_debug("restore svm ranges\n"); 1772 1773 p = container_of(svms, struct kfd_process, svms); 1774 process_info = p->kgd_process_info; 1775 1776 /* Keep mm reference when svm_range_validate_and_map ranges */ 1777 mm = get_task_mm(p->lead_thread); 1778 if (!mm) { 1779 pr_debug("svms 0x%p process mm gone\n", svms); 1780 return; 1781 } 1782 1783 mutex_lock(&process_info->lock); 1784 svm_range_list_lock_and_flush_work(svms, mm); 1785 mutex_lock(&svms->lock); 1786 1787 evicted_ranges = atomic_read(&svms->evicted_ranges); 1788 1789 list_for_each_entry(prange, &svms->list, list) { 1790 invalid = atomic_read(&prange->invalid); 1791 if (!invalid) 1792 continue; 1793 1794 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1795 prange->svms, prange, prange->start, prange->last, 1796 invalid); 1797 1798 /* 1799 * If range is migrating, wait for migration is done. 1800 */ 1801 mutex_lock(&prange->migrate_mutex); 1802 1803 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1804 false, true, false); 1805 if (r) 1806 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1807 prange->start); 1808 1809 mutex_unlock(&prange->migrate_mutex); 1810 if (r) 1811 goto out_reschedule; 1812 1813 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1814 goto out_reschedule; 1815 } 1816 1817 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1818 evicted_ranges) 1819 goto out_reschedule; 1820 1821 evicted_ranges = 0; 1822 1823 r = kgd2kfd_resume_mm(mm); 1824 if (r) { 1825 /* No recovery from this failure. Probably the CP is 1826 * hanging. No point trying again. 1827 */ 1828 pr_debug("failed %d to resume KFD\n", r); 1829 } 1830 1831 pr_debug("restore svm ranges successfully\n"); 1832 1833 out_reschedule: 1834 mutex_unlock(&svms->lock); 1835 mmap_write_unlock(mm); 1836 mutex_unlock(&process_info->lock); 1837 1838 /* If validation failed, reschedule another attempt */ 1839 if (evicted_ranges) { 1840 pr_debug("reschedule to restore svm range\n"); 1841 schedule_delayed_work(&svms->restore_work, 1842 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1843 1844 kfd_smi_event_queue_restore_rescheduled(mm); 1845 } 1846 mmput(mm); 1847 } 1848 1849 /** 1850 * svm_range_evict - evict svm range 1851 * @prange: svm range structure 1852 * @mm: current process mm_struct 1853 * @start: starting process queue number 1854 * @last: last process queue number 1855 * @event: mmu notifier event when range is evicted or migrated 1856 * 1857 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1858 * return to let CPU evict the buffer and proceed CPU pagetable update. 1859 * 1860 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1861 * If invalidation happens while restore work is running, restore work will 1862 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1863 * the queues. 1864 */ 1865 static int 1866 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1867 unsigned long start, unsigned long last, 1868 enum mmu_notifier_event event) 1869 { 1870 struct svm_range_list *svms = prange->svms; 1871 struct svm_range *pchild; 1872 struct kfd_process *p; 1873 int r = 0; 1874 1875 p = container_of(svms, struct kfd_process, svms); 1876 1877 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1878 svms, prange->start, prange->last, start, last); 1879 1880 if (!p->xnack_enabled || 1881 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1882 int evicted_ranges; 1883 bool mapped = prange->mapped_to_gpu; 1884 1885 list_for_each_entry(pchild, &prange->child_list, child_list) { 1886 if (!pchild->mapped_to_gpu) 1887 continue; 1888 mapped = true; 1889 mutex_lock_nested(&pchild->lock, 1); 1890 if (pchild->start <= last && pchild->last >= start) { 1891 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1892 pchild->start, pchild->last); 1893 atomic_inc(&pchild->invalid); 1894 } 1895 mutex_unlock(&pchild->lock); 1896 } 1897 1898 if (!mapped) 1899 return r; 1900 1901 if (prange->start <= last && prange->last >= start) 1902 atomic_inc(&prange->invalid); 1903 1904 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1905 if (evicted_ranges != 1) 1906 return r; 1907 1908 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1909 prange->svms, prange->start, prange->last); 1910 1911 /* First eviction, stop the queues */ 1912 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1913 if (r) 1914 pr_debug("failed to quiesce KFD\n"); 1915 1916 pr_debug("schedule to restore svm %p ranges\n", svms); 1917 schedule_delayed_work(&svms->restore_work, 1918 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1919 } else { 1920 unsigned long s, l; 1921 uint32_t trigger; 1922 1923 if (event == MMU_NOTIFY_MIGRATE) 1924 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1925 else 1926 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1927 1928 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1929 prange->svms, start, last); 1930 list_for_each_entry(pchild, &prange->child_list, child_list) { 1931 mutex_lock_nested(&pchild->lock, 1); 1932 s = max(start, pchild->start); 1933 l = min(last, pchild->last); 1934 if (l >= s) 1935 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1936 mutex_unlock(&pchild->lock); 1937 } 1938 s = max(start, prange->start); 1939 l = min(last, prange->last); 1940 if (l >= s) 1941 svm_range_unmap_from_gpus(prange, s, l, trigger); 1942 } 1943 1944 return r; 1945 } 1946 1947 static struct svm_range *svm_range_clone(struct svm_range *old) 1948 { 1949 struct svm_range *new; 1950 1951 new = svm_range_new(old->svms, old->start, old->last, false); 1952 if (!new) 1953 return NULL; 1954 if (svm_range_copy_dma_addrs(new, old)) { 1955 svm_range_free(new, false); 1956 return NULL; 1957 } 1958 if (old->svm_bo) { 1959 new->ttm_res = old->ttm_res; 1960 new->offset = old->offset; 1961 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1962 spin_lock(&new->svm_bo->list_lock); 1963 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1964 spin_unlock(&new->svm_bo->list_lock); 1965 } 1966 new->flags = old->flags; 1967 new->preferred_loc = old->preferred_loc; 1968 new->prefetch_loc = old->prefetch_loc; 1969 new->actual_loc = old->actual_loc; 1970 new->granularity = old->granularity; 1971 new->mapped_to_gpu = old->mapped_to_gpu; 1972 new->vram_pages = old->vram_pages; 1973 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1974 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1975 1976 return new; 1977 } 1978 1979 void svm_range_set_max_pages(struct amdgpu_device *adev) 1980 { 1981 uint64_t max_pages; 1982 uint64_t pages, _pages; 1983 uint64_t min_pages = 0; 1984 int i, id; 1985 1986 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 1987 if (adev->kfd.dev->nodes[i]->xcp) 1988 id = adev->kfd.dev->nodes[i]->xcp->id; 1989 else 1990 id = -1; 1991 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 1992 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 1993 pages = rounddown_pow_of_two(pages); 1994 min_pages = min_not_zero(min_pages, pages); 1995 } 1996 1997 do { 1998 max_pages = READ_ONCE(max_svm_range_pages); 1999 _pages = min_not_zero(max_pages, min_pages); 2000 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2001 } 2002 2003 static int 2004 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2005 uint64_t max_pages, struct list_head *insert_list, 2006 struct list_head *update_list) 2007 { 2008 struct svm_range *prange; 2009 uint64_t l; 2010 2011 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2012 max_pages, start, last); 2013 2014 while (last >= start) { 2015 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2016 2017 prange = svm_range_new(svms, start, l, true); 2018 if (!prange) 2019 return -ENOMEM; 2020 list_add(&prange->list, insert_list); 2021 list_add(&prange->update_list, update_list); 2022 2023 start = l + 1; 2024 } 2025 return 0; 2026 } 2027 2028 /** 2029 * svm_range_add - add svm range and handle overlap 2030 * @p: the range add to this process svms 2031 * @start: page size aligned 2032 * @size: page size aligned 2033 * @nattr: number of attributes 2034 * @attrs: array of attributes 2035 * @update_list: output, the ranges need validate and update GPU mapping 2036 * @insert_list: output, the ranges need insert to svms 2037 * @remove_list: output, the ranges are replaced and need remove from svms 2038 * @remap_list: output, remap unaligned svm ranges 2039 * 2040 * Check if the virtual address range has overlap with any existing ranges, 2041 * split partly overlapping ranges and add new ranges in the gaps. All changes 2042 * should be applied to the range_list and interval tree transactionally. If 2043 * any range split or allocation fails, the entire update fails. Therefore any 2044 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2045 * unchanged. 2046 * 2047 * If the transaction succeeds, the caller can update and insert clones and 2048 * new ranges, then free the originals. 2049 * 2050 * Otherwise the caller can free the clones and new ranges, while the old 2051 * svm_ranges remain unchanged. 2052 * 2053 * Context: Process context, caller must hold svms->lock 2054 * 2055 * Return: 2056 * 0 - OK, otherwise error code 2057 */ 2058 static int 2059 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2060 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2061 struct list_head *update_list, struct list_head *insert_list, 2062 struct list_head *remove_list, struct list_head *remap_list) 2063 { 2064 unsigned long last = start + size - 1UL; 2065 struct svm_range_list *svms = &p->svms; 2066 struct interval_tree_node *node; 2067 struct svm_range *prange; 2068 struct svm_range *tmp; 2069 struct list_head new_list; 2070 int r = 0; 2071 2072 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2073 2074 INIT_LIST_HEAD(update_list); 2075 INIT_LIST_HEAD(insert_list); 2076 INIT_LIST_HEAD(remove_list); 2077 INIT_LIST_HEAD(&new_list); 2078 INIT_LIST_HEAD(remap_list); 2079 2080 node = interval_tree_iter_first(&svms->objects, start, last); 2081 while (node) { 2082 struct interval_tree_node *next; 2083 unsigned long next_start; 2084 2085 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2086 node->last); 2087 2088 prange = container_of(node, struct svm_range, it_node); 2089 next = interval_tree_iter_next(node, start, last); 2090 next_start = min(node->last, last) + 1; 2091 2092 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2093 prange->mapped_to_gpu) { 2094 /* nothing to do */ 2095 } else if (node->start < start || node->last > last) { 2096 /* node intersects the update range and its attributes 2097 * will change. Clone and split it, apply updates only 2098 * to the overlapping part 2099 */ 2100 struct svm_range *old = prange; 2101 2102 prange = svm_range_clone(old); 2103 if (!prange) { 2104 r = -ENOMEM; 2105 goto out; 2106 } 2107 2108 list_add(&old->update_list, remove_list); 2109 list_add(&prange->list, insert_list); 2110 list_add(&prange->update_list, update_list); 2111 2112 if (node->start < start) { 2113 pr_debug("change old range start\n"); 2114 r = svm_range_split_head(prange, start, 2115 insert_list, remap_list); 2116 if (r) 2117 goto out; 2118 } 2119 if (node->last > last) { 2120 pr_debug("change old range last\n"); 2121 r = svm_range_split_tail(prange, last, 2122 insert_list, remap_list); 2123 if (r) 2124 goto out; 2125 } 2126 } else { 2127 /* The node is contained within start..last, 2128 * just update it 2129 */ 2130 list_add(&prange->update_list, update_list); 2131 } 2132 2133 /* insert a new node if needed */ 2134 if (node->start > start) { 2135 r = svm_range_split_new(svms, start, node->start - 1, 2136 READ_ONCE(max_svm_range_pages), 2137 &new_list, update_list); 2138 if (r) 2139 goto out; 2140 } 2141 2142 node = next; 2143 start = next_start; 2144 } 2145 2146 /* add a final range at the end if needed */ 2147 if (start <= last) 2148 r = svm_range_split_new(svms, start, last, 2149 READ_ONCE(max_svm_range_pages), 2150 &new_list, update_list); 2151 2152 out: 2153 if (r) { 2154 list_for_each_entry_safe(prange, tmp, insert_list, list) 2155 svm_range_free(prange, false); 2156 list_for_each_entry_safe(prange, tmp, &new_list, list) 2157 svm_range_free(prange, true); 2158 } else { 2159 list_splice(&new_list, insert_list); 2160 } 2161 2162 return r; 2163 } 2164 2165 static void 2166 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2167 struct svm_range *prange) 2168 { 2169 unsigned long start; 2170 unsigned long last; 2171 2172 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2173 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2174 2175 if (prange->start == start && prange->last == last) 2176 return; 2177 2178 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2179 prange->svms, prange, start, last, prange->start, 2180 prange->last); 2181 2182 if (start != 0 && last != 0) { 2183 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2184 svm_range_remove_notifier(prange); 2185 } 2186 prange->it_node.start = prange->start; 2187 prange->it_node.last = prange->last; 2188 2189 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2190 svm_range_add_notifier_locked(mm, prange); 2191 } 2192 2193 static void 2194 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2195 struct mm_struct *mm) 2196 { 2197 switch (prange->work_item.op) { 2198 case SVM_OP_NULL: 2199 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2200 svms, prange, prange->start, prange->last); 2201 break; 2202 case SVM_OP_UNMAP_RANGE: 2203 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2204 svms, prange, prange->start, prange->last); 2205 svm_range_unlink(prange); 2206 svm_range_remove_notifier(prange); 2207 svm_range_free(prange, true); 2208 break; 2209 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2210 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2211 svms, prange, prange->start, prange->last); 2212 svm_range_update_notifier_and_interval_tree(mm, prange); 2213 break; 2214 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2215 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2216 svms, prange, prange->start, prange->last); 2217 svm_range_update_notifier_and_interval_tree(mm, prange); 2218 /* TODO: implement deferred validation and mapping */ 2219 break; 2220 case SVM_OP_ADD_RANGE: 2221 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2222 prange->start, prange->last); 2223 svm_range_add_to_svms(prange); 2224 svm_range_add_notifier_locked(mm, prange); 2225 break; 2226 case SVM_OP_ADD_RANGE_AND_MAP: 2227 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2228 prange, prange->start, prange->last); 2229 svm_range_add_to_svms(prange); 2230 svm_range_add_notifier_locked(mm, prange); 2231 /* TODO: implement deferred validation and mapping */ 2232 break; 2233 default: 2234 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2235 prange->work_item.op); 2236 } 2237 } 2238 2239 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2240 { 2241 struct kfd_process_device *pdd; 2242 struct kfd_process *p; 2243 int drain; 2244 uint32_t i; 2245 2246 p = container_of(svms, struct kfd_process, svms); 2247 2248 restart: 2249 drain = atomic_read(&svms->drain_pagefaults); 2250 if (!drain) 2251 return; 2252 2253 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2254 pdd = p->pdds[i]; 2255 if (!pdd) 2256 continue; 2257 2258 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2259 2260 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2261 pdd->dev->adev->irq.retry_cam_enabled ? 2262 &pdd->dev->adev->irq.ih : 2263 &pdd->dev->adev->irq.ih1); 2264 2265 if (pdd->dev->adev->irq.retry_cam_enabled) 2266 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2267 &pdd->dev->adev->irq.ih_soft); 2268 2269 2270 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2271 } 2272 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2273 goto restart; 2274 } 2275 2276 static void svm_range_deferred_list_work(struct work_struct *work) 2277 { 2278 struct svm_range_list *svms; 2279 struct svm_range *prange; 2280 struct mm_struct *mm; 2281 2282 svms = container_of(work, struct svm_range_list, deferred_list_work); 2283 pr_debug("enter svms 0x%p\n", svms); 2284 2285 spin_lock(&svms->deferred_list_lock); 2286 while (!list_empty(&svms->deferred_range_list)) { 2287 prange = list_first_entry(&svms->deferred_range_list, 2288 struct svm_range, deferred_list); 2289 spin_unlock(&svms->deferred_list_lock); 2290 2291 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2292 prange->start, prange->last, prange->work_item.op); 2293 2294 mm = prange->work_item.mm; 2295 retry: 2296 mmap_write_lock(mm); 2297 2298 /* Checking for the need to drain retry faults must be inside 2299 * mmap write lock to serialize with munmap notifiers. 2300 */ 2301 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2302 mmap_write_unlock(mm); 2303 svm_range_drain_retry_fault(svms); 2304 goto retry; 2305 } 2306 2307 /* Remove from deferred_list must be inside mmap write lock, for 2308 * two race cases: 2309 * 1. unmap_from_cpu may change work_item.op and add the range 2310 * to deferred_list again, cause use after free bug. 2311 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2312 * lock and continue because deferred_list is empty, but 2313 * deferred_list work is actually waiting for mmap lock. 2314 */ 2315 spin_lock(&svms->deferred_list_lock); 2316 list_del_init(&prange->deferred_list); 2317 spin_unlock(&svms->deferred_list_lock); 2318 2319 mutex_lock(&svms->lock); 2320 mutex_lock(&prange->migrate_mutex); 2321 while (!list_empty(&prange->child_list)) { 2322 struct svm_range *pchild; 2323 2324 pchild = list_first_entry(&prange->child_list, 2325 struct svm_range, child_list); 2326 pr_debug("child prange 0x%p op %d\n", pchild, 2327 pchild->work_item.op); 2328 list_del_init(&pchild->child_list); 2329 svm_range_handle_list_op(svms, pchild, mm); 2330 } 2331 mutex_unlock(&prange->migrate_mutex); 2332 2333 svm_range_handle_list_op(svms, prange, mm); 2334 mutex_unlock(&svms->lock); 2335 mmap_write_unlock(mm); 2336 2337 /* Pairs with mmget in svm_range_add_list_work */ 2338 mmput(mm); 2339 2340 spin_lock(&svms->deferred_list_lock); 2341 } 2342 spin_unlock(&svms->deferred_list_lock); 2343 pr_debug("exit svms 0x%p\n", svms); 2344 } 2345 2346 void 2347 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2348 struct mm_struct *mm, enum svm_work_list_ops op) 2349 { 2350 spin_lock(&svms->deferred_list_lock); 2351 /* if prange is on the deferred list */ 2352 if (!list_empty(&prange->deferred_list)) { 2353 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2354 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2355 if (op != SVM_OP_NULL && 2356 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2357 prange->work_item.op = op; 2358 } else { 2359 prange->work_item.op = op; 2360 2361 /* Pairs with mmput in deferred_list_work */ 2362 mmget(mm); 2363 prange->work_item.mm = mm; 2364 list_add_tail(&prange->deferred_list, 2365 &prange->svms->deferred_range_list); 2366 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2367 prange, prange->start, prange->last, op); 2368 } 2369 spin_unlock(&svms->deferred_list_lock); 2370 } 2371 2372 void schedule_deferred_list_work(struct svm_range_list *svms) 2373 { 2374 spin_lock(&svms->deferred_list_lock); 2375 if (!list_empty(&svms->deferred_range_list)) 2376 schedule_work(&svms->deferred_list_work); 2377 spin_unlock(&svms->deferred_list_lock); 2378 } 2379 2380 static void 2381 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2382 struct svm_range *prange, unsigned long start, 2383 unsigned long last) 2384 { 2385 struct svm_range *head; 2386 struct svm_range *tail; 2387 2388 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2389 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2390 prange->start, prange->last); 2391 return; 2392 } 2393 if (start > prange->last || last < prange->start) 2394 return; 2395 2396 head = tail = prange; 2397 if (start > prange->start) 2398 svm_range_split(prange, prange->start, start - 1, &tail); 2399 if (last < tail->last) 2400 svm_range_split(tail, last + 1, tail->last, &head); 2401 2402 if (head != prange && tail != prange) { 2403 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2404 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2405 } else if (tail != prange) { 2406 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2407 } else if (head != prange) { 2408 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2409 } else if (parent != prange) { 2410 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2411 } 2412 } 2413 2414 static void 2415 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2416 unsigned long start, unsigned long last) 2417 { 2418 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2419 struct svm_range_list *svms; 2420 struct svm_range *pchild; 2421 struct kfd_process *p; 2422 unsigned long s, l; 2423 bool unmap_parent; 2424 2425 p = kfd_lookup_process_by_mm(mm); 2426 if (!p) 2427 return; 2428 svms = &p->svms; 2429 2430 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2431 prange, prange->start, prange->last, start, last); 2432 2433 /* Make sure pending page faults are drained in the deferred worker 2434 * before the range is freed to avoid straggler interrupts on 2435 * unmapped memory causing "phantom faults". 2436 */ 2437 atomic_inc(&svms->drain_pagefaults); 2438 2439 unmap_parent = start <= prange->start && last >= prange->last; 2440 2441 list_for_each_entry(pchild, &prange->child_list, child_list) { 2442 mutex_lock_nested(&pchild->lock, 1); 2443 s = max(start, pchild->start); 2444 l = min(last, pchild->last); 2445 if (l >= s) 2446 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2447 svm_range_unmap_split(mm, prange, pchild, start, last); 2448 mutex_unlock(&pchild->lock); 2449 } 2450 s = max(start, prange->start); 2451 l = min(last, prange->last); 2452 if (l >= s) 2453 svm_range_unmap_from_gpus(prange, s, l, trigger); 2454 svm_range_unmap_split(mm, prange, prange, start, last); 2455 2456 if (unmap_parent) 2457 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2458 else 2459 svm_range_add_list_work(svms, prange, mm, 2460 SVM_OP_UPDATE_RANGE_NOTIFIER); 2461 schedule_deferred_list_work(svms); 2462 2463 kfd_unref_process(p); 2464 } 2465 2466 /** 2467 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2468 * @mni: mmu_interval_notifier struct 2469 * @range: mmu_notifier_range struct 2470 * @cur_seq: value to pass to mmu_interval_set_seq() 2471 * 2472 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2473 * is from migration, or CPU page invalidation callback. 2474 * 2475 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2476 * work thread, and split prange if only part of prange is unmapped. 2477 * 2478 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2479 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2480 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2481 * update GPU mapping to recover. 2482 * 2483 * Context: mmap lock, notifier_invalidate_start lock are held 2484 * for invalidate event, prange lock is held if this is from migration 2485 */ 2486 static bool 2487 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2488 const struct mmu_notifier_range *range, 2489 unsigned long cur_seq) 2490 { 2491 struct svm_range *prange; 2492 unsigned long start; 2493 unsigned long last; 2494 2495 if (range->event == MMU_NOTIFY_RELEASE) 2496 return true; 2497 if (!mmget_not_zero(mni->mm)) 2498 return true; 2499 2500 start = mni->interval_tree.start; 2501 last = mni->interval_tree.last; 2502 start = max(start, range->start) >> PAGE_SHIFT; 2503 last = min(last, range->end - 1) >> PAGE_SHIFT; 2504 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2505 start, last, range->start >> PAGE_SHIFT, 2506 (range->end - 1) >> PAGE_SHIFT, 2507 mni->interval_tree.start >> PAGE_SHIFT, 2508 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2509 2510 prange = container_of(mni, struct svm_range, notifier); 2511 2512 svm_range_lock(prange); 2513 mmu_interval_set_seq(mni, cur_seq); 2514 2515 switch (range->event) { 2516 case MMU_NOTIFY_UNMAP: 2517 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2518 break; 2519 default: 2520 svm_range_evict(prange, mni->mm, start, last, range->event); 2521 break; 2522 } 2523 2524 svm_range_unlock(prange); 2525 mmput(mni->mm); 2526 2527 return true; 2528 } 2529 2530 /** 2531 * svm_range_from_addr - find svm range from fault address 2532 * @svms: svm range list header 2533 * @addr: address to search range interval tree, in pages 2534 * @parent: parent range if range is on child list 2535 * 2536 * Context: The caller must hold svms->lock 2537 * 2538 * Return: the svm_range found or NULL 2539 */ 2540 struct svm_range * 2541 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2542 struct svm_range **parent) 2543 { 2544 struct interval_tree_node *node; 2545 struct svm_range *prange; 2546 struct svm_range *pchild; 2547 2548 node = interval_tree_iter_first(&svms->objects, addr, addr); 2549 if (!node) 2550 return NULL; 2551 2552 prange = container_of(node, struct svm_range, it_node); 2553 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2554 addr, prange->start, prange->last, node->start, node->last); 2555 2556 if (addr >= prange->start && addr <= prange->last) { 2557 if (parent) 2558 *parent = prange; 2559 return prange; 2560 } 2561 list_for_each_entry(pchild, &prange->child_list, child_list) 2562 if (addr >= pchild->start && addr <= pchild->last) { 2563 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2564 addr, pchild->start, pchild->last); 2565 if (parent) 2566 *parent = prange; 2567 return pchild; 2568 } 2569 2570 return NULL; 2571 } 2572 2573 /* svm_range_best_restore_location - decide the best fault restore location 2574 * @prange: svm range structure 2575 * @adev: the GPU on which vm fault happened 2576 * 2577 * This is only called when xnack is on, to decide the best location to restore 2578 * the range mapping after GPU vm fault. Caller uses the best location to do 2579 * migration if actual loc is not best location, then update GPU page table 2580 * mapping to the best location. 2581 * 2582 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2583 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2584 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2585 * if range actual loc is cpu, best_loc is cpu 2586 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2587 * range actual loc. 2588 * Otherwise, GPU no access, best_loc is -1. 2589 * 2590 * Return: 2591 * -1 means vm fault GPU no access 2592 * 0 for CPU or GPU id 2593 */ 2594 static int32_t 2595 svm_range_best_restore_location(struct svm_range *prange, 2596 struct kfd_node *node, 2597 int32_t *gpuidx) 2598 { 2599 struct kfd_node *bo_node, *preferred_node; 2600 struct kfd_process *p; 2601 uint32_t gpuid; 2602 int r; 2603 2604 p = container_of(prange->svms, struct kfd_process, svms); 2605 2606 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2607 if (r < 0) { 2608 pr_debug("failed to get gpuid from kgd\n"); 2609 return -1; 2610 } 2611 2612 if (node->adev->gmc.is_app_apu) 2613 return 0; 2614 2615 if (prange->preferred_loc == gpuid || 2616 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2617 return prange->preferred_loc; 2618 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2619 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2620 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2621 return prange->preferred_loc; 2622 /* fall through */ 2623 } 2624 2625 if (test_bit(*gpuidx, prange->bitmap_access)) 2626 return gpuid; 2627 2628 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2629 if (!prange->actual_loc) 2630 return 0; 2631 2632 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2633 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2634 return prange->actual_loc; 2635 else 2636 return 0; 2637 } 2638 2639 return -1; 2640 } 2641 2642 static int 2643 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2644 unsigned long *start, unsigned long *last, 2645 bool *is_heap_stack) 2646 { 2647 struct vm_area_struct *vma; 2648 struct interval_tree_node *node; 2649 unsigned long start_limit, end_limit; 2650 2651 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2652 if (!vma) { 2653 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2654 return -EFAULT; 2655 } 2656 2657 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2658 2659 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2660 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2661 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2662 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2663 /* First range that starts after the fault address */ 2664 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2665 if (node) { 2666 end_limit = min(end_limit, node->start); 2667 /* Last range that ends before the fault address */ 2668 node = container_of(rb_prev(&node->rb), 2669 struct interval_tree_node, rb); 2670 } else { 2671 /* Last range must end before addr because 2672 * there was no range after addr 2673 */ 2674 node = container_of(rb_last(&p->svms.objects.rb_root), 2675 struct interval_tree_node, rb); 2676 } 2677 if (node) { 2678 if (node->last >= addr) { 2679 WARN(1, "Overlap with prev node and page fault addr\n"); 2680 return -EFAULT; 2681 } 2682 start_limit = max(start_limit, node->last + 1); 2683 } 2684 2685 *start = start_limit; 2686 *last = end_limit - 1; 2687 2688 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2689 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2690 *start, *last, *is_heap_stack); 2691 2692 return 0; 2693 } 2694 2695 static int 2696 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2697 uint64_t *bo_s, uint64_t *bo_l) 2698 { 2699 struct amdgpu_bo_va_mapping *mapping; 2700 struct interval_tree_node *node; 2701 struct amdgpu_bo *bo = NULL; 2702 unsigned long userptr; 2703 uint32_t i; 2704 int r; 2705 2706 for (i = 0; i < p->n_pdds; i++) { 2707 struct amdgpu_vm *vm; 2708 2709 if (!p->pdds[i]->drm_priv) 2710 continue; 2711 2712 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2713 r = amdgpu_bo_reserve(vm->root.bo, false); 2714 if (r) 2715 return r; 2716 2717 /* Check userptr by searching entire vm->va interval tree */ 2718 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2719 while (node) { 2720 mapping = container_of((struct rb_node *)node, 2721 struct amdgpu_bo_va_mapping, rb); 2722 bo = mapping->bo_va->base.bo; 2723 2724 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2725 start << PAGE_SHIFT, 2726 last << PAGE_SHIFT, 2727 &userptr)) { 2728 node = interval_tree_iter_next(node, 0, ~0ULL); 2729 continue; 2730 } 2731 2732 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2733 start, last); 2734 if (bo_s && bo_l) { 2735 *bo_s = userptr >> PAGE_SHIFT; 2736 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2737 } 2738 amdgpu_bo_unreserve(vm->root.bo); 2739 return -EADDRINUSE; 2740 } 2741 amdgpu_bo_unreserve(vm->root.bo); 2742 } 2743 return 0; 2744 } 2745 2746 static struct 2747 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2748 struct kfd_process *p, 2749 struct mm_struct *mm, 2750 int64_t addr) 2751 { 2752 struct svm_range *prange = NULL; 2753 unsigned long start, last; 2754 uint32_t gpuid, gpuidx; 2755 bool is_heap_stack; 2756 uint64_t bo_s = 0; 2757 uint64_t bo_l = 0; 2758 int r; 2759 2760 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2761 &is_heap_stack)) 2762 return NULL; 2763 2764 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2765 if (r != -EADDRINUSE) 2766 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2767 2768 if (r == -EADDRINUSE) { 2769 if (addr >= bo_s && addr <= bo_l) 2770 return NULL; 2771 2772 /* Create one page svm range if 2MB range overlapping */ 2773 start = addr; 2774 last = addr; 2775 } 2776 2777 prange = svm_range_new(&p->svms, start, last, true); 2778 if (!prange) { 2779 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2780 return NULL; 2781 } 2782 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2783 pr_debug("failed to get gpuid from kgd\n"); 2784 svm_range_free(prange, true); 2785 return NULL; 2786 } 2787 2788 if (is_heap_stack) 2789 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2790 2791 svm_range_add_to_svms(prange); 2792 svm_range_add_notifier_locked(mm, prange); 2793 2794 return prange; 2795 } 2796 2797 /* svm_range_skip_recover - decide if prange can be recovered 2798 * @prange: svm range structure 2799 * 2800 * GPU vm retry fault handle skip recover the range for cases: 2801 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2802 * deferred list work will drain the stale fault before free the prange. 2803 * 2. prange is on deferred list to add interval notifier after split, or 2804 * 3. prange is child range, it is split from parent prange, recover later 2805 * after interval notifier is added. 2806 * 2807 * Return: true to skip recover, false to recover 2808 */ 2809 static bool svm_range_skip_recover(struct svm_range *prange) 2810 { 2811 struct svm_range_list *svms = prange->svms; 2812 2813 spin_lock(&svms->deferred_list_lock); 2814 if (list_empty(&prange->deferred_list) && 2815 list_empty(&prange->child_list)) { 2816 spin_unlock(&svms->deferred_list_lock); 2817 return false; 2818 } 2819 spin_unlock(&svms->deferred_list_lock); 2820 2821 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2822 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2823 svms, prange, prange->start, prange->last); 2824 return true; 2825 } 2826 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2827 prange->work_item.op == SVM_OP_ADD_RANGE) { 2828 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2829 svms, prange, prange->start, prange->last); 2830 return true; 2831 } 2832 return false; 2833 } 2834 2835 static void 2836 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2837 int32_t gpuidx) 2838 { 2839 struct kfd_process_device *pdd; 2840 2841 /* fault is on different page of same range 2842 * or fault is skipped to recover later 2843 * or fault is on invalid virtual address 2844 */ 2845 if (gpuidx == MAX_GPU_INSTANCE) { 2846 uint32_t gpuid; 2847 int r; 2848 2849 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2850 if (r < 0) 2851 return; 2852 } 2853 2854 /* fault is recovered 2855 * or fault cannot recover because GPU no access on the range 2856 */ 2857 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2858 if (pdd) 2859 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2860 } 2861 2862 static bool 2863 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2864 { 2865 unsigned long requested = VM_READ; 2866 2867 if (write_fault) 2868 requested |= VM_WRITE; 2869 2870 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2871 vma->vm_flags); 2872 return (vma->vm_flags & requested) == requested; 2873 } 2874 2875 int 2876 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2877 uint32_t vmid, uint32_t node_id, 2878 uint64_t addr, bool write_fault) 2879 { 2880 unsigned long start, last, size; 2881 struct mm_struct *mm = NULL; 2882 struct svm_range_list *svms; 2883 struct svm_range *prange; 2884 struct kfd_process *p; 2885 ktime_t timestamp = ktime_get_boottime(); 2886 struct kfd_node *node; 2887 int32_t best_loc; 2888 int32_t gpuidx = MAX_GPU_INSTANCE; 2889 bool write_locked = false; 2890 struct vm_area_struct *vma; 2891 bool migration = false; 2892 int r = 0; 2893 2894 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2895 pr_debug("device does not support SVM\n"); 2896 return -EFAULT; 2897 } 2898 2899 p = kfd_lookup_process_by_pasid(pasid); 2900 if (!p) { 2901 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2902 return 0; 2903 } 2904 svms = &p->svms; 2905 2906 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2907 2908 if (atomic_read(&svms->drain_pagefaults)) { 2909 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2910 r = 0; 2911 goto out; 2912 } 2913 2914 if (!p->xnack_enabled) { 2915 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2916 r = -EFAULT; 2917 goto out; 2918 } 2919 2920 /* p->lead_thread is available as kfd_process_wq_release flush the work 2921 * before releasing task ref. 2922 */ 2923 mm = get_task_mm(p->lead_thread); 2924 if (!mm) { 2925 pr_debug("svms 0x%p failed to get mm\n", svms); 2926 r = 0; 2927 goto out; 2928 } 2929 2930 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2931 if (!node) { 2932 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2933 vmid); 2934 r = -EFAULT; 2935 goto out; 2936 } 2937 mmap_read_lock(mm); 2938 retry_write_locked: 2939 mutex_lock(&svms->lock); 2940 prange = svm_range_from_addr(svms, addr, NULL); 2941 if (!prange) { 2942 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2943 svms, addr); 2944 if (!write_locked) { 2945 /* Need the write lock to create new range with MMU notifier. 2946 * Also flush pending deferred work to make sure the interval 2947 * tree is up to date before we add a new range 2948 */ 2949 mutex_unlock(&svms->lock); 2950 mmap_read_unlock(mm); 2951 mmap_write_lock(mm); 2952 write_locked = true; 2953 goto retry_write_locked; 2954 } 2955 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2956 if (!prange) { 2957 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2958 svms, addr); 2959 mmap_write_downgrade(mm); 2960 r = -EFAULT; 2961 goto out_unlock_svms; 2962 } 2963 } 2964 if (write_locked) 2965 mmap_write_downgrade(mm); 2966 2967 mutex_lock(&prange->migrate_mutex); 2968 2969 if (svm_range_skip_recover(prange)) { 2970 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2971 r = 0; 2972 goto out_unlock_range; 2973 } 2974 2975 /* skip duplicate vm fault on different pages of same range */ 2976 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2977 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2978 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2979 svms, prange->start, prange->last); 2980 r = 0; 2981 goto out_unlock_range; 2982 } 2983 2984 /* __do_munmap removed VMA, return success as we are handling stale 2985 * retry fault. 2986 */ 2987 vma = vma_lookup(mm, addr << PAGE_SHIFT); 2988 if (!vma) { 2989 pr_debug("address 0x%llx VMA is removed\n", addr); 2990 r = 0; 2991 goto out_unlock_range; 2992 } 2993 2994 if (!svm_fault_allowed(vma, write_fault)) { 2995 pr_debug("fault addr 0x%llx no %s permission\n", addr, 2996 write_fault ? "write" : "read"); 2997 r = -EPERM; 2998 goto out_unlock_range; 2999 } 3000 3001 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3002 if (best_loc == -1) { 3003 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3004 svms, prange->start, prange->last); 3005 r = -EACCES; 3006 goto out_unlock_range; 3007 } 3008 3009 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3010 svms, prange->start, prange->last, best_loc, 3011 prange->actual_loc); 3012 3013 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3014 write_fault, timestamp); 3015 3016 if (prange->actual_loc != 0 || best_loc != 0) { 3017 migration = true; 3018 /* Align migration range start and size to granularity size */ 3019 size = 1UL << prange->granularity; 3020 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3021 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3022 3023 if (best_loc) { 3024 r = svm_migrate_to_vram(prange, best_loc, start, last, 3025 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3026 if (r) { 3027 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3028 r, addr); 3029 /* Fallback to system memory if migration to 3030 * VRAM failed 3031 */ 3032 if (prange->actual_loc && prange->actual_loc != best_loc) 3033 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3034 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3035 else 3036 r = 0; 3037 } 3038 } else { 3039 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3040 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3041 } 3042 if (r) { 3043 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3044 r, svms, start, last); 3045 goto out_unlock_range; 3046 } 3047 } 3048 3049 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 3050 if (r) 3051 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3052 r, svms, prange->start, prange->last); 3053 3054 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3055 migration); 3056 3057 out_unlock_range: 3058 mutex_unlock(&prange->migrate_mutex); 3059 out_unlock_svms: 3060 mutex_unlock(&svms->lock); 3061 mmap_read_unlock(mm); 3062 3063 svm_range_count_fault(node, p, gpuidx); 3064 3065 mmput(mm); 3066 out: 3067 kfd_unref_process(p); 3068 3069 if (r == -EAGAIN) { 3070 pr_debug("recover vm fault later\n"); 3071 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3072 r = 0; 3073 } 3074 return r; 3075 } 3076 3077 int 3078 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3079 { 3080 struct svm_range *prange, *pchild; 3081 uint64_t reserved_size = 0; 3082 uint64_t size; 3083 int r = 0; 3084 3085 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3086 3087 mutex_lock(&p->svms.lock); 3088 3089 list_for_each_entry(prange, &p->svms.list, list) { 3090 svm_range_lock(prange); 3091 list_for_each_entry(pchild, &prange->child_list, child_list) { 3092 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3093 if (xnack_enabled) { 3094 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3095 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3096 } else { 3097 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3098 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3099 if (r) 3100 goto out_unlock; 3101 reserved_size += size; 3102 } 3103 } 3104 3105 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3106 if (xnack_enabled) { 3107 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3108 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3109 } else { 3110 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3111 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3112 if (r) 3113 goto out_unlock; 3114 reserved_size += size; 3115 } 3116 out_unlock: 3117 svm_range_unlock(prange); 3118 if (r) 3119 break; 3120 } 3121 3122 if (r) 3123 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3124 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3125 else 3126 /* Change xnack mode must be inside svms lock, to avoid race with 3127 * svm_range_deferred_list_work unreserve memory in parallel. 3128 */ 3129 p->xnack_enabled = xnack_enabled; 3130 3131 mutex_unlock(&p->svms.lock); 3132 return r; 3133 } 3134 3135 void svm_range_list_fini(struct kfd_process *p) 3136 { 3137 struct svm_range *prange; 3138 struct svm_range *next; 3139 3140 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3141 3142 cancel_delayed_work_sync(&p->svms.restore_work); 3143 3144 /* Ensure list work is finished before process is destroyed */ 3145 flush_work(&p->svms.deferred_list_work); 3146 3147 /* 3148 * Ensure no retry fault comes in afterwards, as page fault handler will 3149 * not find kfd process and take mm lock to recover fault. 3150 */ 3151 atomic_inc(&p->svms.drain_pagefaults); 3152 svm_range_drain_retry_fault(&p->svms); 3153 3154 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3155 svm_range_unlink(prange); 3156 svm_range_remove_notifier(prange); 3157 svm_range_free(prange, true); 3158 } 3159 3160 mutex_destroy(&p->svms.lock); 3161 3162 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3163 } 3164 3165 int svm_range_list_init(struct kfd_process *p) 3166 { 3167 struct svm_range_list *svms = &p->svms; 3168 int i; 3169 3170 svms->objects = RB_ROOT_CACHED; 3171 mutex_init(&svms->lock); 3172 INIT_LIST_HEAD(&svms->list); 3173 atomic_set(&svms->evicted_ranges, 0); 3174 atomic_set(&svms->drain_pagefaults, 0); 3175 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3176 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3177 INIT_LIST_HEAD(&svms->deferred_range_list); 3178 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3179 spin_lock_init(&svms->deferred_list_lock); 3180 3181 for (i = 0; i < p->n_pdds; i++) 3182 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3183 bitmap_set(svms->bitmap_supported, i, 1); 3184 3185 return 0; 3186 } 3187 3188 /** 3189 * svm_range_check_vm - check if virtual address range mapped already 3190 * @p: current kfd_process 3191 * @start: range start address, in pages 3192 * @last: range last address, in pages 3193 * @bo_s: mapping start address in pages if address range already mapped 3194 * @bo_l: mapping last address in pages if address range already mapped 3195 * 3196 * The purpose is to avoid virtual address ranges already allocated by 3197 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3198 * It looks for each pdd in the kfd_process. 3199 * 3200 * Context: Process context 3201 * 3202 * Return 0 - OK, if the range is not mapped. 3203 * Otherwise error code: 3204 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3205 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3206 * a signal. Release all buffer reservations and return to user-space. 3207 */ 3208 static int 3209 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3210 uint64_t *bo_s, uint64_t *bo_l) 3211 { 3212 struct amdgpu_bo_va_mapping *mapping; 3213 struct interval_tree_node *node; 3214 uint32_t i; 3215 int r; 3216 3217 for (i = 0; i < p->n_pdds; i++) { 3218 struct amdgpu_vm *vm; 3219 3220 if (!p->pdds[i]->drm_priv) 3221 continue; 3222 3223 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3224 r = amdgpu_bo_reserve(vm->root.bo, false); 3225 if (r) 3226 return r; 3227 3228 node = interval_tree_iter_first(&vm->va, start, last); 3229 if (node) { 3230 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3231 start, last); 3232 mapping = container_of((struct rb_node *)node, 3233 struct amdgpu_bo_va_mapping, rb); 3234 if (bo_s && bo_l) { 3235 *bo_s = mapping->start; 3236 *bo_l = mapping->last; 3237 } 3238 amdgpu_bo_unreserve(vm->root.bo); 3239 return -EADDRINUSE; 3240 } 3241 amdgpu_bo_unreserve(vm->root.bo); 3242 } 3243 3244 return 0; 3245 } 3246 3247 /** 3248 * svm_range_is_valid - check if virtual address range is valid 3249 * @p: current kfd_process 3250 * @start: range start address, in pages 3251 * @size: range size, in pages 3252 * 3253 * Valid virtual address range means it belongs to one or more VMAs 3254 * 3255 * Context: Process context 3256 * 3257 * Return: 3258 * 0 - OK, otherwise error code 3259 */ 3260 static int 3261 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3262 { 3263 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3264 struct vm_area_struct *vma; 3265 unsigned long end; 3266 unsigned long start_unchg = start; 3267 3268 start <<= PAGE_SHIFT; 3269 end = start + (size << PAGE_SHIFT); 3270 do { 3271 vma = vma_lookup(p->mm, start); 3272 if (!vma || (vma->vm_flags & device_vma)) 3273 return -EFAULT; 3274 start = min(end, vma->vm_end); 3275 } while (start < end); 3276 3277 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3278 NULL); 3279 } 3280 3281 /** 3282 * svm_range_best_prefetch_location - decide the best prefetch location 3283 * @prange: svm range structure 3284 * 3285 * For xnack off: 3286 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3287 * can be CPU or GPU. 3288 * 3289 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3290 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3291 * the best prefetch location is always CPU, because GPU can not have coherent 3292 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3293 * 3294 * For xnack on: 3295 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3296 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3297 * 3298 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3299 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3300 * prefetch location is always CPU. 3301 * 3302 * Context: Process context 3303 * 3304 * Return: 3305 * 0 for CPU or GPU id 3306 */ 3307 static uint32_t 3308 svm_range_best_prefetch_location(struct svm_range *prange) 3309 { 3310 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3311 uint32_t best_loc = prange->prefetch_loc; 3312 struct kfd_process_device *pdd; 3313 struct kfd_node *bo_node; 3314 struct kfd_process *p; 3315 uint32_t gpuidx; 3316 3317 p = container_of(prange->svms, struct kfd_process, svms); 3318 3319 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3320 goto out; 3321 3322 bo_node = svm_range_get_node_by_id(prange, best_loc); 3323 if (!bo_node) { 3324 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3325 best_loc = 0; 3326 goto out; 3327 } 3328 3329 if (bo_node->adev->gmc.is_app_apu) { 3330 best_loc = 0; 3331 goto out; 3332 } 3333 3334 if (p->xnack_enabled) 3335 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3336 else 3337 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3338 MAX_GPU_INSTANCE); 3339 3340 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3341 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3342 if (!pdd) { 3343 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3344 continue; 3345 } 3346 3347 if (pdd->dev->adev == bo_node->adev) 3348 continue; 3349 3350 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3351 best_loc = 0; 3352 break; 3353 } 3354 } 3355 3356 out: 3357 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3358 p->xnack_enabled, &p->svms, prange->start, prange->last, 3359 best_loc); 3360 3361 return best_loc; 3362 } 3363 3364 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3365 * @mm: current process mm_struct 3366 * @prange: svm range structure 3367 * @migrated: output, true if migration is triggered 3368 * 3369 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3370 * from ram to vram. 3371 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3372 * from vram to ram. 3373 * 3374 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3375 * and restore work: 3376 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3377 * stops all queues, schedule restore work 3378 * 2. svm_range_restore_work wait for migration is done by 3379 * a. svm_range_validate_vram takes prange->migrate_mutex 3380 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3381 * 3. restore work update mappings of GPU, resume all queues. 3382 * 3383 * Context: Process context 3384 * 3385 * Return: 3386 * 0 - OK, otherwise - error code of migration 3387 */ 3388 static int 3389 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3390 bool *migrated) 3391 { 3392 uint32_t best_loc; 3393 int r = 0; 3394 3395 *migrated = false; 3396 best_loc = svm_range_best_prefetch_location(prange); 3397 3398 /* when best_loc is a gpu node and same as prange->actual_loc 3399 * we still need do migration as prange->actual_loc !=0 does 3400 * not mean all pages in prange are vram. hmm migrate will pick 3401 * up right pages during migration. 3402 */ 3403 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3404 (best_loc == 0 && prange->actual_loc == 0)) 3405 return 0; 3406 3407 if (!best_loc) { 3408 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3409 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3410 *migrated = !r; 3411 return r; 3412 } 3413 3414 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3415 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3416 *migrated = !r; 3417 3418 return r; 3419 } 3420 3421 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3422 { 3423 if (!fence) 3424 return -EINVAL; 3425 3426 if (dma_fence_is_signaled(&fence->base)) 3427 return 0; 3428 3429 if (fence->svm_bo) { 3430 WRITE_ONCE(fence->svm_bo->evicting, 1); 3431 schedule_work(&fence->svm_bo->eviction_work); 3432 } 3433 3434 return 0; 3435 } 3436 3437 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3438 { 3439 struct svm_range_bo *svm_bo; 3440 struct mm_struct *mm; 3441 int r = 0; 3442 3443 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3444 if (!svm_bo_ref_unless_zero(svm_bo)) 3445 return; /* svm_bo was freed while eviction was pending */ 3446 3447 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3448 mm = svm_bo->eviction_fence->mm; 3449 } else { 3450 svm_range_bo_unref(svm_bo); 3451 return; 3452 } 3453 3454 mmap_read_lock(mm); 3455 spin_lock(&svm_bo->list_lock); 3456 while (!list_empty(&svm_bo->range_list) && !r) { 3457 struct svm_range *prange = 3458 list_first_entry(&svm_bo->range_list, 3459 struct svm_range, svm_bo_list); 3460 int retries = 3; 3461 3462 list_del_init(&prange->svm_bo_list); 3463 spin_unlock(&svm_bo->list_lock); 3464 3465 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3466 prange->start, prange->last); 3467 3468 mutex_lock(&prange->migrate_mutex); 3469 do { 3470 /* migrate all vram pages in this prange to sys ram 3471 * after that prange->actual_loc should be zero 3472 */ 3473 r = svm_migrate_vram_to_ram(prange, mm, 3474 prange->start, prange->last, 3475 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3476 } while (!r && prange->actual_loc && --retries); 3477 3478 if (!r && prange->actual_loc) 3479 pr_info_once("Migration failed during eviction"); 3480 3481 if (!prange->actual_loc) { 3482 mutex_lock(&prange->lock); 3483 prange->svm_bo = NULL; 3484 mutex_unlock(&prange->lock); 3485 } 3486 mutex_unlock(&prange->migrate_mutex); 3487 3488 spin_lock(&svm_bo->list_lock); 3489 } 3490 spin_unlock(&svm_bo->list_lock); 3491 mmap_read_unlock(mm); 3492 mmput(mm); 3493 3494 dma_fence_signal(&svm_bo->eviction_fence->base); 3495 3496 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3497 * has been called in svm_migrate_vram_to_ram 3498 */ 3499 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3500 svm_range_bo_unref(svm_bo); 3501 } 3502 3503 static int 3504 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3505 uint64_t start, uint64_t size, uint32_t nattr, 3506 struct kfd_ioctl_svm_attribute *attrs) 3507 { 3508 struct amdkfd_process_info *process_info = p->kgd_process_info; 3509 struct list_head update_list; 3510 struct list_head insert_list; 3511 struct list_head remove_list; 3512 struct list_head remap_list; 3513 struct svm_range_list *svms; 3514 struct svm_range *prange; 3515 struct svm_range *next; 3516 bool update_mapping = false; 3517 bool flush_tlb; 3518 int r, ret = 0; 3519 3520 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3521 p->pasid, &p->svms, start, start + size - 1, size); 3522 3523 r = svm_range_check_attr(p, nattr, attrs); 3524 if (r) 3525 return r; 3526 3527 svms = &p->svms; 3528 3529 mutex_lock(&process_info->lock); 3530 3531 svm_range_list_lock_and_flush_work(svms, mm); 3532 3533 r = svm_range_is_valid(p, start, size); 3534 if (r) { 3535 pr_debug("invalid range r=%d\n", r); 3536 mmap_write_unlock(mm); 3537 goto out; 3538 } 3539 3540 mutex_lock(&svms->lock); 3541 3542 /* Add new range and split existing ranges as needed */ 3543 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3544 &insert_list, &remove_list, &remap_list); 3545 if (r) { 3546 mutex_unlock(&svms->lock); 3547 mmap_write_unlock(mm); 3548 goto out; 3549 } 3550 /* Apply changes as a transaction */ 3551 list_for_each_entry_safe(prange, next, &insert_list, list) { 3552 svm_range_add_to_svms(prange); 3553 svm_range_add_notifier_locked(mm, prange); 3554 } 3555 list_for_each_entry(prange, &update_list, update_list) { 3556 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3557 /* TODO: unmap ranges from GPU that lost access */ 3558 } 3559 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3560 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3561 prange->svms, prange, prange->start, 3562 prange->last); 3563 svm_range_unlink(prange); 3564 svm_range_remove_notifier(prange); 3565 svm_range_free(prange, false); 3566 } 3567 3568 mmap_write_downgrade(mm); 3569 /* Trigger migrations and revalidate and map to GPUs as needed. If 3570 * this fails we may be left with partially completed actions. There 3571 * is no clean way of rolling back to the previous state in such a 3572 * case because the rollback wouldn't be guaranteed to work either. 3573 */ 3574 list_for_each_entry(prange, &update_list, update_list) { 3575 bool migrated; 3576 3577 mutex_lock(&prange->migrate_mutex); 3578 3579 r = svm_range_trigger_migration(mm, prange, &migrated); 3580 if (r) 3581 goto out_unlock_range; 3582 3583 if (migrated && (!p->xnack_enabled || 3584 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3585 prange->mapped_to_gpu) { 3586 pr_debug("restore_work will update mappings of GPUs\n"); 3587 mutex_unlock(&prange->migrate_mutex); 3588 continue; 3589 } 3590 3591 if (!migrated && !update_mapping) { 3592 mutex_unlock(&prange->migrate_mutex); 3593 continue; 3594 } 3595 3596 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3597 3598 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3599 true, true, flush_tlb); 3600 if (r) 3601 pr_debug("failed %d to map svm range\n", r); 3602 3603 out_unlock_range: 3604 mutex_unlock(&prange->migrate_mutex); 3605 if (r) 3606 ret = r; 3607 } 3608 3609 list_for_each_entry(prange, &remap_list, update_list) { 3610 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3611 prange, prange->start, prange->last); 3612 mutex_lock(&prange->migrate_mutex); 3613 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3614 true, true, prange->mapped_to_gpu); 3615 if (r) 3616 pr_debug("failed %d on remap svm range\n", r); 3617 mutex_unlock(&prange->migrate_mutex); 3618 if (r) 3619 ret = r; 3620 } 3621 3622 dynamic_svm_range_dump(svms); 3623 3624 mutex_unlock(&svms->lock); 3625 mmap_read_unlock(mm); 3626 out: 3627 mutex_unlock(&process_info->lock); 3628 3629 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3630 &p->svms, start, start + size - 1, r); 3631 3632 return ret ? ret : r; 3633 } 3634 3635 static int 3636 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3637 uint64_t start, uint64_t size, uint32_t nattr, 3638 struct kfd_ioctl_svm_attribute *attrs) 3639 { 3640 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3641 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3642 bool get_preferred_loc = false; 3643 bool get_prefetch_loc = false; 3644 bool get_granularity = false; 3645 bool get_accessible = false; 3646 bool get_flags = false; 3647 uint64_t last = start + size - 1UL; 3648 uint8_t granularity = 0xff; 3649 struct interval_tree_node *node; 3650 struct svm_range_list *svms; 3651 struct svm_range *prange; 3652 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3653 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3654 uint32_t flags_and = 0xffffffff; 3655 uint32_t flags_or = 0; 3656 int gpuidx; 3657 uint32_t i; 3658 int r = 0; 3659 3660 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3661 start + size - 1, nattr); 3662 3663 /* Flush pending deferred work to avoid racing with deferred actions from 3664 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3665 * can still race with get_attr because we don't hold the mmap lock. But that 3666 * would be a race condition in the application anyway, and undefined 3667 * behaviour is acceptable in that case. 3668 */ 3669 flush_work(&p->svms.deferred_list_work); 3670 3671 mmap_read_lock(mm); 3672 r = svm_range_is_valid(p, start, size); 3673 mmap_read_unlock(mm); 3674 if (r) { 3675 pr_debug("invalid range r=%d\n", r); 3676 return r; 3677 } 3678 3679 for (i = 0; i < nattr; i++) { 3680 switch (attrs[i].type) { 3681 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3682 get_preferred_loc = true; 3683 break; 3684 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3685 get_prefetch_loc = true; 3686 break; 3687 case KFD_IOCTL_SVM_ATTR_ACCESS: 3688 get_accessible = true; 3689 break; 3690 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3691 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3692 get_flags = true; 3693 break; 3694 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3695 get_granularity = true; 3696 break; 3697 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3698 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3699 fallthrough; 3700 default: 3701 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3702 return -EINVAL; 3703 } 3704 } 3705 3706 svms = &p->svms; 3707 3708 mutex_lock(&svms->lock); 3709 3710 node = interval_tree_iter_first(&svms->objects, start, last); 3711 if (!node) { 3712 pr_debug("range attrs not found return default values\n"); 3713 svm_range_set_default_attributes(&location, &prefetch_loc, 3714 &granularity, &flags_and); 3715 flags_or = flags_and; 3716 if (p->xnack_enabled) 3717 bitmap_copy(bitmap_access, svms->bitmap_supported, 3718 MAX_GPU_INSTANCE); 3719 else 3720 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3721 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3722 goto fill_values; 3723 } 3724 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3725 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3726 3727 while (node) { 3728 struct interval_tree_node *next; 3729 3730 prange = container_of(node, struct svm_range, it_node); 3731 next = interval_tree_iter_next(node, start, last); 3732 3733 if (get_preferred_loc) { 3734 if (prange->preferred_loc == 3735 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3736 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3737 location != prange->preferred_loc)) { 3738 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3739 get_preferred_loc = false; 3740 } else { 3741 location = prange->preferred_loc; 3742 } 3743 } 3744 if (get_prefetch_loc) { 3745 if (prange->prefetch_loc == 3746 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3747 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3748 prefetch_loc != prange->prefetch_loc)) { 3749 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3750 get_prefetch_loc = false; 3751 } else { 3752 prefetch_loc = prange->prefetch_loc; 3753 } 3754 } 3755 if (get_accessible) { 3756 bitmap_and(bitmap_access, bitmap_access, 3757 prange->bitmap_access, MAX_GPU_INSTANCE); 3758 bitmap_and(bitmap_aip, bitmap_aip, 3759 prange->bitmap_aip, MAX_GPU_INSTANCE); 3760 } 3761 if (get_flags) { 3762 flags_and &= prange->flags; 3763 flags_or |= prange->flags; 3764 } 3765 3766 if (get_granularity && prange->granularity < granularity) 3767 granularity = prange->granularity; 3768 3769 node = next; 3770 } 3771 fill_values: 3772 mutex_unlock(&svms->lock); 3773 3774 for (i = 0; i < nattr; i++) { 3775 switch (attrs[i].type) { 3776 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3777 attrs[i].value = location; 3778 break; 3779 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3780 attrs[i].value = prefetch_loc; 3781 break; 3782 case KFD_IOCTL_SVM_ATTR_ACCESS: 3783 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3784 attrs[i].value); 3785 if (gpuidx < 0) { 3786 pr_debug("invalid gpuid %x\n", attrs[i].value); 3787 return -EINVAL; 3788 } 3789 if (test_bit(gpuidx, bitmap_access)) 3790 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3791 else if (test_bit(gpuidx, bitmap_aip)) 3792 attrs[i].type = 3793 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3794 else 3795 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3796 break; 3797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3798 attrs[i].value = flags_and; 3799 break; 3800 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3801 attrs[i].value = ~flags_or; 3802 break; 3803 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3804 attrs[i].value = (uint32_t)granularity; 3805 break; 3806 } 3807 } 3808 3809 return 0; 3810 } 3811 3812 int kfd_criu_resume_svm(struct kfd_process *p) 3813 { 3814 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3815 int nattr_common = 4, nattr_accessibility = 1; 3816 struct criu_svm_metadata *criu_svm_md = NULL; 3817 struct svm_range_list *svms = &p->svms; 3818 struct criu_svm_metadata *next = NULL; 3819 uint32_t set_flags = 0xffffffff; 3820 int i, j, num_attrs, ret = 0; 3821 uint64_t set_attr_size; 3822 struct mm_struct *mm; 3823 3824 if (list_empty(&svms->criu_svm_metadata_list)) { 3825 pr_debug("No SVM data from CRIU restore stage 2\n"); 3826 return ret; 3827 } 3828 3829 mm = get_task_mm(p->lead_thread); 3830 if (!mm) { 3831 pr_err("failed to get mm for the target process\n"); 3832 return -ESRCH; 3833 } 3834 3835 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3836 3837 i = j = 0; 3838 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3839 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3840 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3841 3842 for (j = 0; j < num_attrs; j++) { 3843 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3844 i, j, criu_svm_md->data.attrs[j].type, 3845 i, j, criu_svm_md->data.attrs[j].value); 3846 switch (criu_svm_md->data.attrs[j].type) { 3847 /* During Checkpoint operation, the query for 3848 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3849 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3850 * not used by the range which was checkpointed. Care 3851 * must be taken to not restore with an invalid value 3852 * otherwise the gpuidx value will be invalid and 3853 * set_attr would eventually fail so just replace those 3854 * with another dummy attribute such as 3855 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3856 */ 3857 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3858 if (criu_svm_md->data.attrs[j].value == 3859 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3860 criu_svm_md->data.attrs[j].type = 3861 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3862 criu_svm_md->data.attrs[j].value = 0; 3863 } 3864 break; 3865 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3866 set_flags = criu_svm_md->data.attrs[j].value; 3867 break; 3868 default: 3869 break; 3870 } 3871 } 3872 3873 /* CLR_FLAGS is not available via get_attr during checkpoint but 3874 * it needs to be inserted before restoring the ranges so 3875 * allocate extra space for it before calling set_attr 3876 */ 3877 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3878 (num_attrs + 1); 3879 set_attr_new = krealloc(set_attr, set_attr_size, 3880 GFP_KERNEL); 3881 if (!set_attr_new) { 3882 ret = -ENOMEM; 3883 goto exit; 3884 } 3885 set_attr = set_attr_new; 3886 3887 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3888 sizeof(struct kfd_ioctl_svm_attribute)); 3889 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3890 set_attr[num_attrs].value = ~set_flags; 3891 3892 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3893 criu_svm_md->data.size, num_attrs + 1, 3894 set_attr); 3895 if (ret) { 3896 pr_err("CRIU: failed to set range attributes\n"); 3897 goto exit; 3898 } 3899 3900 i++; 3901 } 3902 exit: 3903 kfree(set_attr); 3904 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3905 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3906 criu_svm_md->data.start_addr); 3907 kfree(criu_svm_md); 3908 } 3909 3910 mmput(mm); 3911 return ret; 3912 3913 } 3914 3915 int kfd_criu_restore_svm(struct kfd_process *p, 3916 uint8_t __user *user_priv_ptr, 3917 uint64_t *priv_data_offset, 3918 uint64_t max_priv_data_size) 3919 { 3920 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3921 int nattr_common = 4, nattr_accessibility = 1; 3922 struct criu_svm_metadata *criu_svm_md = NULL; 3923 struct svm_range_list *svms = &p->svms; 3924 uint32_t num_devices; 3925 int ret = 0; 3926 3927 num_devices = p->n_pdds; 3928 /* Handle one SVM range object at a time, also the number of gpus are 3929 * assumed to be same on the restore node, checking must be done while 3930 * evaluating the topology earlier 3931 */ 3932 3933 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3934 (nattr_common + nattr_accessibility * num_devices); 3935 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3936 3937 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3938 svm_attrs_size; 3939 3940 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3941 if (!criu_svm_md) { 3942 pr_err("failed to allocate memory to store svm metadata\n"); 3943 return -ENOMEM; 3944 } 3945 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3946 ret = -EINVAL; 3947 goto exit; 3948 } 3949 3950 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3951 svm_priv_data_size); 3952 if (ret) { 3953 ret = -EFAULT; 3954 goto exit; 3955 } 3956 *priv_data_offset += svm_priv_data_size; 3957 3958 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3959 3960 return 0; 3961 3962 3963 exit: 3964 kfree(criu_svm_md); 3965 return ret; 3966 } 3967 3968 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3969 uint64_t *svm_priv_data_size) 3970 { 3971 uint64_t total_size, accessibility_size, common_attr_size; 3972 int nattr_common = 4, nattr_accessibility = 1; 3973 int num_devices = p->n_pdds; 3974 struct svm_range_list *svms; 3975 struct svm_range *prange; 3976 uint32_t count = 0; 3977 3978 *svm_priv_data_size = 0; 3979 3980 svms = &p->svms; 3981 if (!svms) 3982 return -EINVAL; 3983 3984 mutex_lock(&svms->lock); 3985 list_for_each_entry(prange, &svms->list, list) { 3986 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3987 prange, prange->start, prange->npages, 3988 prange->start + prange->npages - 1); 3989 count++; 3990 } 3991 mutex_unlock(&svms->lock); 3992 3993 *num_svm_ranges = count; 3994 /* Only the accessbility attributes need to be queried for all the gpus 3995 * individually, remaining ones are spanned across the entire process 3996 * regardless of the various gpu nodes. Of the remaining attributes, 3997 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3998 * 3999 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4000 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4001 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4002 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4003 * 4004 * ** ACCESSBILITY ATTRIBUTES ** 4005 * (Considered as one, type is altered during query, value is gpuid) 4006 * KFD_IOCTL_SVM_ATTR_ACCESS 4007 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4008 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4009 */ 4010 if (*num_svm_ranges > 0) { 4011 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4012 nattr_common; 4013 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4014 nattr_accessibility * num_devices; 4015 4016 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4017 common_attr_size + accessibility_size; 4018 4019 *svm_priv_data_size = *num_svm_ranges * total_size; 4020 } 4021 4022 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4023 *svm_priv_data_size); 4024 return 0; 4025 } 4026 4027 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4028 uint8_t __user *user_priv_data, 4029 uint64_t *priv_data_offset) 4030 { 4031 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4032 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4033 uint64_t svm_priv_data_size, query_attr_size = 0; 4034 int index, nattr_common = 4, ret = 0; 4035 struct svm_range_list *svms; 4036 int num_devices = p->n_pdds; 4037 struct svm_range *prange; 4038 struct mm_struct *mm; 4039 4040 svms = &p->svms; 4041 if (!svms) 4042 return -EINVAL; 4043 4044 mm = get_task_mm(p->lead_thread); 4045 if (!mm) { 4046 pr_err("failed to get mm for the target process\n"); 4047 return -ESRCH; 4048 } 4049 4050 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4051 (nattr_common + num_devices); 4052 4053 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4054 if (!query_attr) { 4055 ret = -ENOMEM; 4056 goto exit; 4057 } 4058 4059 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4060 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4061 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4062 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4063 4064 for (index = 0; index < num_devices; index++) { 4065 struct kfd_process_device *pdd = p->pdds[index]; 4066 4067 query_attr[index + nattr_common].type = 4068 KFD_IOCTL_SVM_ATTR_ACCESS; 4069 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4070 } 4071 4072 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4073 4074 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4075 if (!svm_priv) { 4076 ret = -ENOMEM; 4077 goto exit_query; 4078 } 4079 4080 index = 0; 4081 list_for_each_entry(prange, &svms->list, list) { 4082 4083 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4084 svm_priv->start_addr = prange->start; 4085 svm_priv->size = prange->npages; 4086 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4087 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4088 prange, prange->start, prange->npages, 4089 prange->start + prange->npages - 1, 4090 prange->npages * PAGE_SIZE); 4091 4092 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4093 svm_priv->size, 4094 (nattr_common + num_devices), 4095 svm_priv->attrs); 4096 if (ret) { 4097 pr_err("CRIU: failed to obtain range attributes\n"); 4098 goto exit_priv; 4099 } 4100 4101 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4102 svm_priv_data_size)) { 4103 pr_err("Failed to copy svm priv to user\n"); 4104 ret = -EFAULT; 4105 goto exit_priv; 4106 } 4107 4108 *priv_data_offset += svm_priv_data_size; 4109 4110 } 4111 4112 4113 exit_priv: 4114 kfree(svm_priv); 4115 exit_query: 4116 kfree(query_attr); 4117 exit: 4118 mmput(mm); 4119 return ret; 4120 } 4121 4122 int 4123 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4124 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4125 { 4126 struct mm_struct *mm = current->mm; 4127 int r; 4128 4129 start >>= PAGE_SHIFT; 4130 size >>= PAGE_SHIFT; 4131 4132 switch (op) { 4133 case KFD_IOCTL_SVM_OP_SET_ATTR: 4134 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4135 break; 4136 case KFD_IOCTL_SVM_OP_GET_ATTR: 4137 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4138 break; 4139 default: 4140 r = EINVAL; 4141 break; 4142 } 4143 4144 return r; 4145 } 4146