1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/slab.h> 26 #include <linux/list.h> 27 #include "kfd_device_queue_manager.h" 28 #include "kfd_priv.h" 29 #include "kfd_kernel_queue.h" 30 #include "amdgpu_amdkfd.h" 31 32 static inline struct process_queue_node *get_queue_by_qid( 33 struct process_queue_manager *pqm, unsigned int qid) 34 { 35 struct process_queue_node *pqn; 36 37 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 38 if ((pqn->q && pqn->q->properties.queue_id == qid) || 39 (pqn->kq && pqn->kq->queue->properties.queue_id == qid)) 40 return pqn; 41 } 42 43 return NULL; 44 } 45 46 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm, 47 unsigned int qid) 48 { 49 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 50 return -EINVAL; 51 52 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) { 53 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid); 54 return -ENOSPC; 55 } 56 57 return 0; 58 } 59 60 static int find_available_queue_slot(struct process_queue_manager *pqm, 61 unsigned int *qid) 62 { 63 unsigned long found; 64 65 found = find_first_zero_bit(pqm->queue_slot_bitmap, 66 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 67 68 pr_debug("The new slot id %lu\n", found); 69 70 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 71 pr_info("Cannot open more queues for process with pasid 0x%x\n", 72 pqm->process->pasid); 73 return -ENOMEM; 74 } 75 76 set_bit(found, pqm->queue_slot_bitmap); 77 *qid = found; 78 79 return 0; 80 } 81 82 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 83 { 84 struct kfd_node *dev = pdd->dev; 85 86 if (pdd->already_dequeued) 87 return; 88 89 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); 90 amdgpu_mes_flush_shader_debugger(dev->adev, pdd->proc_ctx_gpu_addr); 91 pdd->already_dequeued = true; 92 } 93 94 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 95 void *gws) 96 { 97 struct kfd_node *dev = NULL; 98 struct process_queue_node *pqn; 99 struct kfd_process_device *pdd; 100 struct kgd_mem *mem = NULL; 101 int ret; 102 103 pqn = get_queue_by_qid(pqm, qid); 104 if (!pqn) { 105 pr_err("Queue id does not match any known queue\n"); 106 return -EINVAL; 107 } 108 109 if (pqn->q) 110 dev = pqn->q->device; 111 if (WARN_ON(!dev)) 112 return -ENODEV; 113 114 pdd = kfd_get_process_device_data(dev, pqm->process); 115 if (!pdd) { 116 pr_err("Process device data doesn't exist\n"); 117 return -EINVAL; 118 } 119 120 /* Only allow one queue per process can have GWS assigned */ 121 if (gws && pdd->qpd.num_gws) 122 return -EBUSY; 123 124 if (!gws && pdd->qpd.num_gws == 0) 125 return -EINVAL; 126 127 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && !dev->kfd->shared_resources.enable_mes) { 128 if (gws) 129 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info, 130 gws, &mem); 131 else 132 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info, 133 pqn->q->gws); 134 if (unlikely(ret)) 135 return ret; 136 pqn->q->gws = mem; 137 } else { 138 /* 139 * Intentionally set GWS to a non-NULL value 140 * for devices that do not use GWS for global wave 141 * synchronization but require the formality 142 * of setting GWS for cooperative groups. 143 */ 144 pqn->q->gws = gws ? ERR_PTR(-ENOMEM) : NULL; 145 } 146 147 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; 148 149 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 150 pqn->q, NULL); 151 } 152 153 void kfd_process_dequeue_from_all_devices(struct kfd_process *p) 154 { 155 int i; 156 157 for (i = 0; i < p->n_pdds; i++) 158 kfd_process_dequeue_from_device(p->pdds[i]); 159 } 160 161 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) 162 { 163 INIT_LIST_HEAD(&pqm->queues); 164 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, 165 GFP_KERNEL); 166 if (!pqm->queue_slot_bitmap) 167 return -ENOMEM; 168 pqm->process = p; 169 170 return 0; 171 } 172 173 static void pqm_clean_queue_resource(struct process_queue_manager *pqm, 174 struct process_queue_node *pqn) 175 { 176 struct kfd_node *dev; 177 struct kfd_process_device *pdd; 178 179 dev = pqn->q->device; 180 181 pdd = kfd_get_process_device_data(dev, pqm->process); 182 if (!pdd) { 183 pr_err("Process device data doesn't exist\n"); 184 return; 185 } 186 187 if (pqn->q->gws) { 188 if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) && 189 !dev->kfd->shared_resources.enable_mes) 190 amdgpu_amdkfd_remove_gws_from_process( 191 pqm->process->kgd_process_info, pqn->q->gws); 192 pdd->qpd.num_gws = 0; 193 } 194 195 if (dev->kfd->shared_resources.enable_mes) { 196 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->gang_ctx_bo); 197 if (pqn->q->wptr_bo) 198 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo); 199 } 200 } 201 202 void pqm_uninit(struct process_queue_manager *pqm) 203 { 204 struct process_queue_node *pqn, *next; 205 206 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) { 207 if (pqn->q) 208 pqm_clean_queue_resource(pqm, pqn); 209 210 kfd_procfs_del_queue(pqn->q); 211 uninit_queue(pqn->q); 212 list_del(&pqn->process_queue_list); 213 kfree(pqn); 214 } 215 216 bitmap_free(pqm->queue_slot_bitmap); 217 pqm->queue_slot_bitmap = NULL; 218 } 219 220 static int init_user_queue(struct process_queue_manager *pqm, 221 struct kfd_node *dev, struct queue **q, 222 struct queue_properties *q_properties, 223 struct file *f, struct amdgpu_bo *wptr_bo, 224 unsigned int qid) 225 { 226 int retval; 227 228 /* Doorbell initialized in user space*/ 229 q_properties->doorbell_ptr = NULL; 230 q_properties->exception_status = KFD_EC_MASK(EC_QUEUE_NEW); 231 232 /* let DQM handle it*/ 233 q_properties->vmid = 0; 234 q_properties->queue_id = qid; 235 236 retval = init_queue(q, q_properties); 237 if (retval != 0) 238 return retval; 239 240 (*q)->device = dev; 241 (*q)->process = pqm->process; 242 243 if (dev->kfd->shared_resources.enable_mes) { 244 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, 245 AMDGPU_MES_GANG_CTX_SIZE, 246 &(*q)->gang_ctx_bo, 247 &(*q)->gang_ctx_gpu_addr, 248 &(*q)->gang_ctx_cpu_ptr, 249 false); 250 if (retval) { 251 pr_err("failed to allocate gang context bo\n"); 252 goto cleanup; 253 } 254 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE); 255 (*q)->wptr_bo = wptr_bo; 256 } 257 258 pr_debug("PQM After init queue"); 259 return 0; 260 261 cleanup: 262 uninit_queue(*q); 263 *q = NULL; 264 return retval; 265 } 266 267 int pqm_create_queue(struct process_queue_manager *pqm, 268 struct kfd_node *dev, 269 struct file *f, 270 struct queue_properties *properties, 271 unsigned int *qid, 272 struct amdgpu_bo *wptr_bo, 273 const struct kfd_criu_queue_priv_data *q_data, 274 const void *restore_mqd, 275 const void *restore_ctl_stack, 276 uint32_t *p_doorbell_offset_in_process) 277 { 278 int retval; 279 struct kfd_process_device *pdd; 280 struct queue *q; 281 struct process_queue_node *pqn; 282 struct kernel_queue *kq; 283 enum kfd_queue_type type = properties->type; 284 unsigned int max_queues = 127; /* HWS limit */ 285 286 /* 287 * On GFX 9.4.3, increase the number of queues that 288 * can be created to 255. No HWS limit on GFX 9.4.3. 289 */ 290 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) 291 max_queues = 255; 292 293 q = NULL; 294 kq = NULL; 295 296 pdd = kfd_get_process_device_data(dev, pqm->process); 297 if (!pdd) { 298 pr_err("Process device data doesn't exist\n"); 299 return -1; 300 } 301 302 /* 303 * for debug process, verify that it is within the static queues limit 304 * currently limit is set to half of the total avail HQD slots 305 * If we are just about to create DIQ, the is_debug flag is not set yet 306 * Hence we also check the type as well 307 */ 308 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ)) 309 max_queues = dev->kfd->device_info.max_no_of_hqd/2; 310 311 if (pdd->qpd.queue_count >= max_queues) 312 return -ENOSPC; 313 314 if (q_data) { 315 retval = assign_queue_slot_by_qid(pqm, q_data->q_id); 316 *qid = q_data->q_id; 317 } else 318 retval = find_available_queue_slot(pqm, qid); 319 320 if (retval != 0) 321 return retval; 322 323 if (list_empty(&pdd->qpd.queues_list) && 324 list_empty(&pdd->qpd.priv_queue_list)) 325 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd); 326 327 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL); 328 if (!pqn) { 329 retval = -ENOMEM; 330 goto err_allocate_pqn; 331 } 332 333 switch (type) { 334 case KFD_QUEUE_TYPE_SDMA: 335 case KFD_QUEUE_TYPE_SDMA_XGMI: 336 /* SDMA queues are always allocated statically no matter 337 * which scheduler mode is used. We also do not need to 338 * check whether a SDMA queue can be allocated here, because 339 * allocate_sdma_queue() in create_queue() has the 340 * corresponding check logic. 341 */ 342 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 343 if (retval != 0) 344 goto err_create_queue; 345 pqn->q = q; 346 pqn->kq = NULL; 347 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 348 restore_mqd, restore_ctl_stack); 349 print_queue(q); 350 break; 351 352 case KFD_QUEUE_TYPE_COMPUTE: 353 /* check if there is over subscription */ 354 if ((dev->dqm->sched_policy == 355 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) && 356 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) || 357 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) { 358 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n"); 359 retval = -EPERM; 360 goto err_create_queue; 361 } 362 363 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid); 364 if (retval != 0) 365 goto err_create_queue; 366 pqn->q = q; 367 pqn->kq = NULL; 368 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 369 restore_mqd, restore_ctl_stack); 370 print_queue(q); 371 break; 372 case KFD_QUEUE_TYPE_DIQ: 373 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ); 374 if (!kq) { 375 retval = -ENOMEM; 376 goto err_create_queue; 377 } 378 kq->queue->properties.queue_id = *qid; 379 pqn->kq = kq; 380 pqn->q = NULL; 381 retval = kfd_process_drain_interrupts(pdd); 382 if (retval) 383 break; 384 385 retval = dev->dqm->ops.create_kernel_queue(dev->dqm, 386 kq, &pdd->qpd); 387 break; 388 default: 389 WARN(1, "Invalid queue type %d", type); 390 retval = -EINVAL; 391 } 392 393 if (retval != 0) { 394 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n", 395 pqm->process->pasid, type, retval); 396 goto err_create_queue; 397 } 398 399 if (q && p_doorbell_offset_in_process) { 400 /* Return the doorbell offset within the doorbell page 401 * to the caller so it can be passed up to user mode 402 * (in bytes). 403 * relative doorbell index = Absolute doorbell index - 404 * absolute index of first doorbell in the page. 405 */ 406 uint32_t first_db_index = amdgpu_doorbell_index_on_bar(pdd->dev->adev, 407 pdd->qpd.proc_doorbells, 408 0, 409 pdd->dev->kfd->device_info.doorbell_size); 410 411 *p_doorbell_offset_in_process = (q->properties.doorbell_off 412 - first_db_index) * sizeof(uint32_t); 413 } 414 415 pr_debug("PQM After DQM create queue\n"); 416 417 list_add(&pqn->process_queue_list, &pqm->queues); 418 419 if (q) { 420 pr_debug("PQM done creating queue\n"); 421 kfd_procfs_add_queue(q); 422 print_queue_properties(&q->properties); 423 } 424 425 return retval; 426 427 err_create_queue: 428 uninit_queue(q); 429 if (kq) 430 kernel_queue_uninit(kq, false); 431 kfree(pqn); 432 err_allocate_pqn: 433 /* check if queues list is empty unregister process from device */ 434 clear_bit(*qid, pqm->queue_slot_bitmap); 435 if (list_empty(&pdd->qpd.queues_list) && 436 list_empty(&pdd->qpd.priv_queue_list)) 437 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd); 438 return retval; 439 } 440 441 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) 442 { 443 struct process_queue_node *pqn; 444 struct kfd_process_device *pdd; 445 struct device_queue_manager *dqm; 446 struct kfd_node *dev; 447 int retval; 448 449 dqm = NULL; 450 451 retval = 0; 452 453 pqn = get_queue_by_qid(pqm, qid); 454 if (!pqn) { 455 pr_err("Queue id does not match any known queue\n"); 456 return -EINVAL; 457 } 458 459 dev = NULL; 460 if (pqn->kq) 461 dev = pqn->kq->dev; 462 if (pqn->q) 463 dev = pqn->q->device; 464 if (WARN_ON(!dev)) 465 return -ENODEV; 466 467 pdd = kfd_get_process_device_data(dev, pqm->process); 468 if (!pdd) { 469 pr_err("Process device data doesn't exist\n"); 470 return -1; 471 } 472 473 if (pqn->kq) { 474 /* destroy kernel queue (DIQ) */ 475 dqm = pqn->kq->dev->dqm; 476 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd); 477 kernel_queue_uninit(pqn->kq, false); 478 } 479 480 if (pqn->q) { 481 kfd_procfs_del_queue(pqn->q); 482 dqm = pqn->q->device->dqm; 483 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q); 484 if (retval) { 485 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n", 486 pqm->process->pasid, 487 pqn->q->properties.queue_id, retval); 488 if (retval != -ETIME) 489 goto err_destroy_queue; 490 } 491 492 pqm_clean_queue_resource(pqm, pqn); 493 uninit_queue(pqn->q); 494 } 495 496 list_del(&pqn->process_queue_list); 497 kfree(pqn); 498 clear_bit(qid, pqm->queue_slot_bitmap); 499 500 if (list_empty(&pdd->qpd.queues_list) && 501 list_empty(&pdd->qpd.priv_queue_list)) 502 dqm->ops.unregister_process(dqm, &pdd->qpd); 503 504 err_destroy_queue: 505 return retval; 506 } 507 508 int pqm_update_queue_properties(struct process_queue_manager *pqm, 509 unsigned int qid, struct queue_properties *p) 510 { 511 int retval; 512 struct process_queue_node *pqn; 513 514 pqn = get_queue_by_qid(pqm, qid); 515 if (!pqn) { 516 pr_debug("No queue %d exists for update operation\n", qid); 517 return -EFAULT; 518 } 519 520 pqn->q->properties.queue_address = p->queue_address; 521 pqn->q->properties.queue_size = p->queue_size; 522 pqn->q->properties.queue_percent = p->queue_percent; 523 pqn->q->properties.priority = p->priority; 524 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc; 525 526 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 527 pqn->q, NULL); 528 if (retval != 0) 529 return retval; 530 531 return 0; 532 } 533 534 int pqm_update_mqd(struct process_queue_manager *pqm, 535 unsigned int qid, struct mqd_update_info *minfo) 536 { 537 int retval; 538 struct process_queue_node *pqn; 539 540 pqn = get_queue_by_qid(pqm, qid); 541 if (!pqn) { 542 pr_debug("No queue %d exists for update operation\n", qid); 543 return -EFAULT; 544 } 545 546 /* CUs are masked for debugger requirements so deny user mask */ 547 if (pqn->q->properties.is_dbg_wa && minfo && minfo->cu_mask.ptr) 548 return -EBUSY; 549 550 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */ 551 if (minfo && minfo->cu_mask.ptr && 552 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) { 553 int i; 554 555 for (i = 0; i < minfo->cu_mask.count; i += 2) { 556 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3; 557 558 if (cu_pair && cu_pair != 0x3) { 559 pr_debug("CUs must be adjacent pairwise enabled.\n"); 560 return -EINVAL; 561 } 562 } 563 } 564 565 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 566 pqn->q, minfo); 567 if (retval != 0) 568 return retval; 569 570 if (minfo && minfo->cu_mask.ptr) 571 pqn->q->properties.is_user_cu_masked = true; 572 573 return 0; 574 } 575 576 struct kernel_queue *pqm_get_kernel_queue( 577 struct process_queue_manager *pqm, 578 unsigned int qid) 579 { 580 struct process_queue_node *pqn; 581 582 pqn = get_queue_by_qid(pqm, qid); 583 if (pqn && pqn->kq) 584 return pqn->kq; 585 586 return NULL; 587 } 588 589 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 590 unsigned int qid) 591 { 592 struct process_queue_node *pqn; 593 594 pqn = get_queue_by_qid(pqm, qid); 595 return pqn ? pqn->q : NULL; 596 } 597 598 int pqm_get_wave_state(struct process_queue_manager *pqm, 599 unsigned int qid, 600 void __user *ctl_stack, 601 u32 *ctl_stack_used_size, 602 u32 *save_area_used_size) 603 { 604 struct process_queue_node *pqn; 605 606 pqn = get_queue_by_qid(pqm, qid); 607 if (!pqn) { 608 pr_debug("amdkfd: No queue %d exists for operation\n", 609 qid); 610 return -EFAULT; 611 } 612 613 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm, 614 pqn->q, 615 ctl_stack, 616 ctl_stack_used_size, 617 save_area_used_size); 618 } 619 620 int pqm_get_queue_snapshot(struct process_queue_manager *pqm, 621 uint64_t exception_clear_mask, 622 void __user *buf, 623 int *num_qss_entries, 624 uint32_t *entry_size) 625 { 626 struct process_queue_node *pqn; 627 struct kfd_queue_snapshot_entry src; 628 uint32_t tmp_entry_size = *entry_size, tmp_qss_entries = *num_qss_entries; 629 int r = 0; 630 631 *num_qss_entries = 0; 632 if (!(*entry_size)) 633 return -EINVAL; 634 635 *entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry)); 636 mutex_lock(&pqm->process->event_mutex); 637 638 memset(&src, 0, sizeof(src)); 639 640 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 641 if (!pqn->q) 642 continue; 643 644 if (*num_qss_entries < tmp_qss_entries) { 645 set_queue_snapshot_entry(pqn->q, exception_clear_mask, &src); 646 647 if (copy_to_user(buf, &src, *entry_size)) { 648 r = -EFAULT; 649 break; 650 } 651 buf += tmp_entry_size; 652 } 653 *num_qss_entries += 1; 654 } 655 656 mutex_unlock(&pqm->process->event_mutex); 657 return r; 658 } 659 660 static int get_queue_data_sizes(struct kfd_process_device *pdd, 661 struct queue *q, 662 uint32_t *mqd_size, 663 uint32_t *ctl_stack_size) 664 { 665 int ret; 666 667 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm, 668 q->properties.queue_id, 669 mqd_size, 670 ctl_stack_size); 671 if (ret) 672 pr_err("Failed to get queue dump info (%d)\n", ret); 673 674 return ret; 675 } 676 677 int kfd_process_get_queue_info(struct kfd_process *p, 678 uint32_t *num_queues, 679 uint64_t *priv_data_sizes) 680 { 681 uint32_t extra_data_sizes = 0; 682 struct queue *q; 683 int i; 684 int ret; 685 686 *num_queues = 0; 687 688 /* Run over all PDDs of the process */ 689 for (i = 0; i < p->n_pdds; i++) { 690 struct kfd_process_device *pdd = p->pdds[i]; 691 692 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 693 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 694 q->properties.type == KFD_QUEUE_TYPE_SDMA || 695 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { 696 uint32_t mqd_size, ctl_stack_size; 697 698 *num_queues = *num_queues + 1; 699 700 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 701 if (ret) 702 return ret; 703 704 extra_data_sizes += mqd_size + ctl_stack_size; 705 } else { 706 pr_err("Unsupported queue type (%d)\n", q->properties.type); 707 return -EOPNOTSUPP; 708 } 709 } 710 } 711 *priv_data_sizes = extra_data_sizes + 712 (*num_queues * sizeof(struct kfd_criu_queue_priv_data)); 713 714 return 0; 715 } 716 717 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm, 718 unsigned int qid, 719 void *mqd, 720 void *ctl_stack) 721 { 722 struct process_queue_node *pqn; 723 724 pqn = get_queue_by_qid(pqm, qid); 725 if (!pqn) { 726 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 727 return -EFAULT; 728 } 729 730 if (!pqn->q->device->dqm->ops.checkpoint_mqd) { 731 pr_err("amdkfd: queue dumping not supported on this device\n"); 732 return -EOPNOTSUPP; 733 } 734 735 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm, 736 pqn->q, mqd, ctl_stack); 737 } 738 739 static int criu_checkpoint_queue(struct kfd_process_device *pdd, 740 struct queue *q, 741 struct kfd_criu_queue_priv_data *q_data) 742 { 743 uint8_t *mqd, *ctl_stack; 744 int ret; 745 746 mqd = (void *)(q_data + 1); 747 ctl_stack = mqd + q_data->mqd_size; 748 749 q_data->gpu_id = pdd->user_gpu_id; 750 q_data->type = q->properties.type; 751 q_data->format = q->properties.format; 752 q_data->q_id = q->properties.queue_id; 753 q_data->q_address = q->properties.queue_address; 754 q_data->q_size = q->properties.queue_size; 755 q_data->priority = q->properties.priority; 756 q_data->q_percent = q->properties.queue_percent; 757 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr; 758 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr; 759 q_data->doorbell_id = q->doorbell_id; 760 761 q_data->sdma_id = q->sdma_id; 762 763 q_data->eop_ring_buffer_address = 764 q->properties.eop_ring_buffer_address; 765 766 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size; 767 768 q_data->ctx_save_restore_area_address = 769 q->properties.ctx_save_restore_area_address; 770 771 q_data->ctx_save_restore_area_size = 772 q->properties.ctx_save_restore_area_size; 773 774 q_data->gws = !!q->gws; 775 776 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); 777 if (ret) { 778 pr_err("Failed checkpoint queue_mqd (%d)\n", ret); 779 return ret; 780 } 781 782 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id); 783 return ret; 784 } 785 786 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd, 787 uint8_t __user *user_priv, 788 unsigned int *q_index, 789 uint64_t *queues_priv_data_offset) 790 { 791 unsigned int q_private_data_size = 0; 792 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */ 793 struct queue *q; 794 int ret = 0; 795 796 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 797 struct kfd_criu_queue_priv_data *q_data; 798 uint64_t q_data_size; 799 uint32_t mqd_size; 800 uint32_t ctl_stack_size; 801 802 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE && 803 q->properties.type != KFD_QUEUE_TYPE_SDMA && 804 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) { 805 806 pr_err("Unsupported queue type (%d)\n", q->properties.type); 807 ret = -EOPNOTSUPP; 808 break; 809 } 810 811 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 812 if (ret) 813 break; 814 815 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size; 816 817 /* Increase local buffer space if needed */ 818 if (q_private_data_size < q_data_size) { 819 kfree(q_private_data); 820 821 q_private_data = kzalloc(q_data_size, GFP_KERNEL); 822 if (!q_private_data) { 823 ret = -ENOMEM; 824 break; 825 } 826 q_private_data_size = q_data_size; 827 } 828 829 q_data = (struct kfd_criu_queue_priv_data *)q_private_data; 830 831 /* data stored in this order: priv_data, mqd, ctl_stack */ 832 q_data->mqd_size = mqd_size; 833 q_data->ctl_stack_size = ctl_stack_size; 834 835 ret = criu_checkpoint_queue(pdd, q, q_data); 836 if (ret) 837 break; 838 839 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE; 840 841 ret = copy_to_user(user_priv + *queues_priv_data_offset, 842 q_data, q_data_size); 843 if (ret) { 844 ret = -EFAULT; 845 break; 846 } 847 *queues_priv_data_offset += q_data_size; 848 *q_index = *q_index + 1; 849 } 850 851 kfree(q_private_data); 852 853 return ret; 854 } 855 856 int kfd_criu_checkpoint_queues(struct kfd_process *p, 857 uint8_t __user *user_priv_data, 858 uint64_t *priv_data_offset) 859 { 860 int ret = 0, pdd_index, q_index = 0; 861 862 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 863 struct kfd_process_device *pdd = p->pdds[pdd_index]; 864 865 /* 866 * criu_checkpoint_queues_device will copy data to user and update q_index and 867 * queues_priv_data_offset 868 */ 869 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index, 870 priv_data_offset); 871 872 if (ret) 873 break; 874 } 875 876 return ret; 877 } 878 879 static void set_queue_properties_from_criu(struct queue_properties *qp, 880 struct kfd_criu_queue_priv_data *q_data) 881 { 882 qp->is_interop = false; 883 qp->queue_percent = q_data->q_percent; 884 qp->priority = q_data->priority; 885 qp->queue_address = q_data->q_address; 886 qp->queue_size = q_data->q_size; 887 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr; 888 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr; 889 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address; 890 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size; 891 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address; 892 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size; 893 qp->ctl_stack_size = q_data->ctl_stack_size; 894 qp->type = q_data->type; 895 qp->format = q_data->format; 896 } 897 898 int kfd_criu_restore_queue(struct kfd_process *p, 899 uint8_t __user *user_priv_ptr, 900 uint64_t *priv_data_offset, 901 uint64_t max_priv_data_size) 902 { 903 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL; 904 struct kfd_criu_queue_priv_data *q_data; 905 struct kfd_process_device *pdd; 906 uint64_t q_extra_data_size; 907 struct queue_properties qp; 908 unsigned int queue_id; 909 int ret = 0; 910 911 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size) 912 return -EINVAL; 913 914 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL); 915 if (!q_data) 916 return -ENOMEM; 917 918 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data)); 919 if (ret) { 920 ret = -EFAULT; 921 goto exit; 922 } 923 924 *priv_data_offset += sizeof(*q_data); 925 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size; 926 927 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) { 928 ret = -EINVAL; 929 goto exit; 930 } 931 932 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL); 933 if (!q_extra_data) { 934 ret = -ENOMEM; 935 goto exit; 936 } 937 938 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size); 939 if (ret) { 940 ret = -EFAULT; 941 goto exit; 942 } 943 944 *priv_data_offset += q_extra_data_size; 945 946 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id); 947 if (!pdd) { 948 pr_err("Failed to get pdd\n"); 949 ret = -EINVAL; 950 goto exit; 951 } 952 953 /* data stored in this order: mqd, ctl_stack */ 954 mqd = q_extra_data; 955 ctl_stack = mqd + q_data->mqd_size; 956 957 memset(&qp, 0, sizeof(qp)); 958 set_queue_properties_from_criu(&qp, q_data); 959 960 print_queue_properties(&qp); 961 962 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack, 963 NULL); 964 if (ret) { 965 pr_err("Failed to create new queue err:%d\n", ret); 966 goto exit; 967 } 968 969 if (q_data->gws) 970 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); 971 972 exit: 973 if (ret) 974 pr_err("Failed to restore queue (%d)\n", ret); 975 else 976 pr_debug("Queue id %d was restored successfully\n", queue_id); 977 978 kfree(q_data); 979 980 return ret; 981 } 982 983 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 984 unsigned int qid, 985 uint32_t *mqd_size, 986 uint32_t *ctl_stack_size) 987 { 988 struct process_queue_node *pqn; 989 990 pqn = get_queue_by_qid(pqm, qid); 991 if (!pqn) { 992 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 993 return -EFAULT; 994 } 995 996 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) { 997 pr_err("amdkfd: queue dumping not supported on this device\n"); 998 return -EOPNOTSUPP; 999 } 1000 1001 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm, 1002 pqn->q, mqd_size, 1003 ctl_stack_size); 1004 return 0; 1005 } 1006 1007 #if defined(CONFIG_DEBUG_FS) 1008 1009 int pqm_debugfs_mqds(struct seq_file *m, void *data) 1010 { 1011 struct process_queue_manager *pqm = data; 1012 struct process_queue_node *pqn; 1013 struct queue *q; 1014 enum KFD_MQD_TYPE mqd_type; 1015 struct mqd_manager *mqd_mgr; 1016 int r = 0, xcc, num_xccs = 1; 1017 void *mqd; 1018 uint64_t size = 0; 1019 1020 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1021 if (pqn->q) { 1022 q = pqn->q; 1023 switch (q->properties.type) { 1024 case KFD_QUEUE_TYPE_SDMA: 1025 case KFD_QUEUE_TYPE_SDMA_XGMI: 1026 seq_printf(m, " SDMA queue on device %x\n", 1027 q->device->id); 1028 mqd_type = KFD_MQD_TYPE_SDMA; 1029 break; 1030 case KFD_QUEUE_TYPE_COMPUTE: 1031 seq_printf(m, " Compute queue on device %x\n", 1032 q->device->id); 1033 mqd_type = KFD_MQD_TYPE_CP; 1034 num_xccs = NUM_XCC(q->device->xcc_mask); 1035 break; 1036 default: 1037 seq_printf(m, 1038 " Bad user queue type %d on device %x\n", 1039 q->properties.type, q->device->id); 1040 continue; 1041 } 1042 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type]; 1043 size = mqd_mgr->mqd_stride(mqd_mgr, 1044 &q->properties); 1045 } else if (pqn->kq) { 1046 q = pqn->kq->queue; 1047 mqd_mgr = pqn->kq->mqd_mgr; 1048 switch (q->properties.type) { 1049 case KFD_QUEUE_TYPE_DIQ: 1050 seq_printf(m, " DIQ on device %x\n", 1051 pqn->kq->dev->id); 1052 break; 1053 default: 1054 seq_printf(m, 1055 " Bad kernel queue type %d on device %x\n", 1056 q->properties.type, 1057 pqn->kq->dev->id); 1058 continue; 1059 } 1060 } else { 1061 seq_printf(m, 1062 " Weird: Queue node with neither kernel nor user queue\n"); 1063 continue; 1064 } 1065 1066 for (xcc = 0; xcc < num_xccs; xcc++) { 1067 mqd = q->mqd + size * xcc; 1068 r = mqd_mgr->debugfs_show_mqd(m, mqd); 1069 if (r != 0) 1070 break; 1071 } 1072 } 1073 1074 return r; 1075 } 1076 1077 #endif 1078