1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/slab.h> 26 #include <linux/list.h> 27 #include "kfd_device_queue_manager.h" 28 #include "kfd_priv.h" 29 #include "kfd_kernel_queue.h" 30 #include "amdgpu_amdkfd.h" 31 #include "amdgpu_reset.h" 32 33 static inline struct process_queue_node *get_queue_by_qid( 34 struct process_queue_manager *pqm, unsigned int qid) 35 { 36 struct process_queue_node *pqn; 37 38 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 39 if ((pqn->q && pqn->q->properties.queue_id == qid) || 40 (pqn->kq && pqn->kq->queue->properties.queue_id == qid)) 41 return pqn; 42 } 43 44 return NULL; 45 } 46 47 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm, 48 unsigned int qid) 49 { 50 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 51 return -EINVAL; 52 53 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) { 54 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid); 55 return -ENOSPC; 56 } 57 58 return 0; 59 } 60 61 static int find_available_queue_slot(struct process_queue_manager *pqm, 62 unsigned int *qid) 63 { 64 unsigned long found; 65 66 found = find_first_zero_bit(pqm->queue_slot_bitmap, 67 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); 68 69 pr_debug("The new slot id %lu\n", found); 70 71 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) { 72 pr_info("Cannot open more queues for process with pasid 0x%x\n", 73 pqm->process->pasid); 74 return -ENOMEM; 75 } 76 77 set_bit(found, pqm->queue_slot_bitmap); 78 *qid = found; 79 80 return 0; 81 } 82 83 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 84 { 85 struct kfd_node *dev = pdd->dev; 86 87 if (pdd->already_dequeued) 88 return; 89 90 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); 91 if (dev->kfd->shared_resources.enable_mes && 92 down_read_trylock(&dev->adev->reset_domain->sem)) { 93 amdgpu_mes_flush_shader_debugger(dev->adev, 94 pdd->proc_ctx_gpu_addr); 95 up_read(&dev->adev->reset_domain->sem); 96 } 97 pdd->already_dequeued = true; 98 } 99 100 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 101 void *gws) 102 { 103 struct mqd_update_info minfo = {0}; 104 struct kfd_node *dev = NULL; 105 struct process_queue_node *pqn; 106 struct kfd_process_device *pdd; 107 struct kgd_mem *mem = NULL; 108 int ret; 109 110 pqn = get_queue_by_qid(pqm, qid); 111 if (!pqn) { 112 pr_err("Queue id does not match any known queue\n"); 113 return -EINVAL; 114 } 115 116 if (pqn->q) 117 dev = pqn->q->device; 118 if (WARN_ON(!dev)) 119 return -ENODEV; 120 121 pdd = kfd_get_process_device_data(dev, pqm->process); 122 if (!pdd) { 123 pr_err("Process device data doesn't exist\n"); 124 return -EINVAL; 125 } 126 127 /* Only allow one queue per process can have GWS assigned */ 128 if (gws && pdd->qpd.num_gws) 129 return -EBUSY; 130 131 if (!gws && pdd->qpd.num_gws == 0) 132 return -EINVAL; 133 134 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && 135 KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 4) && 136 !dev->kfd->shared_resources.enable_mes) { 137 if (gws) 138 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info, 139 gws, &mem); 140 else 141 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info, 142 pqn->q->gws); 143 if (unlikely(ret)) 144 return ret; 145 pqn->q->gws = mem; 146 } else { 147 /* 148 * Intentionally set GWS to a non-NULL value 149 * for devices that do not use GWS for global wave 150 * synchronization but require the formality 151 * of setting GWS for cooperative groups. 152 */ 153 pqn->q->gws = gws ? ERR_PTR(-ENOMEM) : NULL; 154 } 155 156 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; 157 minfo.update_flag = gws ? UPDATE_FLAG_IS_GWS : 0; 158 159 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 160 pqn->q, &minfo); 161 } 162 163 void kfd_process_dequeue_from_all_devices(struct kfd_process *p) 164 { 165 int i; 166 167 for (i = 0; i < p->n_pdds; i++) 168 kfd_process_dequeue_from_device(p->pdds[i]); 169 } 170 171 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) 172 { 173 INIT_LIST_HEAD(&pqm->queues); 174 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, 175 GFP_KERNEL); 176 if (!pqm->queue_slot_bitmap) 177 return -ENOMEM; 178 pqm->process = p; 179 180 return 0; 181 } 182 183 static void pqm_clean_queue_resource(struct process_queue_manager *pqm, 184 struct process_queue_node *pqn) 185 { 186 struct kfd_node *dev; 187 struct kfd_process_device *pdd; 188 189 dev = pqn->q->device; 190 191 pdd = kfd_get_process_device_data(dev, pqm->process); 192 if (!pdd) { 193 pr_err("Process device data doesn't exist\n"); 194 return; 195 } 196 197 if (pqn->q->gws) { 198 if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) && 199 KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 4) && 200 !dev->kfd->shared_resources.enable_mes) 201 amdgpu_amdkfd_remove_gws_from_process( 202 pqm->process->kgd_process_info, pqn->q->gws); 203 pdd->qpd.num_gws = 0; 204 } 205 206 if (dev->kfd->shared_resources.enable_mes) { 207 amdgpu_amdkfd_free_gtt_mem(dev->adev, &pqn->q->gang_ctx_bo); 208 amdgpu_amdkfd_free_gtt_mem(dev->adev, (void **)&pqn->q->wptr_bo_gart); 209 } 210 } 211 212 void pqm_uninit(struct process_queue_manager *pqm) 213 { 214 struct process_queue_node *pqn, *next; 215 struct kfd_process_device *pdd; 216 217 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) { 218 if (pqn->q) { 219 pdd = kfd_get_process_device_data(pqn->q->device, pqm->process); 220 kfd_queue_release_buffers(pdd, &pqn->q->properties); 221 pqm_clean_queue_resource(pqm, pqn); 222 } 223 224 kfd_procfs_del_queue(pqn->q); 225 uninit_queue(pqn->q); 226 list_del(&pqn->process_queue_list); 227 kfree(pqn); 228 } 229 230 bitmap_free(pqm->queue_slot_bitmap); 231 pqm->queue_slot_bitmap = NULL; 232 } 233 234 static int init_user_queue(struct process_queue_manager *pqm, 235 struct kfd_node *dev, struct queue **q, 236 struct queue_properties *q_properties, 237 struct file *f, unsigned int qid) 238 { 239 int retval; 240 241 /* Doorbell initialized in user space*/ 242 q_properties->doorbell_ptr = NULL; 243 q_properties->exception_status = KFD_EC_MASK(EC_QUEUE_NEW); 244 245 /* let DQM handle it*/ 246 q_properties->vmid = 0; 247 q_properties->queue_id = qid; 248 249 retval = init_queue(q, q_properties); 250 if (retval != 0) 251 return retval; 252 253 (*q)->device = dev; 254 (*q)->process = pqm->process; 255 256 if (dev->kfd->shared_resources.enable_mes) { 257 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, 258 AMDGPU_MES_GANG_CTX_SIZE, 259 &(*q)->gang_ctx_bo, 260 &(*q)->gang_ctx_gpu_addr, 261 &(*q)->gang_ctx_cpu_ptr, 262 false); 263 if (retval) { 264 pr_err("failed to allocate gang context bo\n"); 265 goto cleanup; 266 } 267 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE); 268 269 /* Starting with GFX11, wptr BOs must be mapped to GART for MES to determine work 270 * on unmapped queues for usermode queue oversubscription (no aggregated doorbell) 271 */ 272 if (((dev->adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK) 273 >> AMDGPU_MES_API_VERSION_SHIFT) >= 2) { 274 if (dev->adev != amdgpu_ttm_adev(q_properties->wptr_bo->tbo.bdev)) { 275 pr_err("Queue memory allocated to wrong device\n"); 276 retval = -EINVAL; 277 goto free_gang_ctx_bo; 278 } 279 280 retval = amdgpu_amdkfd_map_gtt_bo_to_gart(q_properties->wptr_bo, 281 &(*q)->wptr_bo_gart); 282 if (retval) { 283 pr_err("Failed to map wptr bo to GART\n"); 284 goto free_gang_ctx_bo; 285 } 286 } 287 } 288 289 pr_debug("PQM After init queue"); 290 return 0; 291 292 free_gang_ctx_bo: 293 amdgpu_amdkfd_free_gtt_mem(dev->adev, (*q)->gang_ctx_bo); 294 cleanup: 295 uninit_queue(*q); 296 *q = NULL; 297 return retval; 298 } 299 300 int pqm_create_queue(struct process_queue_manager *pqm, 301 struct kfd_node *dev, 302 struct file *f, 303 struct queue_properties *properties, 304 unsigned int *qid, 305 const struct kfd_criu_queue_priv_data *q_data, 306 const void *restore_mqd, 307 const void *restore_ctl_stack, 308 uint32_t *p_doorbell_offset_in_process) 309 { 310 int retval; 311 struct kfd_process_device *pdd; 312 struct queue *q; 313 struct process_queue_node *pqn; 314 struct kernel_queue *kq; 315 enum kfd_queue_type type = properties->type; 316 unsigned int max_queues = 127; /* HWS limit */ 317 318 /* 319 * On GFX 9.4.3, increase the number of queues that 320 * can be created to 255. No HWS limit on GFX 9.4.3. 321 */ 322 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3) || 323 KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 4)) 324 max_queues = 255; 325 326 q = NULL; 327 kq = NULL; 328 329 pdd = kfd_get_process_device_data(dev, pqm->process); 330 if (!pdd) { 331 pr_err("Process device data doesn't exist\n"); 332 return -1; 333 } 334 335 /* 336 * for debug process, verify that it is within the static queues limit 337 * currently limit is set to half of the total avail HQD slots 338 * If we are just about to create DIQ, the is_debug flag is not set yet 339 * Hence we also check the type as well 340 */ 341 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ)) 342 max_queues = dev->kfd->device_info.max_no_of_hqd/2; 343 344 if (pdd->qpd.queue_count >= max_queues) 345 return -ENOSPC; 346 347 if (q_data) { 348 retval = assign_queue_slot_by_qid(pqm, q_data->q_id); 349 *qid = q_data->q_id; 350 } else 351 retval = find_available_queue_slot(pqm, qid); 352 353 if (retval != 0) 354 return retval; 355 356 if (list_empty(&pdd->qpd.queues_list) && 357 list_empty(&pdd->qpd.priv_queue_list)) 358 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd); 359 360 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL); 361 if (!pqn) { 362 retval = -ENOMEM; 363 goto err_allocate_pqn; 364 } 365 366 switch (type) { 367 case KFD_QUEUE_TYPE_SDMA: 368 case KFD_QUEUE_TYPE_SDMA_XGMI: 369 /* SDMA queues are always allocated statically no matter 370 * which scheduler mode is used. We also do not need to 371 * check whether a SDMA queue can be allocated here, because 372 * allocate_sdma_queue() in create_queue() has the 373 * corresponding check logic. 374 */ 375 retval = init_user_queue(pqm, dev, &q, properties, f, *qid); 376 if (retval != 0) 377 goto err_create_queue; 378 pqn->q = q; 379 pqn->kq = NULL; 380 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 381 restore_mqd, restore_ctl_stack); 382 print_queue(q); 383 break; 384 385 case KFD_QUEUE_TYPE_COMPUTE: 386 /* check if there is over subscription */ 387 if ((dev->dqm->sched_policy == 388 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) && 389 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) || 390 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) { 391 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n"); 392 retval = -EPERM; 393 goto err_create_queue; 394 } 395 396 retval = init_user_queue(pqm, dev, &q, properties, f, *qid); 397 if (retval != 0) 398 goto err_create_queue; 399 pqn->q = q; 400 pqn->kq = NULL; 401 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data, 402 restore_mqd, restore_ctl_stack); 403 print_queue(q); 404 break; 405 case KFD_QUEUE_TYPE_DIQ: 406 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ); 407 if (!kq) { 408 retval = -ENOMEM; 409 goto err_create_queue; 410 } 411 kq->queue->properties.queue_id = *qid; 412 pqn->kq = kq; 413 pqn->q = NULL; 414 retval = kfd_process_drain_interrupts(pdd); 415 if (retval) 416 break; 417 418 retval = dev->dqm->ops.create_kernel_queue(dev->dqm, 419 kq, &pdd->qpd); 420 break; 421 default: 422 WARN(1, "Invalid queue type %d", type); 423 retval = -EINVAL; 424 } 425 426 if (retval != 0) { 427 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n", 428 pqm->process->pasid, type, retval); 429 goto err_create_queue; 430 } 431 432 if (q && p_doorbell_offset_in_process) { 433 /* Return the doorbell offset within the doorbell page 434 * to the caller so it can be passed up to user mode 435 * (in bytes). 436 * relative doorbell index = Absolute doorbell index - 437 * absolute index of first doorbell in the page. 438 */ 439 uint32_t first_db_index = amdgpu_doorbell_index_on_bar(pdd->dev->adev, 440 pdd->qpd.proc_doorbells, 441 0, 442 pdd->dev->kfd->device_info.doorbell_size); 443 444 *p_doorbell_offset_in_process = (q->properties.doorbell_off 445 - first_db_index) * sizeof(uint32_t); 446 } 447 448 pr_debug("PQM After DQM create queue\n"); 449 450 list_add(&pqn->process_queue_list, &pqm->queues); 451 452 if (q) { 453 pr_debug("PQM done creating queue\n"); 454 kfd_procfs_add_queue(q); 455 print_queue_properties(&q->properties); 456 } 457 458 return retval; 459 460 err_create_queue: 461 uninit_queue(q); 462 if (kq) 463 kernel_queue_uninit(kq); 464 kfree(pqn); 465 err_allocate_pqn: 466 /* check if queues list is empty unregister process from device */ 467 clear_bit(*qid, pqm->queue_slot_bitmap); 468 if (list_empty(&pdd->qpd.queues_list) && 469 list_empty(&pdd->qpd.priv_queue_list)) 470 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd); 471 return retval; 472 } 473 474 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) 475 { 476 struct process_queue_node *pqn; 477 struct kfd_process_device *pdd; 478 struct device_queue_manager *dqm; 479 struct kfd_node *dev; 480 int retval; 481 482 dqm = NULL; 483 484 retval = 0; 485 486 pqn = get_queue_by_qid(pqm, qid); 487 if (!pqn) { 488 pr_err("Queue id does not match any known queue\n"); 489 return -EINVAL; 490 } 491 492 dev = NULL; 493 if (pqn->kq) 494 dev = pqn->kq->dev; 495 if (pqn->q) 496 dev = pqn->q->device; 497 if (WARN_ON(!dev)) 498 return -ENODEV; 499 500 pdd = kfd_get_process_device_data(dev, pqm->process); 501 if (!pdd) { 502 pr_err("Process device data doesn't exist\n"); 503 return -1; 504 } 505 506 if (pqn->kq) { 507 /* destroy kernel queue (DIQ) */ 508 dqm = pqn->kq->dev->dqm; 509 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd); 510 kernel_queue_uninit(pqn->kq); 511 } 512 513 if (pqn->q) { 514 retval = kfd_queue_release_buffers(pdd, &pqn->q->properties); 515 if (retval) 516 goto err_destroy_queue; 517 518 kfd_procfs_del_queue(pqn->q); 519 dqm = pqn->q->device->dqm; 520 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q); 521 if (retval) { 522 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n", 523 pqm->process->pasid, 524 pqn->q->properties.queue_id, retval); 525 if (retval != -ETIME) 526 goto err_destroy_queue; 527 } 528 529 pqm_clean_queue_resource(pqm, pqn); 530 uninit_queue(pqn->q); 531 } 532 533 list_del(&pqn->process_queue_list); 534 kfree(pqn); 535 clear_bit(qid, pqm->queue_slot_bitmap); 536 537 if (list_empty(&pdd->qpd.queues_list) && 538 list_empty(&pdd->qpd.priv_queue_list)) 539 dqm->ops.unregister_process(dqm, &pdd->qpd); 540 541 err_destroy_queue: 542 return retval; 543 } 544 545 int pqm_update_queue_properties(struct process_queue_manager *pqm, 546 unsigned int qid, struct queue_properties *p) 547 { 548 int retval; 549 struct process_queue_node *pqn; 550 551 pqn = get_queue_by_qid(pqm, qid); 552 if (!pqn) { 553 pr_debug("No queue %d exists for update operation\n", qid); 554 return -EFAULT; 555 } 556 557 pqn->q->properties.queue_address = p->queue_address; 558 pqn->q->properties.queue_size = p->queue_size; 559 pqn->q->properties.queue_percent = p->queue_percent; 560 pqn->q->properties.priority = p->priority; 561 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc; 562 563 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 564 pqn->q, NULL); 565 if (retval != 0) 566 return retval; 567 568 return 0; 569 } 570 571 int pqm_update_mqd(struct process_queue_manager *pqm, 572 unsigned int qid, struct mqd_update_info *minfo) 573 { 574 int retval; 575 struct process_queue_node *pqn; 576 577 pqn = get_queue_by_qid(pqm, qid); 578 if (!pqn) { 579 pr_debug("No queue %d exists for update operation\n", qid); 580 return -EFAULT; 581 } 582 583 /* CUs are masked for debugger requirements so deny user mask */ 584 if (pqn->q->properties.is_dbg_wa && minfo && minfo->cu_mask.ptr) 585 return -EBUSY; 586 587 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */ 588 if (minfo && minfo->cu_mask.ptr && 589 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) { 590 int i; 591 592 for (i = 0; i < minfo->cu_mask.count; i += 2) { 593 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3; 594 595 if (cu_pair && cu_pair != 0x3) { 596 pr_debug("CUs must be adjacent pairwise enabled.\n"); 597 return -EINVAL; 598 } 599 } 600 } 601 602 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm, 603 pqn->q, minfo); 604 if (retval != 0) 605 return retval; 606 607 if (minfo && minfo->cu_mask.ptr) 608 pqn->q->properties.is_user_cu_masked = true; 609 610 return 0; 611 } 612 613 struct kernel_queue *pqm_get_kernel_queue( 614 struct process_queue_manager *pqm, 615 unsigned int qid) 616 { 617 struct process_queue_node *pqn; 618 619 pqn = get_queue_by_qid(pqm, qid); 620 if (pqn && pqn->kq) 621 return pqn->kq; 622 623 return NULL; 624 } 625 626 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 627 unsigned int qid) 628 { 629 struct process_queue_node *pqn; 630 631 pqn = get_queue_by_qid(pqm, qid); 632 return pqn ? pqn->q : NULL; 633 } 634 635 int pqm_get_wave_state(struct process_queue_manager *pqm, 636 unsigned int qid, 637 void __user *ctl_stack, 638 u32 *ctl_stack_used_size, 639 u32 *save_area_used_size) 640 { 641 struct process_queue_node *pqn; 642 643 pqn = get_queue_by_qid(pqm, qid); 644 if (!pqn) { 645 pr_debug("amdkfd: No queue %d exists for operation\n", 646 qid); 647 return -EFAULT; 648 } 649 650 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm, 651 pqn->q, 652 ctl_stack, 653 ctl_stack_used_size, 654 save_area_used_size); 655 } 656 657 int pqm_get_queue_snapshot(struct process_queue_manager *pqm, 658 uint64_t exception_clear_mask, 659 void __user *buf, 660 int *num_qss_entries, 661 uint32_t *entry_size) 662 { 663 struct process_queue_node *pqn; 664 struct kfd_queue_snapshot_entry src; 665 uint32_t tmp_entry_size = *entry_size, tmp_qss_entries = *num_qss_entries; 666 int r = 0; 667 668 *num_qss_entries = 0; 669 if (!(*entry_size)) 670 return -EINVAL; 671 672 *entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry)); 673 mutex_lock(&pqm->process->event_mutex); 674 675 memset(&src, 0, sizeof(src)); 676 677 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 678 if (!pqn->q) 679 continue; 680 681 if (*num_qss_entries < tmp_qss_entries) { 682 set_queue_snapshot_entry(pqn->q, exception_clear_mask, &src); 683 684 if (copy_to_user(buf, &src, *entry_size)) { 685 r = -EFAULT; 686 break; 687 } 688 buf += tmp_entry_size; 689 } 690 *num_qss_entries += 1; 691 } 692 693 mutex_unlock(&pqm->process->event_mutex); 694 return r; 695 } 696 697 static int get_queue_data_sizes(struct kfd_process_device *pdd, 698 struct queue *q, 699 uint32_t *mqd_size, 700 uint32_t *ctl_stack_size) 701 { 702 int ret; 703 704 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm, 705 q->properties.queue_id, 706 mqd_size, 707 ctl_stack_size); 708 if (ret) 709 pr_err("Failed to get queue dump info (%d)\n", ret); 710 711 return ret; 712 } 713 714 int kfd_process_get_queue_info(struct kfd_process *p, 715 uint32_t *num_queues, 716 uint64_t *priv_data_sizes) 717 { 718 uint32_t extra_data_sizes = 0; 719 struct queue *q; 720 int i; 721 int ret; 722 723 *num_queues = 0; 724 725 /* Run over all PDDs of the process */ 726 for (i = 0; i < p->n_pdds; i++) { 727 struct kfd_process_device *pdd = p->pdds[i]; 728 729 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 730 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || 731 q->properties.type == KFD_QUEUE_TYPE_SDMA || 732 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { 733 uint32_t mqd_size, ctl_stack_size; 734 735 *num_queues = *num_queues + 1; 736 737 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 738 if (ret) 739 return ret; 740 741 extra_data_sizes += mqd_size + ctl_stack_size; 742 } else { 743 pr_err("Unsupported queue type (%d)\n", q->properties.type); 744 return -EOPNOTSUPP; 745 } 746 } 747 } 748 *priv_data_sizes = extra_data_sizes + 749 (*num_queues * sizeof(struct kfd_criu_queue_priv_data)); 750 751 return 0; 752 } 753 754 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm, 755 unsigned int qid, 756 void *mqd, 757 void *ctl_stack) 758 { 759 struct process_queue_node *pqn; 760 761 pqn = get_queue_by_qid(pqm, qid); 762 if (!pqn) { 763 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 764 return -EFAULT; 765 } 766 767 if (!pqn->q->device->dqm->ops.checkpoint_mqd) { 768 pr_err("amdkfd: queue dumping not supported on this device\n"); 769 return -EOPNOTSUPP; 770 } 771 772 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm, 773 pqn->q, mqd, ctl_stack); 774 } 775 776 static int criu_checkpoint_queue(struct kfd_process_device *pdd, 777 struct queue *q, 778 struct kfd_criu_queue_priv_data *q_data) 779 { 780 uint8_t *mqd, *ctl_stack; 781 int ret; 782 783 mqd = (void *)(q_data + 1); 784 ctl_stack = mqd + q_data->mqd_size; 785 786 q_data->gpu_id = pdd->user_gpu_id; 787 q_data->type = q->properties.type; 788 q_data->format = q->properties.format; 789 q_data->q_id = q->properties.queue_id; 790 q_data->q_address = q->properties.queue_address; 791 q_data->q_size = q->properties.queue_size; 792 q_data->priority = q->properties.priority; 793 q_data->q_percent = q->properties.queue_percent; 794 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr; 795 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr; 796 q_data->doorbell_id = q->doorbell_id; 797 798 q_data->sdma_id = q->sdma_id; 799 800 q_data->eop_ring_buffer_address = 801 q->properties.eop_ring_buffer_address; 802 803 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size; 804 805 q_data->ctx_save_restore_area_address = 806 q->properties.ctx_save_restore_area_address; 807 808 q_data->ctx_save_restore_area_size = 809 q->properties.ctx_save_restore_area_size; 810 811 q_data->gws = !!q->gws; 812 813 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); 814 if (ret) { 815 pr_err("Failed checkpoint queue_mqd (%d)\n", ret); 816 return ret; 817 } 818 819 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id); 820 return ret; 821 } 822 823 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd, 824 uint8_t __user *user_priv, 825 unsigned int *q_index, 826 uint64_t *queues_priv_data_offset) 827 { 828 unsigned int q_private_data_size = 0; 829 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */ 830 struct queue *q; 831 int ret = 0; 832 833 list_for_each_entry(q, &pdd->qpd.queues_list, list) { 834 struct kfd_criu_queue_priv_data *q_data; 835 uint64_t q_data_size; 836 uint32_t mqd_size; 837 uint32_t ctl_stack_size; 838 839 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE && 840 q->properties.type != KFD_QUEUE_TYPE_SDMA && 841 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) { 842 843 pr_err("Unsupported queue type (%d)\n", q->properties.type); 844 ret = -EOPNOTSUPP; 845 break; 846 } 847 848 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size); 849 if (ret) 850 break; 851 852 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size; 853 854 /* Increase local buffer space if needed */ 855 if (q_private_data_size < q_data_size) { 856 kfree(q_private_data); 857 858 q_private_data = kzalloc(q_data_size, GFP_KERNEL); 859 if (!q_private_data) { 860 ret = -ENOMEM; 861 break; 862 } 863 q_private_data_size = q_data_size; 864 } 865 866 q_data = (struct kfd_criu_queue_priv_data *)q_private_data; 867 868 /* data stored in this order: priv_data, mqd, ctl_stack */ 869 q_data->mqd_size = mqd_size; 870 q_data->ctl_stack_size = ctl_stack_size; 871 872 ret = criu_checkpoint_queue(pdd, q, q_data); 873 if (ret) 874 break; 875 876 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE; 877 878 ret = copy_to_user(user_priv + *queues_priv_data_offset, 879 q_data, q_data_size); 880 if (ret) { 881 ret = -EFAULT; 882 break; 883 } 884 *queues_priv_data_offset += q_data_size; 885 *q_index = *q_index + 1; 886 } 887 888 kfree(q_private_data); 889 890 return ret; 891 } 892 893 int kfd_criu_checkpoint_queues(struct kfd_process *p, 894 uint8_t __user *user_priv_data, 895 uint64_t *priv_data_offset) 896 { 897 int ret = 0, pdd_index, q_index = 0; 898 899 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 900 struct kfd_process_device *pdd = p->pdds[pdd_index]; 901 902 /* 903 * criu_checkpoint_queues_device will copy data to user and update q_index and 904 * queues_priv_data_offset 905 */ 906 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index, 907 priv_data_offset); 908 909 if (ret) 910 break; 911 } 912 913 return ret; 914 } 915 916 static void set_queue_properties_from_criu(struct queue_properties *qp, 917 struct kfd_criu_queue_priv_data *q_data) 918 { 919 qp->is_interop = false; 920 qp->queue_percent = q_data->q_percent; 921 qp->priority = q_data->priority; 922 qp->queue_address = q_data->q_address; 923 qp->queue_size = q_data->q_size; 924 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr; 925 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr; 926 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address; 927 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size; 928 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address; 929 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size; 930 qp->ctl_stack_size = q_data->ctl_stack_size; 931 qp->type = q_data->type; 932 qp->format = q_data->format; 933 } 934 935 int kfd_criu_restore_queue(struct kfd_process *p, 936 uint8_t __user *user_priv_ptr, 937 uint64_t *priv_data_offset, 938 uint64_t max_priv_data_size) 939 { 940 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL; 941 struct kfd_criu_queue_priv_data *q_data; 942 struct kfd_process_device *pdd; 943 uint64_t q_extra_data_size; 944 struct queue_properties qp; 945 unsigned int queue_id; 946 int ret = 0; 947 948 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size) 949 return -EINVAL; 950 951 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL); 952 if (!q_data) 953 return -ENOMEM; 954 955 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data)); 956 if (ret) { 957 ret = -EFAULT; 958 goto exit; 959 } 960 961 *priv_data_offset += sizeof(*q_data); 962 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size; 963 964 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) { 965 ret = -EINVAL; 966 goto exit; 967 } 968 969 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL); 970 if (!q_extra_data) { 971 ret = -ENOMEM; 972 goto exit; 973 } 974 975 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size); 976 if (ret) { 977 ret = -EFAULT; 978 goto exit; 979 } 980 981 *priv_data_offset += q_extra_data_size; 982 983 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id); 984 if (!pdd) { 985 pr_err("Failed to get pdd\n"); 986 ret = -EINVAL; 987 goto exit; 988 } 989 990 /* data stored in this order: mqd, ctl_stack */ 991 mqd = q_extra_data; 992 ctl_stack = mqd + q_data->mqd_size; 993 994 memset(&qp, 0, sizeof(qp)); 995 set_queue_properties_from_criu(&qp, q_data); 996 997 print_queue_properties(&qp); 998 999 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, q_data, mqd, ctl_stack, 1000 NULL); 1001 if (ret) { 1002 pr_err("Failed to create new queue err:%d\n", ret); 1003 goto exit; 1004 } 1005 1006 if (q_data->gws) 1007 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); 1008 1009 exit: 1010 if (ret) 1011 pr_err("Failed to restore queue (%d)\n", ret); 1012 else 1013 pr_debug("Queue id %d was restored successfully\n", queue_id); 1014 1015 kfree(q_data); 1016 1017 return ret; 1018 } 1019 1020 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 1021 unsigned int qid, 1022 uint32_t *mqd_size, 1023 uint32_t *ctl_stack_size) 1024 { 1025 struct process_queue_node *pqn; 1026 1027 pqn = get_queue_by_qid(pqm, qid); 1028 if (!pqn) { 1029 pr_debug("amdkfd: No queue %d exists for operation\n", qid); 1030 return -EFAULT; 1031 } 1032 1033 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) { 1034 pr_err("amdkfd: queue dumping not supported on this device\n"); 1035 return -EOPNOTSUPP; 1036 } 1037 1038 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm, 1039 pqn->q, mqd_size, 1040 ctl_stack_size); 1041 return 0; 1042 } 1043 1044 #if defined(CONFIG_DEBUG_FS) 1045 1046 int pqm_debugfs_mqds(struct seq_file *m, void *data) 1047 { 1048 struct process_queue_manager *pqm = data; 1049 struct process_queue_node *pqn; 1050 struct queue *q; 1051 enum KFD_MQD_TYPE mqd_type; 1052 struct mqd_manager *mqd_mgr; 1053 int r = 0, xcc, num_xccs = 1; 1054 void *mqd; 1055 uint64_t size = 0; 1056 1057 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1058 if (pqn->q) { 1059 q = pqn->q; 1060 switch (q->properties.type) { 1061 case KFD_QUEUE_TYPE_SDMA: 1062 case KFD_QUEUE_TYPE_SDMA_XGMI: 1063 seq_printf(m, " SDMA queue on device %x\n", 1064 q->device->id); 1065 mqd_type = KFD_MQD_TYPE_SDMA; 1066 break; 1067 case KFD_QUEUE_TYPE_COMPUTE: 1068 seq_printf(m, " Compute queue on device %x\n", 1069 q->device->id); 1070 mqd_type = KFD_MQD_TYPE_CP; 1071 num_xccs = NUM_XCC(q->device->xcc_mask); 1072 break; 1073 default: 1074 seq_printf(m, 1075 " Bad user queue type %d on device %x\n", 1076 q->properties.type, q->device->id); 1077 continue; 1078 } 1079 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type]; 1080 size = mqd_mgr->mqd_stride(mqd_mgr, 1081 &q->properties); 1082 } else if (pqn->kq) { 1083 q = pqn->kq->queue; 1084 mqd_mgr = pqn->kq->mqd_mgr; 1085 switch (q->properties.type) { 1086 case KFD_QUEUE_TYPE_DIQ: 1087 seq_printf(m, " DIQ on device %x\n", 1088 pqn->kq->dev->id); 1089 break; 1090 default: 1091 seq_printf(m, 1092 " Bad kernel queue type %d on device %x\n", 1093 q->properties.type, 1094 pqn->kq->dev->id); 1095 continue; 1096 } 1097 } else { 1098 seq_printf(m, 1099 " Weird: Queue node with neither kernel nor user queue\n"); 1100 continue; 1101 } 1102 1103 for (xcc = 0; xcc < num_xccs; xcc++) { 1104 mqd = q->mqd + size * xcc; 1105 r = mqd_mgr->debugfs_show_mqd(m, mqd); 1106 if (r != 0) 1107 break; 1108 } 1109 } 1110 1111 return r; 1112 } 1113 1114 #endif 1115