1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 28 #include "amdgpu.h" 29 #include "isp_v4_1_0.h" 30 31 static const unsigned int isp_4_1_0_int_srcid[MAX_ISP410_INT_SRC] = { 32 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT9, 33 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT10, 34 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT11, 35 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT12, 36 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT13, 37 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT14, 38 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT15, 39 ISP_4_1__SRCID__ISP_RINGBUFFER_WPT16 40 }; 41 42 static int isp_v4_1_0_hw_init(struct amdgpu_isp *isp) 43 { 44 struct amdgpu_device *adev = isp->adev; 45 int idx, int_idx, num_res, r; 46 u64 isp_base; 47 48 if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289) 49 return -EINVAL; 50 51 isp_base = adev->rmmio_base; 52 53 isp->isp_cell = kcalloc(2, sizeof(struct mfd_cell), GFP_KERNEL); 54 if (!isp->isp_cell) { 55 r = -ENOMEM; 56 drm_err(&adev->ddev, 57 "%s: isp mfd cell alloc failed\n", __func__); 58 goto failure; 59 } 60 61 num_res = MAX_ISP410_MEM_RES + MAX_ISP410_SENSOR_RES + MAX_ISP410_INT_SRC; 62 isp->isp_res = kcalloc(num_res, sizeof(struct resource), 63 GFP_KERNEL); 64 if (!isp->isp_res) { 65 r = -ENOMEM; 66 drm_err(&adev->ddev, 67 "%s: isp mfd res alloc failed\n", __func__); 68 goto failure; 69 } 70 71 isp->isp_pdata = kzalloc(sizeof(*isp->isp_pdata), GFP_KERNEL); 72 if (!isp->isp_pdata) { 73 r = -ENOMEM; 74 drm_err(&adev->ddev, 75 "%s: isp platform data alloc failed\n", __func__); 76 goto failure; 77 } 78 79 /* initialize isp platform data */ 80 isp->isp_pdata->adev = (void *)adev; 81 isp->isp_pdata->asic_type = adev->asic_type; 82 isp->isp_pdata->base_rmmio_size = adev->rmmio_size; 83 84 isp->isp_res[0].name = "isp_4_1_0_reg"; 85 isp->isp_res[0].flags = IORESOURCE_MEM; 86 isp->isp_res[0].start = isp_base; 87 isp->isp_res[0].end = isp_base + ISP_REGS_OFFSET_END; 88 89 isp->isp_res[1].name = "isp_4_1_phy0_reg"; 90 isp->isp_res[1].flags = IORESOURCE_MEM; 91 isp->isp_res[1].start = isp_base + ISP410_PHY0_OFFSET; 92 isp->isp_res[1].end = isp_base + ISP410_PHY0_OFFSET + ISP410_PHY0_SIZE; 93 94 isp->isp_res[2].name = "isp_gpio_sensor0_reg"; 95 isp->isp_res[2].flags = IORESOURCE_MEM; 96 isp->isp_res[2].start = isp_base + ISP410_GPIO_SENSOR0_OFFSET; 97 isp->isp_res[2].end = isp_base + ISP410_GPIO_SENSOR0_OFFSET + 98 ISP410_GPIO_SENSOR0_SIZE; 99 100 for (idx = MAX_ISP410_MEM_RES + MAX_ISP410_SENSOR_RES, int_idx = 0; 101 idx < num_res; idx++, int_idx++) { 102 isp->isp_res[idx].name = "isp_4_1_0_irq"; 103 isp->isp_res[idx].flags = IORESOURCE_IRQ; 104 isp->isp_res[idx].start = 105 amdgpu_irq_create_mapping(adev, isp_4_1_0_int_srcid[int_idx]); 106 isp->isp_res[idx].end = 107 isp->isp_res[idx].start; 108 } 109 110 isp->isp_cell[0].name = "amd_isp_capture"; 111 isp->isp_cell[0].num_resources = num_res; 112 isp->isp_cell[0].resources = &isp->isp_res[0]; 113 isp->isp_cell[0].platform_data = isp->isp_pdata; 114 isp->isp_cell[0].pdata_size = sizeof(struct isp_platform_data); 115 116 isp->isp_i2c_res = kcalloc(1, sizeof(struct resource), 117 GFP_KERNEL); 118 if (!isp->isp_i2c_res) { 119 r = -ENOMEM; 120 drm_err(&adev->ddev, 121 "%s: isp mfd res alloc failed\n", __func__); 122 goto failure; 123 } 124 125 isp->isp_i2c_res[0].name = "isp_i2c0_reg"; 126 isp->isp_i2c_res[0].flags = IORESOURCE_MEM; 127 isp->isp_i2c_res[0].start = isp_base + ISP410_I2C0_OFFSET; 128 isp->isp_i2c_res[0].end = isp_base + ISP410_I2C0_OFFSET + ISP410_I2C0_SIZE; 129 130 isp->isp_cell[1].name = "amd_isp_i2c_designware"; 131 isp->isp_cell[1].num_resources = 1; 132 isp->isp_cell[1].resources = &isp->isp_i2c_res[0]; 133 isp->isp_cell[1].platform_data = isp->isp_pdata; 134 isp->isp_cell[1].pdata_size = sizeof(struct isp_platform_data); 135 136 r = mfd_add_hotplug_devices(isp->parent, isp->isp_cell, 2); 137 if (r) { 138 drm_err(&adev->ddev, 139 "%s: add mfd hotplug device failed\n", __func__); 140 goto failure; 141 } 142 143 return 0; 144 145 failure: 146 147 kfree(isp->isp_pdata); 148 kfree(isp->isp_res); 149 kfree(isp->isp_cell); 150 kfree(isp->isp_i2c_res); 151 152 return r; 153 } 154 155 static int isp_v4_1_0_hw_fini(struct amdgpu_isp *isp) 156 { 157 mfd_remove_devices(isp->parent); 158 159 kfree(isp->isp_res); 160 kfree(isp->isp_cell); 161 kfree(isp->isp_pdata); 162 kfree(isp->isp_i2c_res); 163 164 return 0; 165 } 166 167 static const struct isp_funcs isp_v4_1_0_funcs = { 168 .hw_init = isp_v4_1_0_hw_init, 169 .hw_fini = isp_v4_1_0_hw_fini, 170 }; 171 172 void isp_v4_1_0_set_isp_funcs(struct amdgpu_isp *isp) 173 { 174 isp->funcs = &isp_v4_1_0_funcs; 175 } 176