1*d38ceaf9SAlex Deucher /*
2*d38ceaf9SAlex Deucher  * Copyright 2014 Advanced Micro Devices, Inc.
3*d38ceaf9SAlex Deucher  *
4*d38ceaf9SAlex Deucher  * Permission is hereby granted, free of charge, to any person obtaining a
5*d38ceaf9SAlex Deucher  * copy of this software and associated documentation files (the "Software"),
6*d38ceaf9SAlex Deucher  * to deal in the Software without restriction, including without limitation
7*d38ceaf9SAlex Deucher  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*d38ceaf9SAlex Deucher  * and/or sell copies of the Software, and to permit persons to whom the
9*d38ceaf9SAlex Deucher  * Software is furnished to do so, subject to the following conditions:
10*d38ceaf9SAlex Deucher  *
11*d38ceaf9SAlex Deucher  * The above copyright notice and this permission notice shall be included in
12*d38ceaf9SAlex Deucher  * all copies or substantial portions of the Software.
13*d38ceaf9SAlex Deucher  *
14*d38ceaf9SAlex Deucher  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*d38ceaf9SAlex Deucher  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*d38ceaf9SAlex Deucher  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*d38ceaf9SAlex Deucher  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*d38ceaf9SAlex Deucher  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*d38ceaf9SAlex Deucher  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*d38ceaf9SAlex Deucher  * OTHER DEALINGS IN THE SOFTWARE.
21*d38ceaf9SAlex Deucher  *
22*d38ceaf9SAlex Deucher  */
23*d38ceaf9SAlex Deucher 
24*d38ceaf9SAlex Deucher #ifndef __AMDGPU_PLL_H__
25*d38ceaf9SAlex Deucher #define __AMDGPU_PLL_H__
26*d38ceaf9SAlex Deucher 
27*d38ceaf9SAlex Deucher void amdgpu_pll_compute(struct amdgpu_pll *pll,
28*d38ceaf9SAlex Deucher 			 u32 freq,
29*d38ceaf9SAlex Deucher 			 u32 *dot_clock_p,
30*d38ceaf9SAlex Deucher 			 u32 *fb_div_p,
31*d38ceaf9SAlex Deucher 			 u32 *frac_fb_div_p,
32*d38ceaf9SAlex Deucher 			 u32 *ref_div_p,
33*d38ceaf9SAlex Deucher 			 u32 *post_div_p);
34*d38ceaf9SAlex Deucher u32 amdgpu_pll_get_use_mask(struct drm_crtc *crtc);
35*d38ceaf9SAlex Deucher int amdgpu_pll_get_shared_dp_ppll(struct drm_crtc *crtc);
36*d38ceaf9SAlex Deucher int amdgpu_pll_get_shared_nondp_ppll(struct drm_crtc *crtc);
37*d38ceaf9SAlex Deucher 
38*d38ceaf9SAlex Deucher #endif
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