1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 28 #include <linux/firmware.h> 29 #include <linux/mfd/core.h> 30 31 #include "amdgpu.h" 32 #include "amdgpu_isp.h" 33 #include "isp_v4_1_0.h" 34 #include "isp_v4_1_1.h" 35 36 static int isp_sw_fini(struct amdgpu_ip_block *ip_block) 37 { 38 return 0; 39 } 40 41 /** 42 * isp_hw_init - start and test isp block 43 * 44 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 45 * 46 */ 47 static int isp_hw_init(struct amdgpu_ip_block *ip_block) 48 { 49 struct amdgpu_device *adev = ip_block->adev; 50 struct amdgpu_isp *isp = &adev->isp; 51 52 if (isp->funcs->hw_init != NULL) 53 return isp->funcs->hw_init(isp); 54 55 return -ENODEV; 56 } 57 58 /** 59 * isp_hw_fini - stop the hardware block 60 * 61 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 62 * 63 */ 64 static int isp_hw_fini(struct amdgpu_ip_block *ip_block) 65 { 66 struct amdgpu_isp *isp = &ip_block->adev->isp; 67 68 if (isp->funcs->hw_fini != NULL) 69 return isp->funcs->hw_fini(isp); 70 71 return -ENODEV; 72 } 73 74 static int isp_suspend(struct amdgpu_ip_block *ip_block) 75 { 76 return 0; 77 } 78 79 static int isp_resume(struct amdgpu_ip_block *ip_block) 80 { 81 return 0; 82 } 83 84 static int isp_load_fw_by_psp(struct amdgpu_device *adev) 85 { 86 const struct common_firmware_header *hdr; 87 char ucode_prefix[10]; 88 int r = 0; 89 90 /* get isp fw binary name and path */ 91 amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix, 92 sizeof(ucode_prefix)); 93 94 /* read isp fw */ 95 r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix); 96 if (r) { 97 amdgpu_ucode_release(&adev->isp.fw); 98 return r; 99 } 100 101 hdr = (const struct common_firmware_header *)adev->isp.fw->data; 102 103 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id = 104 AMDGPU_UCODE_ID_ISP; 105 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw; 106 107 adev->firmware.fw_size += 108 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE); 109 110 return r; 111 } 112 113 static int isp_early_init(struct amdgpu_ip_block *ip_block) 114 { 115 116 struct amdgpu_device *adev = ip_block->adev; 117 struct amdgpu_isp *isp = &adev->isp; 118 119 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { 120 case IP_VERSION(4, 1, 0): 121 isp_v4_1_0_set_isp_funcs(isp); 122 break; 123 case IP_VERSION(4, 1, 1): 124 isp_v4_1_1_set_isp_funcs(isp); 125 break; 126 default: 127 return -EINVAL; 128 } 129 130 isp->adev = adev; 131 isp->parent = adev->dev; 132 133 if (isp_load_fw_by_psp(adev)) { 134 DRM_DEBUG_DRIVER("%s: isp fw load failed\n", __func__); 135 return -ENOENT; 136 } 137 138 return 0; 139 } 140 141 static bool isp_is_idle(void *handle) 142 { 143 return true; 144 } 145 146 static int isp_wait_for_idle(struct amdgpu_ip_block *ip_block) 147 { 148 return 0; 149 } 150 151 static int isp_soft_reset(struct amdgpu_ip_block *ip_block) 152 { 153 return 0; 154 } 155 156 static int isp_set_clockgating_state(void *handle, 157 enum amd_clockgating_state state) 158 { 159 return 0; 160 } 161 162 static int isp_set_powergating_state(void *handle, 163 enum amd_powergating_state state) 164 { 165 return 0; 166 } 167 168 static const struct amd_ip_funcs isp_ip_funcs = { 169 .name = "isp_ip", 170 .early_init = isp_early_init, 171 .late_init = NULL, 172 .sw_fini = isp_sw_fini, 173 .hw_init = isp_hw_init, 174 .hw_fini = isp_hw_fini, 175 .suspend = isp_suspend, 176 .resume = isp_resume, 177 .is_idle = isp_is_idle, 178 .wait_for_idle = isp_wait_for_idle, 179 .soft_reset = isp_soft_reset, 180 .set_clockgating_state = isp_set_clockgating_state, 181 .set_powergating_state = isp_set_powergating_state, 182 }; 183 184 const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = { 185 .type = AMD_IP_BLOCK_TYPE_ISP, 186 .major = 4, 187 .minor = 1, 188 .rev = 0, 189 .funcs = &isp_ip_funcs, 190 }; 191 192 const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = { 193 .type = AMD_IP_BLOCK_TYPE_ISP, 194 .major = 4, 195 .minor = 1, 196 .rev = 1, 197 .funcs = &isp_ip_funcs, 198 }; 199