1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 28 #include <linux/firmware.h> 29 #include <linux/mfd/core.h> 30 31 #include "amdgpu.h" 32 #include "amdgpu_isp.h" 33 #include "isp_v4_1_0.h" 34 #include "isp_v4_1_1.h" 35 36 static int isp_sw_init(void *handle) 37 { 38 return 0; 39 } 40 41 static int isp_sw_fini(void *handle) 42 { 43 return 0; 44 } 45 46 /** 47 * isp_hw_init - start and test isp block 48 * 49 * @handle: handle for amdgpu_device pointer 50 * 51 */ 52 static int isp_hw_init(void *handle) 53 { 54 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 55 struct amdgpu_isp *isp = &adev->isp; 56 57 const struct amdgpu_ip_block *ip_block = 58 amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ISP); 59 60 if (!ip_block) 61 return -EINVAL; 62 63 if (isp->funcs->hw_init != NULL) 64 return isp->funcs->hw_init(isp); 65 66 return -ENODEV; 67 } 68 69 /** 70 * isp_hw_fini - stop the hardware block 71 * 72 * @handle: handle for amdgpu_device pointer 73 * 74 */ 75 static int isp_hw_fini(void *handle) 76 { 77 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 78 struct amdgpu_isp *isp = &adev->isp; 79 80 if (isp->funcs->hw_fini != NULL) 81 return isp->funcs->hw_fini(isp); 82 83 return -ENODEV; 84 } 85 86 static int isp_suspend(void *handle) 87 { 88 return 0; 89 } 90 91 static int isp_resume(void *handle) 92 { 93 return 0; 94 } 95 96 static int isp_load_fw_by_psp(struct amdgpu_device *adev) 97 { 98 const struct common_firmware_header *hdr; 99 char ucode_prefix[30]; 100 char fw_name[40]; 101 int r = 0; 102 103 /* get isp fw binary name and path */ 104 amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix, 105 sizeof(ucode_prefix)); 106 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s.bin", ucode_prefix); 107 108 /* read isp fw */ 109 r = amdgpu_ucode_request(adev, &adev->isp.fw, fw_name); 110 if (r) { 111 amdgpu_ucode_release(&adev->isp.fw); 112 return r; 113 } 114 115 hdr = (const struct common_firmware_header *)adev->isp.fw->data; 116 117 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id = 118 AMDGPU_UCODE_ID_ISP; 119 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw; 120 121 adev->firmware.fw_size += 122 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE); 123 124 return r; 125 } 126 127 static int isp_early_init(void *handle) 128 { 129 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 130 struct amdgpu_isp *isp = &adev->isp; 131 132 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { 133 case IP_VERSION(4, 1, 0): 134 isp_v4_1_0_set_isp_funcs(isp); 135 break; 136 case IP_VERSION(4, 1, 1): 137 isp_v4_1_1_set_isp_funcs(isp); 138 break; 139 default: 140 return -EINVAL; 141 } 142 143 isp->adev = adev; 144 isp->parent = adev->dev; 145 146 if (isp_load_fw_by_psp(adev)) { 147 DRM_WARN("%s: isp fw load failed\n", __func__); 148 return 0; 149 } 150 151 return 0; 152 } 153 154 static bool isp_is_idle(void *handle) 155 { 156 return true; 157 } 158 159 static int isp_wait_for_idle(void *handle) 160 { 161 return 0; 162 } 163 164 static int isp_soft_reset(void *handle) 165 { 166 return 0; 167 } 168 169 static int isp_set_clockgating_state(void *handle, 170 enum amd_clockgating_state state) 171 { 172 return 0; 173 } 174 175 static int isp_set_powergating_state(void *handle, 176 enum amd_powergating_state state) 177 { 178 return 0; 179 } 180 181 static const struct amd_ip_funcs isp_ip_funcs = { 182 .name = "isp_ip", 183 .early_init = isp_early_init, 184 .late_init = NULL, 185 .sw_init = isp_sw_init, 186 .sw_fini = isp_sw_fini, 187 .hw_init = isp_hw_init, 188 .hw_fini = isp_hw_fini, 189 .suspend = isp_suspend, 190 .resume = isp_resume, 191 .is_idle = isp_is_idle, 192 .wait_for_idle = isp_wait_for_idle, 193 .soft_reset = isp_soft_reset, 194 .set_clockgating_state = isp_set_clockgating_state, 195 .set_powergating_state = isp_set_powergating_state, 196 }; 197 198 const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = { 199 .type = AMD_IP_BLOCK_TYPE_ISP, 200 .major = 4, 201 .minor = 1, 202 .rev = 0, 203 .funcs = &isp_ip_funcs, 204 }; 205 206 const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = { 207 .type = AMD_IP_BLOCK_TYPE_ISP, 208 .major = 4, 209 .minor = 1, 210 .rev = 1, 211 .funcs = &isp_ip_funcs, 212 }; 213