1b0fb632fSHarry Wentland /*
2b0fb632fSHarry Wentland  * Copyright 2017 Advanced Micro Devices, Inc.
3b0fb632fSHarry Wentland  *
4b0fb632fSHarry Wentland  * Permission is hereby granted, free of charge, to any person obtaining a
5b0fb632fSHarry Wentland  * copy of this software and associated documentation files (the "Software"),
6b0fb632fSHarry Wentland  * to deal in the Software without restriction, including without limitation
7b0fb632fSHarry Wentland  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b0fb632fSHarry Wentland  * and/or sell copies of the Software, and to permit persons to whom the
9b0fb632fSHarry Wentland  * Software is furnished to do so, subject to the following conditions:
10b0fb632fSHarry Wentland  *
11b0fb632fSHarry Wentland  * The above copyright notice and this permission notice shall be included in
12b0fb632fSHarry Wentland  * all copies or substantial portions of the Software.
13b0fb632fSHarry Wentland  *
14b0fb632fSHarry Wentland  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15b0fb632fSHarry Wentland  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16b0fb632fSHarry Wentland  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17b0fb632fSHarry Wentland  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18b0fb632fSHarry Wentland  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19b0fb632fSHarry Wentland  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20b0fb632fSHarry Wentland  * OTHER DEALINGS IN THE SOFTWARE.
21b0fb632fSHarry Wentland  *
22b0fb632fSHarry Wentland  */
23b0fb632fSHarry Wentland #ifndef __AMDGPU_DISPLAY_H__
24b0fb632fSHarry Wentland #define __AMDGPU_DISPLAY_H__
25b0fb632fSHarry Wentland 
26*fe151ed7SAlex Deucher #include <drm/drm_panic.h>
27*fe151ed7SAlex Deucher 
285df58525SHuang Rui #define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))
295df58525SHuang Rui #define amdgpu_display_backlight_set_level(adev, e, l) (adev)->mode_info.funcs->backlight_set_level((e), (l))
305df58525SHuang Rui #define amdgpu_display_backlight_get_level(adev, e) (adev)->mode_info.funcs->backlight_get_level((e))
315df58525SHuang Rui #define amdgpu_display_hpd_sense(adev, h) (adev)->mode_info.funcs->hpd_sense((adev), (h))
325df58525SHuang Rui #define amdgpu_display_hpd_set_polarity(adev, h) (adev)->mode_info.funcs->hpd_set_polarity((adev), (h))
335df58525SHuang Rui #define amdgpu_display_hpd_get_gpio_reg(adev) (adev)->mode_info.funcs->hpd_get_gpio_reg((adev))
345df58525SHuang Rui #define amdgpu_display_bandwidth_update(adev) (adev)->mode_info.funcs->bandwidth_update((adev))
355df58525SHuang Rui #define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async))
365df58525SHuang Rui #define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos))
375df58525SHuang Rui #define amdgpu_display_add_encoder(adev, e, s, c) (adev)->mode_info.funcs->add_encoder((adev), (e), (s), (c))
385df58525SHuang Rui #define amdgpu_display_add_connector(adev, ci, sd, ct, ib, coi, h, r) (adev)->mode_info.funcs->add_connector((adev), (ci), (sd), (ct), (ib), (coi), (h), (r))
395df58525SHuang Rui 
40a347ca97SAlex Deucher void amdgpu_display_hotplug_work_func(struct work_struct *work);
415df58525SHuang Rui void amdgpu_display_update_priority(struct amdgpu_device *adev);
42f2bd8a0eSAndrey Grodzovsky uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
43f2bd8a0eSAndrey Grodzovsky 					  uint64_t bo_flags);
44b0fb632fSHarry Wentland struct drm_framebuffer *
454d4772f6SSamuel Li amdgpu_display_user_framebuffer_create(struct drm_device *dev,
46b0fb632fSHarry Wentland 				       struct drm_file *file_priv,
47b0fb632fSHarry Wentland 				       const struct drm_mode_fb_cmd2 *mode_cmd);
48816853f9SBas Nieuwenhuizen const struct drm_format_info *
49816853f9SBas Nieuwenhuizen amdgpu_lookup_format_info(u32 format, uint64_t modifier);
50b0fb632fSHarry Wentland 
51ca8ee26dSAlex Deucher int amdgpu_display_suspend_helper(struct amdgpu_device *adev);
52ca8ee26dSAlex Deucher int amdgpu_display_resume_helper(struct amdgpu_device *adev);
53ca8ee26dSAlex Deucher 
54*fe151ed7SAlex Deucher int amdgpu_display_get_scanout_buffer(struct drm_plane *plane,
55*fe151ed7SAlex Deucher 				      struct drm_scanout_buffer *sb);
56*fe151ed7SAlex Deucher 
57b0fb632fSHarry Wentland #endif
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