1da9bb1d2SAlan Cox# 2da9bb1d2SAlan Cox# EDAC Kconfig 34577ca55SDoug Thompson# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com 4da9bb1d2SAlan Cox# Licensed and distributed under the GPL 5da9bb1d2SAlan Cox# 6da9bb1d2SAlan Cox 7*54451663SBorislav Petkovconfig EDAC_SUPPORT 8*54451663SBorislav Petkov bool 9*54451663SBorislav Petkov 10751cb5e5SJan Engelhardtmenuconfig EDAC 11e24aca67SGeunSik Lim bool "EDAC (Error Detection And Correction) reporting" 12e25df120SMartin Schwidefsky depends on HAS_IOMEM 13f65aad41SRalf Baechle depends on X86 || PPC || TILE || ARM || EDAC_SUPPORT 14da9bb1d2SAlan Cox help 15da9bb1d2SAlan Cox EDAC is designed to report errors in the core system. 16da9bb1d2SAlan Cox These are low-level errors that are reported in the CPU or 178cb2a398SDouglas Thompson supporting chipset or other subsystems: 188cb2a398SDouglas Thompson memory errors, cache errors, PCI errors, thermal throttling, etc.. 198cb2a398SDouglas Thompson If unsure, select 'Y'. 20da9bb1d2SAlan Cox 2157c432b5STim Small If this code is reporting problems on your system, please 2257c432b5STim Small see the EDAC project web pages for more information at: 2357c432b5STim Small 2457c432b5STim Small <http://bluesmoke.sourceforge.net/> 2557c432b5STim Small 2657c432b5STim Small and: 2757c432b5STim Small 2857c432b5STim Small <http://buttersideup.com/edacwiki> 2957c432b5STim Small 3057c432b5STim Small There is also a mailing list for the EDAC project, which can 3157c432b5STim Small be found via the sourceforge page. 3257c432b5STim Small 33751cb5e5SJan Engelhardtif EDAC 34da9bb1d2SAlan Cox 3519974710SMauro Carvalho Chehabconfig EDAC_LEGACY_SYSFS 3619974710SMauro Carvalho Chehab bool "EDAC legacy sysfs" 3719974710SMauro Carvalho Chehab default y 3819974710SMauro Carvalho Chehab help 3919974710SMauro Carvalho Chehab Enable the compatibility sysfs nodes. 4019974710SMauro Carvalho Chehab Use 'Y' if your edac utilities aren't ported to work with the newer 4119974710SMauro Carvalho Chehab structures. 4219974710SMauro Carvalho Chehab 43da9bb1d2SAlan Coxconfig EDAC_DEBUG 44da9bb1d2SAlan Cox bool "Debugging" 45da9bb1d2SAlan Cox help 4637929874SBorislav Petkov This turns on debugging information for the entire EDAC subsystem. 4737929874SBorislav Petkov You do so by inserting edac_module with "edac_debug_level=x." Valid 4837929874SBorislav Petkov levels are 0-4 (from low to high) and by default it is set to 2. 4937929874SBorislav Petkov Usually you should select 'N' here. 50da9bb1d2SAlan Cox 510d18b2e3SBorislav Petkovconfig EDAC_DECODE_MCE 520d18b2e3SBorislav Petkov tristate "Decode MCEs in human-readable form (only on AMD for now)" 53168eb34dSBorislav Petkov depends on CPU_SUP_AMD && X86_MCE_AMD 540d18b2e3SBorislav Petkov default y 550d18b2e3SBorislav Petkov ---help--- 560d18b2e3SBorislav Petkov Enable this option if you want to decode Machine Check Exceptions 5725985edcSLucas De Marchi occurring on your machine in human-readable form. 580d18b2e3SBorislav Petkov 590d18b2e3SBorislav Petkov You should definitely say Y here in case you want to decode MCEs 600d18b2e3SBorislav Petkov which occur really early upon boot, before the module infrastructure 610d18b2e3SBorislav Petkov has been initialized. 620d18b2e3SBorislav Petkov 639cdeb404SBorislav Petkovconfig EDAC_MCE_INJ 649cdeb404SBorislav Petkov tristate "Simple MCE injection interface over /sysfs" 659cdeb404SBorislav Petkov depends on EDAC_DECODE_MCE 669cdeb404SBorislav Petkov default n 679cdeb404SBorislav Petkov help 689cdeb404SBorislav Petkov This is a simple interface to inject MCEs over /sysfs and test 699cdeb404SBorislav Petkov the MCE decoding code in EDAC. 709cdeb404SBorislav Petkov 719cdeb404SBorislav Petkov This is currently AMD-only. 729cdeb404SBorislav Petkov 73da9bb1d2SAlan Coxconfig EDAC_MM_EDAC 74da9bb1d2SAlan Cox tristate "Main Memory EDAC (Error Detection And Correction) reporting" 75da9bb1d2SAlan Cox help 76da9bb1d2SAlan Cox Some systems are able to detect and correct errors in main 77da9bb1d2SAlan Cox memory. EDAC can report statistics on memory error 78da9bb1d2SAlan Cox detection and correction (EDAC - or commonly referred to ECC 79da9bb1d2SAlan Cox errors). EDAC will also try to decode where these errors 80da9bb1d2SAlan Cox occurred so that a particular failing memory module can be 81da9bb1d2SAlan Cox replaced. If unsure, select 'Y'. 82da9bb1d2SAlan Cox 837d6034d3SDoug Thompsonconfig EDAC_AMD64 84027dbd6fSBorislav Petkov tristate "AMD64 (Opteron, Athlon64) K8, F10h" 85027dbd6fSBorislav Petkov depends on EDAC_MM_EDAC && AMD_NB && X86_64 && EDAC_DECODE_MCE 867d6034d3SDoug Thompson help 87027dbd6fSBorislav Petkov Support for error detection and correction of DRAM ECC errors on 88027dbd6fSBorislav Petkov the AMD64 families of memory controllers (K8 and F10h) 897d6034d3SDoug Thompson 907d6034d3SDoug Thompsonconfig EDAC_AMD64_ERROR_INJECTION 919cdeb404SBorislav Petkov bool "Sysfs HW Error injection facilities" 927d6034d3SDoug Thompson depends on EDAC_AMD64 937d6034d3SDoug Thompson help 947d6034d3SDoug Thompson Recent Opterons (Family 10h and later) provide for Memory Error 957d6034d3SDoug Thompson Injection into the ECC detection circuits. The amd64_edac module 967d6034d3SDoug Thompson allows the operator/user to inject Uncorrectable and Correctable 977d6034d3SDoug Thompson errors into DRAM. 987d6034d3SDoug Thompson 997d6034d3SDoug Thompson When enabled, in each of the respective memory controller directories 1007d6034d3SDoug Thompson (/sys/devices/system/edac/mc/mcX), there are 3 input files: 1017d6034d3SDoug Thompson 1027d6034d3SDoug Thompson - inject_section (0..3, 16-byte section of 64-byte cacheline), 1037d6034d3SDoug Thompson - inject_word (0..8, 16-bit word of 16-byte section), 1047d6034d3SDoug Thompson - inject_ecc_vector (hex ecc vector: select bits of inject word) 1057d6034d3SDoug Thompson 1067d6034d3SDoug Thompson In addition, there are two control files, inject_read and inject_write, 1077d6034d3SDoug Thompson which trigger the DRAM ECC Read and Write respectively. 108da9bb1d2SAlan Cox 109da9bb1d2SAlan Coxconfig EDAC_AMD76X 110da9bb1d2SAlan Cox tristate "AMD 76x (760, 762, 768)" 11190cbc45bSDave Jones depends on EDAC_MM_EDAC && PCI && X86_32 112da9bb1d2SAlan Cox help 113da9bb1d2SAlan Cox Support for error detection and correction on the AMD 76x 114da9bb1d2SAlan Cox series of chipsets used with the Athlon processor. 115da9bb1d2SAlan Cox 116da9bb1d2SAlan Coxconfig EDAC_E7XXX 117da9bb1d2SAlan Cox tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" 11839f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 119da9bb1d2SAlan Cox help 120da9bb1d2SAlan Cox Support for error detection and correction on the Intel 121da9bb1d2SAlan Cox E7205, E7500, E7501 and E7505 server chipsets. 122da9bb1d2SAlan Cox 123da9bb1d2SAlan Coxconfig EDAC_E752X 1245135b797SAndrei Konovalov tristate "Intel e752x (e7520, e7525, e7320) and 3100" 125da960a6aSRandy Dunlap depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG 126da9bb1d2SAlan Cox help 127da9bb1d2SAlan Cox Support for error detection and correction on the Intel 128da9bb1d2SAlan Cox E7520, E7525, E7320 server chipsets. 129da9bb1d2SAlan Cox 1305a2c675cSTim Smallconfig EDAC_I82443BXGX 1315a2c675cSTim Small tristate "Intel 82443BX/GX (440BX/GX)" 1325a2c675cSTim Small depends on EDAC_MM_EDAC && PCI && X86_32 13328f96eeaSAndrew Morton depends on BROKEN 1345a2c675cSTim Small help 1355a2c675cSTim Small Support for error detection and correction on the Intel 1365a2c675cSTim Small 82443BX/GX memory controllers (440BX/GX chipsets). 1375a2c675cSTim Small 138da9bb1d2SAlan Coxconfig EDAC_I82875P 139da9bb1d2SAlan Cox tristate "Intel 82875p (D82875P, E7210)" 14039f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 141da9bb1d2SAlan Cox help 142da9bb1d2SAlan Cox Support for error detection and correction on the Intel 143da9bb1d2SAlan Cox DP82785P and E7210 server chipsets. 144da9bb1d2SAlan Cox 145420390f0SRanganathan Desikanconfig EDAC_I82975X 146420390f0SRanganathan Desikan tristate "Intel 82975x (D82975x)" 147420390f0SRanganathan Desikan depends on EDAC_MM_EDAC && PCI && X86 148420390f0SRanganathan Desikan help 149420390f0SRanganathan Desikan Support for error detection and correction on the Intel 150420390f0SRanganathan Desikan DP82975x server chipsets. 151420390f0SRanganathan Desikan 152535c6a53SJason Uhlenkottconfig EDAC_I3000 153535c6a53SJason Uhlenkott tristate "Intel 3000/3010" 154f5c0454cSJason Uhlenkott depends on EDAC_MM_EDAC && PCI && X86 155535c6a53SJason Uhlenkott help 156535c6a53SJason Uhlenkott Support for error detection and correction on the Intel 157535c6a53SJason Uhlenkott 3000 and 3010 server chipsets. 158535c6a53SJason Uhlenkott 159dd8ef1dbSJason Uhlenkottconfig EDAC_I3200 160dd8ef1dbSJason Uhlenkott tristate "Intel 3200" 161dd8ef1dbSJason Uhlenkott depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL 162dd8ef1dbSJason Uhlenkott help 163dd8ef1dbSJason Uhlenkott Support for error detection and correction on the Intel 164dd8ef1dbSJason Uhlenkott 3200 and 3210 server chipsets. 165dd8ef1dbSJason Uhlenkott 166df8bc08cSHitoshi Mitakeconfig EDAC_X38 167df8bc08cSHitoshi Mitake tristate "Intel X38" 168df8bc08cSHitoshi Mitake depends on EDAC_MM_EDAC && PCI && X86 169df8bc08cSHitoshi Mitake help 170df8bc08cSHitoshi Mitake Support for error detection and correction on the Intel 171df8bc08cSHitoshi Mitake X38 server chipsets. 172df8bc08cSHitoshi Mitake 173920c8df6SMauro Carvalho Chehabconfig EDAC_I5400 174920c8df6SMauro Carvalho Chehab tristate "Intel 5400 (Seaburg) chipsets" 175920c8df6SMauro Carvalho Chehab depends on EDAC_MM_EDAC && PCI && X86 176920c8df6SMauro Carvalho Chehab help 177920c8df6SMauro Carvalho Chehab Support for error detection and correction the Intel 178920c8df6SMauro Carvalho Chehab i5400 MCH chipset (Seaburg). 179920c8df6SMauro Carvalho Chehab 180a0c36a1fSMauro Carvalho Chehabconfig EDAC_I7CORE 181a0c36a1fSMauro Carvalho Chehab tristate "Intel i7 Core (Nehalem) processors" 182168eb34dSBorislav Petkov depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL 183a0c36a1fSMauro Carvalho Chehab help 184a0c36a1fSMauro Carvalho Chehab Support for error detection and correction the Intel 185696e409dSMauro Carvalho Chehab i7 Core (Nehalem) Integrated Memory Controller that exists on 186696e409dSMauro Carvalho Chehab newer processors like i7 Core, i7 Core Extreme, Xeon 35xx 187696e409dSMauro Carvalho Chehab and Xeon 55xx processors. 188a0c36a1fSMauro Carvalho Chehab 189da9bb1d2SAlan Coxconfig EDAC_I82860 190da9bb1d2SAlan Cox tristate "Intel 82860" 19139f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 192da9bb1d2SAlan Cox help 193da9bb1d2SAlan Cox Support for error detection and correction on the Intel 194da9bb1d2SAlan Cox 82860 chipset. 195da9bb1d2SAlan Cox 196da9bb1d2SAlan Coxconfig EDAC_R82600 197da9bb1d2SAlan Cox tristate "Radisys 82600 embedded chipset" 19839f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 199da9bb1d2SAlan Cox help 200da9bb1d2SAlan Cox Support for error detection and correction on the Radisys 201da9bb1d2SAlan Cox 82600 embedded chipset. 202da9bb1d2SAlan Cox 203eb60705aSEric Wollesenconfig EDAC_I5000 204eb60705aSEric Wollesen tristate "Intel Greencreek/Blackford chipset" 205eb60705aSEric Wollesen depends on EDAC_MM_EDAC && X86 && PCI 206eb60705aSEric Wollesen help 207eb60705aSEric Wollesen Support for error detection and correction the Intel 208eb60705aSEric Wollesen Greekcreek/Blackford chipsets. 209eb60705aSEric Wollesen 2108f421c59SArthur Jonesconfig EDAC_I5100 2118f421c59SArthur Jones tristate "Intel San Clemente MCH" 2128f421c59SArthur Jones depends on EDAC_MM_EDAC && X86 && PCI 2138f421c59SArthur Jones help 2148f421c59SArthur Jones Support for error detection and correction the Intel 2158f421c59SArthur Jones San Clemente MCH. 2168f421c59SArthur Jones 217fcaf780bSMauro Carvalho Chehabconfig EDAC_I7300 218fcaf780bSMauro Carvalho Chehab tristate "Intel Clarksboro MCH" 219fcaf780bSMauro Carvalho Chehab depends on EDAC_MM_EDAC && X86 && PCI 220fcaf780bSMauro Carvalho Chehab help 221fcaf780bSMauro Carvalho Chehab Support for error detection and correction the Intel 222fcaf780bSMauro Carvalho Chehab Clarksboro MCH (Intel 7300 chipset). 223fcaf780bSMauro Carvalho Chehab 2243d78c9afSMauro Carvalho Chehabconfig EDAC_SBRIDGE 2253d78c9afSMauro Carvalho Chehab tristate "Intel Sandy-Bridge Integrated MC" 22622a5c27bSHui Wang depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL 22722a5c27bSHui Wang depends on PCI_MMCONFIG && EXPERIMENTAL 2283d78c9afSMauro Carvalho Chehab help 2293d78c9afSMauro Carvalho Chehab Support for error detection and correction the Intel 2303d78c9afSMauro Carvalho Chehab Sandy Bridge Integrated Memory Controller. 2313d78c9afSMauro Carvalho Chehab 232a9a753d5SDave Jiangconfig EDAC_MPC85XX 233b4846251SIra W. Snyder tristate "Freescale MPC83xx / MPC85xx" 2341cd8521eSAnton Vorontsov depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx) 235a9a753d5SDave Jiang help 236a9a753d5SDave Jiang Support for error detection and correction on the Freescale 237b4846251SIra W. Snyder MPC8349, MPC8560, MPC8540, MPC8548 238a9a753d5SDave Jiang 2394f4aeeabSDave Jiangconfig EDAC_MV64X60 2404f4aeeabSDave Jiang tristate "Marvell MV64x60" 2414f4aeeabSDave Jiang depends on EDAC_MM_EDAC && MV64X60 2424f4aeeabSDave Jiang help 2434f4aeeabSDave Jiang Support for error detection and correction on the Marvell 2444f4aeeabSDave Jiang MV64360 and MV64460 chipsets. 2454f4aeeabSDave Jiang 2467d8536fbSEgor Martovetskyconfig EDAC_PASEMI 2477d8536fbSEgor Martovetsky tristate "PA Semi PWRficient" 2487d8536fbSEgor Martovetsky depends on EDAC_MM_EDAC && PCI 249ddcc3050SDoug Thompson depends on PPC_PASEMI 2507d8536fbSEgor Martovetsky help 2517d8536fbSEgor Martovetsky Support for error detection and correction on PA Semi 2527d8536fbSEgor Martovetsky PWRficient. 2537d8536fbSEgor Martovetsky 25448764e41SBenjamin Herrenschmidtconfig EDAC_CELL 25548764e41SBenjamin Herrenschmidt tristate "Cell Broadband Engine memory controller" 256def434c2SBenjamin Krill depends on EDAC_MM_EDAC && PPC_CELL_COMMON 25748764e41SBenjamin Herrenschmidt help 25848764e41SBenjamin Herrenschmidt Support for error detection and correction on the 25948764e41SBenjamin Herrenschmidt Cell Broadband Engine internal memory controller 26048764e41SBenjamin Herrenschmidt on platform without a hypervisor 2617d8536fbSEgor Martovetsky 262dba7a77cSGrant Ericksonconfig EDAC_PPC4XX 263dba7a77cSGrant Erickson tristate "PPC4xx IBM DDR2 Memory Controller" 264dba7a77cSGrant Erickson depends on EDAC_MM_EDAC && 4xx 265dba7a77cSGrant Erickson help 266dba7a77cSGrant Erickson This enables support for EDAC on the ECC memory used 267dba7a77cSGrant Erickson with the IBM DDR2 memory controller found in various 268dba7a77cSGrant Erickson PowerPC 4xx embedded processors such as the 405EX[r], 269dba7a77cSGrant Erickson 440SP, 440SPe, 460EX, 460GT and 460SX. 270dba7a77cSGrant Erickson 271e8765584SHarry Ciaoconfig EDAC_AMD8131 272e8765584SHarry Ciao tristate "AMD8131 HyperTransport PCI-X Tunnel" 273715fe7afSHarry Ciao depends on EDAC_MM_EDAC && PCI && PPC_MAPLE 274e8765584SHarry Ciao help 275e8765584SHarry Ciao Support for error detection and correction on the 276e8765584SHarry Ciao AMD8131 HyperTransport PCI-X Tunnel chip. 277715fe7afSHarry Ciao Note, add more Kconfig dependency if it's adopted 278715fe7afSHarry Ciao on some machine other than Maple. 279e8765584SHarry Ciao 28058b4ce6fSHarry Ciaoconfig EDAC_AMD8111 28158b4ce6fSHarry Ciao tristate "AMD8111 HyperTransport I/O Hub" 282715fe7afSHarry Ciao depends on EDAC_MM_EDAC && PCI && PPC_MAPLE 28358b4ce6fSHarry Ciao help 28458b4ce6fSHarry Ciao Support for error detection and correction on the 28558b4ce6fSHarry Ciao AMD8111 HyperTransport I/O Hub chip. 286715fe7afSHarry Ciao Note, add more Kconfig dependency if it's adopted 287715fe7afSHarry Ciao on some machine other than Maple. 28858b4ce6fSHarry Ciao 2892a9036afSHarry Ciaoconfig EDAC_CPC925 2902a9036afSHarry Ciao tristate "IBM CPC925 Memory Controller (PPC970FX)" 2912a9036afSHarry Ciao depends on EDAC_MM_EDAC && PPC64 2922a9036afSHarry Ciao help 2932a9036afSHarry Ciao Support for error detection and correction on the 2942a9036afSHarry Ciao IBM CPC925 Bridge and Memory Controller, which is 2952a9036afSHarry Ciao a companion chip to the PowerPC 970 family of 2962a9036afSHarry Ciao processors. 2972a9036afSHarry Ciao 2985c770755SChris Metcalfconfig EDAC_TILE 2995c770755SChris Metcalf tristate "Tilera Memory Controller" 3005c770755SChris Metcalf depends on EDAC_MM_EDAC && TILE 3015c770755SChris Metcalf default y 3025c770755SChris Metcalf help 3035c770755SChris Metcalf Support for error detection and correction on the 3045c770755SChris Metcalf Tilera memory controller. 3055c770755SChris Metcalf 306a1b01edbSRob Herringconfig EDAC_HIGHBANK_MC 307a1b01edbSRob Herring tristate "Highbank Memory Controller" 308a1b01edbSRob Herring depends on EDAC_MM_EDAC && ARCH_HIGHBANK 309a1b01edbSRob Herring help 310a1b01edbSRob Herring Support for error detection and correction on the 311a1b01edbSRob Herring Calxeda Highbank memory controller. 312a1b01edbSRob Herring 31369154d06SRob Herringconfig EDAC_HIGHBANK_L2 31469154d06SRob Herring tristate "Highbank L2 Cache" 31569154d06SRob Herring depends on EDAC_MM_EDAC && ARCH_HIGHBANK 31669154d06SRob Herring help 31769154d06SRob Herring Support for error detection and correction on the 31869154d06SRob Herring Calxeda Highbank memory controller. 31969154d06SRob Herring 320f65aad41SRalf Baechleconfig EDAC_OCTEON_PC 321f65aad41SRalf Baechle tristate "Cavium Octeon Primary Caches" 322f65aad41SRalf Baechle depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON 323f65aad41SRalf Baechle help 324f65aad41SRalf Baechle Support for error detection and correction on the primary caches of 325f65aad41SRalf Baechle the cnMIPS cores of Cavium Octeon family SOCs. 326f65aad41SRalf Baechle 327f65aad41SRalf Baechleconfig EDAC_OCTEON_L2C 328f65aad41SRalf Baechle tristate "Cavium Octeon Secondary Caches (L2C)" 329f65aad41SRalf Baechle depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON 330f65aad41SRalf Baechle help 331f65aad41SRalf Baechle Support for error detection and correction on the 332f65aad41SRalf Baechle Cavium Octeon family of SOCs. 333f65aad41SRalf Baechle 334f65aad41SRalf Baechleconfig EDAC_OCTEON_LMC 335f65aad41SRalf Baechle tristate "Cavium Octeon DRAM Memory Controller (LMC)" 336f65aad41SRalf Baechle depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON 337f65aad41SRalf Baechle help 338f65aad41SRalf Baechle Support for error detection and correction on the 339f65aad41SRalf Baechle Cavium Octeon family of SOCs. 340f65aad41SRalf Baechle 341f65aad41SRalf Baechleconfig EDAC_OCTEON_PCI 342f65aad41SRalf Baechle tristate "Cavium Octeon PCI Controller" 343f65aad41SRalf Baechle depends on EDAC_MM_EDAC && PCI && CPU_CAVIUM_OCTEON 344f65aad41SRalf Baechle help 345f65aad41SRalf Baechle Support for error detection and correction on the 346f65aad41SRalf Baechle Cavium Octeon family of SOCs. 347f65aad41SRalf Baechle 348751cb5e5SJan Engelhardtendif # EDAC 349