1# SPDX-License-Identifier: GPL-2.0-only 2 3menuconfig CRYPTO_HW 4 bool "Hardware crypto devices" 5 default y 6 help 7 Say Y here to get to see options for hardware crypto devices and 8 processors. This option alone does not add any kernel code. 9 10 If you say N, all options in this submenu will be skipped and disabled. 11 12if CRYPTO_HW 13 14source "drivers/crypto/allwinner/Kconfig" 15 16config CRYPTO_DEV_PADLOCK 17 tristate "Support for VIA PadLock ACE" 18 depends on X86 && !UML 19 help 20 Some VIA processors come with an integrated crypto engine 21 (so called VIA PadLock ACE, Advanced Cryptography Engine) 22 that provides instructions for very fast cryptographic 23 operations with supported algorithms. 24 25 The instructions are used only when the CPU supports them. 26 Otherwise software encryption is used. 27 28config CRYPTO_DEV_PADLOCK_AES 29 tristate "PadLock driver for AES algorithm" 30 depends on CRYPTO_DEV_PADLOCK 31 select CRYPTO_SKCIPHER 32 select CRYPTO_LIB_AES 33 help 34 Use VIA PadLock for AES algorithm. 35 36 Available in VIA C3 and newer CPUs. 37 38 If unsure say M. The compiled module will be 39 called padlock-aes. 40 41config CRYPTO_DEV_PADLOCK_SHA 42 tristate "PadLock driver for SHA1 and SHA256 algorithms" 43 depends on CRYPTO_DEV_PADLOCK 44 select CRYPTO_HASH 45 select CRYPTO_SHA1 46 select CRYPTO_SHA256 47 help 48 Use VIA PadLock for SHA1/SHA256 algorithms. 49 50 Available in VIA C7 and newer processors. 51 52 If unsure say M. The compiled module will be 53 called padlock-sha. 54 55config CRYPTO_DEV_GEODE 56 tristate "Support for the Geode LX AES engine" 57 depends on X86_32 && PCI 58 select CRYPTO_ALGAPI 59 select CRYPTO_SKCIPHER 60 help 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 62 engine for the CryptoAPI AES algorithm. 63 64 To compile this driver as a module, choose M here: the module 65 will be called geode-aes. 66 67config ZCRYPT 68 tristate "Support for s390 cryptographic adapters" 69 depends on S390 70 select HW_RANDOM 71 help 72 Select this option if you want to enable support for 73 s390 cryptographic adapters like: 74 + Crypto Express 2 up to 7 Coprocessor (CEXxC) 75 + Crypto Express 2 up to 7 Accelerator (CEXxA) 76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP) 77 78config ZCRYPT_DEBUG 79 bool "Enable debug features for s390 cryptographic adapters" 80 default n 81 depends on DEBUG_KERNEL 82 depends on ZCRYPT 83 help 84 Say 'Y' here to enable some additional debug features on the 85 s390 cryptographic adapters driver. 86 87 There will be some more sysfs attributes displayed for ap cards 88 and queues and some flags on crypto requests are interpreted as 89 debugging messages to force error injection. 90 91 Do not enable on production level kernel build. 92 93 If unsure, say N. 94 95config ZCRYPT_MULTIDEVNODES 96 bool "Support for multiple zcrypt device nodes" 97 default y 98 depends on S390 99 depends on ZCRYPT 100 help 101 With this option enabled the zcrypt device driver can 102 provide multiple devices nodes in /dev. Each device 103 node can get customized to limit access and narrow 104 down the use of the available crypto hardware. 105 106config PKEY 107 tristate "Kernel API for protected key handling" 108 depends on S390 109 depends on ZCRYPT 110 help 111 With this option enabled the pkey kernel module provides an API 112 for creation and handling of protected keys. Other parts of the 113 kernel or userspace applications may use these functions. 114 115 Select this option if you want to enable the kernel and userspace 116 API for proteced key handling. 117 118 Please note that creation of protected keys from secure keys 119 requires to have at least one CEX card in coprocessor mode 120 available at runtime. 121 122config CRYPTO_PAES_S390 123 tristate "PAES cipher algorithms" 124 depends on S390 125 depends on ZCRYPT 126 depends on PKEY 127 select CRYPTO_ALGAPI 128 select CRYPTO_SKCIPHER 129 help 130 This is the s390 hardware accelerated implementation of the 131 AES cipher algorithms for use with protected key. 132 133 Select this option if you want to use the paes cipher 134 for example to use protected key encrypted devices. 135 136config S390_PRNG 137 tristate "Pseudo random number generator device driver" 138 depends on S390 139 default "m" 140 help 141 Select this option if you want to use the s390 pseudo random number 142 generator. The PRNG is part of the cryptographic processor functions 143 and uses triple-DES to generate secure random numbers like the 144 ANSI X9.17 standard. User-space programs access the 145 pseudo-random-number device through the char device /dev/prandom. 146 147 It is available as of z9. 148 149config CRYPTO_DEV_NIAGARA2 150 tristate "Niagara2 Stream Processing Unit driver" 151 select CRYPTO_LIB_DES 152 select CRYPTO_SKCIPHER 153 select CRYPTO_HASH 154 select CRYPTO_MD5 155 select CRYPTO_SHA1 156 select CRYPTO_SHA256 157 depends on SPARC64 158 help 159 Each core of a Niagara2 processor contains a Stream 160 Processing Unit, which itself contains several cryptographic 161 sub-units. One set provides the Modular Arithmetic Unit, 162 used for SSL offload. The other set provides the Cipher 163 Group, which can perform encryption, decryption, hashing, 164 checksumming, and raw copies. 165 166config CRYPTO_DEV_SL3516 167 tristate "Storlink SL3516 crypto offloader" 168 depends on ARCH_GEMINI || COMPILE_TEST 169 depends on HAS_IOMEM && PM 170 select CRYPTO_SKCIPHER 171 select CRYPTO_ENGINE 172 select CRYPTO_ECB 173 select CRYPTO_AES 174 select HW_RANDOM 175 help 176 This option allows you to have support for SL3516 crypto offloader. 177 178config CRYPTO_DEV_SL3516_DEBUG 179 bool "Enable SL3516 stats" 180 depends on CRYPTO_DEV_SL3516 181 depends on DEBUG_FS 182 help 183 Say y to enable SL3516 debug stats. 184 This will create /sys/kernel/debug/sl3516/stats for displaying 185 the number of requests per algorithm and other internal stats. 186 187config CRYPTO_DEV_HIFN_795X 188 tristate "Driver HIFN 795x crypto accelerator chips" 189 select CRYPTO_LIB_DES 190 select CRYPTO_SKCIPHER 191 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 192 depends on PCI 193 depends on !ARCH_DMA_ADDR_T_64BIT 194 help 195 This option allows you to have support for HIFN 795x crypto adapters. 196 197config CRYPTO_DEV_HIFN_795X_RNG 198 bool "HIFN 795x random number generator" 199 depends on CRYPTO_DEV_HIFN_795X 200 help 201 Select this option if you want to enable the random number generator 202 on the HIFN 795x crypto adapters. 203 204source "drivers/crypto/caam/Kconfig" 205 206config CRYPTO_DEV_TALITOS 207 tristate "Talitos Freescale Security Engine (SEC)" 208 select CRYPTO_AEAD 209 select CRYPTO_AUTHENC 210 select CRYPTO_SKCIPHER 211 select CRYPTO_HASH 212 select CRYPTO_LIB_DES 213 select HW_RANDOM 214 depends on FSL_SOC 215 help 216 Say 'Y' here to use the Freescale Security Engine (SEC) 217 to offload cryptographic algorithm computation. 218 219 The Freescale SEC is present on PowerQUICC 'E' processors, such 220 as the MPC8349E and MPC8548E. 221 222 To compile this driver as a module, choose M here: the module 223 will be called talitos. 224 225config CRYPTO_DEV_TALITOS1 226 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 227 depends on CRYPTO_DEV_TALITOS 228 depends on PPC_8xx || PPC_82xx 229 default y 230 help 231 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 232 found on MPC82xx or the Freescale Security Engine (SEC Lite) 233 version 1.2 found on MPC8xx 234 235config CRYPTO_DEV_TALITOS2 236 bool "SEC2+ (SEC version 2.0 or upper)" 237 depends on CRYPTO_DEV_TALITOS 238 default y if !PPC_8xx 239 help 240 Say 'Y' here to use the Freescale Security Engine (SEC) 241 version 2 and following as found on MPC83xx, MPC85xx, etc ... 242 243config CRYPTO_DEV_PPC4XX 244 tristate "Driver AMCC PPC4xx crypto accelerator" 245 depends on PPC && 4xx 246 select CRYPTO_HASH 247 select CRYPTO_AEAD 248 select CRYPTO_AES 249 select CRYPTO_LIB_AES 250 select CRYPTO_CCM 251 select CRYPTO_CTR 252 select CRYPTO_GCM 253 select CRYPTO_SKCIPHER 254 help 255 This option allows you to have support for AMCC crypto acceleration. 256 257config HW_RANDOM_PPC4XX 258 bool "PowerPC 4xx generic true random number generator support" 259 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y 260 default y 261 help 262 This option provides the kernel-side support for the TRNG hardware 263 found in the security function of some PowerPC 4xx SoCs. 264 265config CRYPTO_DEV_OMAP 266 tristate "Support for OMAP crypto HW accelerators" 267 depends on ARCH_OMAP2PLUS 268 help 269 OMAP processors have various crypto HW accelerators. Select this if 270 you want to use the OMAP modules for any of the crypto algorithms. 271 272if CRYPTO_DEV_OMAP 273 274config CRYPTO_DEV_OMAP_SHAM 275 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 276 depends on ARCH_OMAP2PLUS 277 select CRYPTO_ENGINE 278 select CRYPTO_SHA1 279 select CRYPTO_MD5 280 select CRYPTO_SHA256 281 select CRYPTO_SHA512 282 select CRYPTO_HMAC 283 help 284 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 285 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 286 287config CRYPTO_DEV_OMAP_AES 288 tristate "Support for OMAP AES hw engine" 289 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 290 select CRYPTO_AES 291 select CRYPTO_SKCIPHER 292 select CRYPTO_ENGINE 293 select CRYPTO_CBC 294 select CRYPTO_ECB 295 select CRYPTO_CTR 296 select CRYPTO_AEAD 297 help 298 OMAP processors have AES module accelerator. Select this if you 299 want to use the OMAP module for AES algorithms. 300 301config CRYPTO_DEV_OMAP_DES 302 tristate "Support for OMAP DES/3DES hw engine" 303 depends on ARCH_OMAP2PLUS 304 select CRYPTO_LIB_DES 305 select CRYPTO_SKCIPHER 306 select CRYPTO_ENGINE 307 help 308 OMAP processors have DES/3DES module accelerator. Select this if you 309 want to use the OMAP module for DES and 3DES algorithms. Currently 310 the ECB and CBC modes of operation are supported by the driver. Also 311 accesses made on unaligned boundaries are supported. 312 313endif # CRYPTO_DEV_OMAP 314 315config CRYPTO_DEV_SAHARA 316 tristate "Support for SAHARA crypto accelerator" 317 depends on ARCH_MXC && OF 318 select CRYPTO_SKCIPHER 319 select CRYPTO_AES 320 select CRYPTO_ECB 321 help 322 This option enables support for the SAHARA HW crypto accelerator 323 found in some Freescale i.MX chips. 324 325config CRYPTO_DEV_EXYNOS_RNG 326 tristate "Exynos HW pseudo random number generator support" 327 depends on ARCH_EXYNOS || COMPILE_TEST 328 depends on HAS_IOMEM 329 select CRYPTO_RNG 330 help 331 This driver provides kernel-side support through the 332 cryptographic API for the pseudo random number generator hardware 333 found on Exynos SoCs. 334 335 To compile this driver as a module, choose M here: the 336 module will be called exynos-rng. 337 338 If unsure, say Y. 339 340config CRYPTO_DEV_S5P 341 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 342 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 343 depends on HAS_IOMEM 344 select CRYPTO_AES 345 select CRYPTO_SKCIPHER 346 help 347 This option allows you to have support for S5P crypto acceleration. 348 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 349 algorithms execution. 350 351config CRYPTO_DEV_EXYNOS_HASH 352 bool "Support for Samsung Exynos HASH accelerator" 353 depends on CRYPTO_DEV_S5P 354 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 355 select CRYPTO_SHA1 356 select CRYPTO_MD5 357 select CRYPTO_SHA256 358 help 359 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 360 This will select software SHA1, MD5 and SHA256 as they are 361 needed for small and zero-size messages. 362 HASH algorithms will be disabled if EXYNOS_RNG 363 is enabled due to hw conflict. 364 365config CRYPTO_DEV_NX 366 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 367 depends on PPC64 368 help 369 This enables support for the NX hardware cryptographic accelerator 370 coprocessor that is in IBM PowerPC P7+ or later processors. This 371 does not actually enable any drivers, it only allows you to select 372 which acceleration type (encryption and/or compression) to enable. 373 374if CRYPTO_DEV_NX 375 source "drivers/crypto/nx/Kconfig" 376endif 377 378config CRYPTO_DEV_ATMEL_AUTHENC 379 bool "Support for Atmel IPSEC/SSL hw accelerator" 380 depends on ARCH_AT91 || COMPILE_TEST 381 depends on CRYPTO_DEV_ATMEL_AES 382 help 383 Some Atmel processors can combine the AES and SHA hw accelerators 384 to enhance support of IPSEC/SSL. 385 Select this if you want to use the Atmel modules for 386 authenc(hmac(shaX),Y(cbc)) algorithms. 387 388config CRYPTO_DEV_ATMEL_AES 389 tristate "Support for Atmel AES hw accelerator" 390 depends on ARCH_AT91 || COMPILE_TEST 391 select CRYPTO_AES 392 select CRYPTO_AEAD 393 select CRYPTO_SKCIPHER 394 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC 395 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC 396 help 397 Some Atmel processors have AES hw accelerator. 398 Select this if you want to use the Atmel module for 399 AES algorithms. 400 401 To compile this driver as a module, choose M here: the module 402 will be called atmel-aes. 403 404config CRYPTO_DEV_ATMEL_TDES 405 tristate "Support for Atmel DES/TDES hw accelerator" 406 depends on ARCH_AT91 || COMPILE_TEST 407 select CRYPTO_LIB_DES 408 select CRYPTO_SKCIPHER 409 help 410 Some Atmel processors have DES/TDES hw accelerator. 411 Select this if you want to use the Atmel module for 412 DES/TDES algorithms. 413 414 To compile this driver as a module, choose M here: the module 415 will be called atmel-tdes. 416 417config CRYPTO_DEV_ATMEL_SHA 418 tristate "Support for Atmel SHA hw accelerator" 419 depends on ARCH_AT91 || COMPILE_TEST 420 select CRYPTO_HASH 421 help 422 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 423 hw accelerator. 424 Select this if you want to use the Atmel module for 425 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 426 427 To compile this driver as a module, choose M here: the module 428 will be called atmel-sha. 429 430config CRYPTO_DEV_ATMEL_I2C 431 tristate 432 select BITREVERSE 433 434config CRYPTO_DEV_ATMEL_ECC 435 tristate "Support for Microchip / Atmel ECC hw accelerator" 436 depends on I2C 437 select CRYPTO_DEV_ATMEL_I2C 438 select CRYPTO_ECDH 439 select CRC16 440 help 441 Microhip / Atmel ECC hw accelerator. 442 Select this if you want to use the Microchip / Atmel module for 443 ECDH algorithm. 444 445 To compile this driver as a module, choose M here: the module 446 will be called atmel-ecc. 447 448config CRYPTO_DEV_ATMEL_SHA204A 449 tristate "Support for Microchip / Atmel SHA accelerator and RNG" 450 depends on I2C 451 select CRYPTO_DEV_ATMEL_I2C 452 select HW_RANDOM 453 select CRC16 454 help 455 Microhip / Atmel SHA accelerator and RNG. 456 Select this if you want to use the Microchip / Atmel SHA204A 457 module as a random number generator. (Other functions of the 458 chip are currently not exposed by this driver) 459 460 To compile this driver as a module, choose M here: the module 461 will be called atmel-sha204a. 462 463config CRYPTO_DEV_CCP 464 bool "Support for AMD Secure Processor" 465 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 466 help 467 The AMD Secure Processor provides support for the Cryptographic Coprocessor 468 (CCP) and the Platform Security Processor (PSP) devices. 469 470if CRYPTO_DEV_CCP 471 source "drivers/crypto/ccp/Kconfig" 472endif 473 474config CRYPTO_DEV_MXS_DCP 475 tristate "Support for Freescale MXS DCP" 476 depends on (ARCH_MXS || ARCH_MXC) 477 select STMP_DEVICE 478 select CRYPTO_CBC 479 select CRYPTO_ECB 480 select CRYPTO_AES 481 select CRYPTO_SKCIPHER 482 select CRYPTO_HASH 483 help 484 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 485 co-processor on the die. 486 487 To compile this driver as a module, choose M here: the module 488 will be called mxs-dcp. 489 490source "drivers/crypto/qat/Kconfig" 491source "drivers/crypto/cavium/cpt/Kconfig" 492source "drivers/crypto/cavium/nitrox/Kconfig" 493source "drivers/crypto/marvell/Kconfig" 494source "drivers/crypto/intel/Kconfig" 495 496config CRYPTO_DEV_CAVIUM_ZIP 497 tristate "Cavium ZIP driver" 498 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 499 help 500 Select this option if you want to enable compression/decompression 501 acceleration on Cavium's ARM based SoCs 502 503config CRYPTO_DEV_QCE 504 tristate "Qualcomm crypto engine accelerator" 505 depends on ARCH_QCOM || COMPILE_TEST 506 depends on HAS_IOMEM 507 help 508 This driver supports Qualcomm crypto engine accelerator 509 hardware. To compile this driver as a module, choose M here. The 510 module will be called qcrypto. 511 512config CRYPTO_DEV_QCE_SKCIPHER 513 bool 514 depends on CRYPTO_DEV_QCE 515 select CRYPTO_AES 516 select CRYPTO_LIB_DES 517 select CRYPTO_ECB 518 select CRYPTO_CBC 519 select CRYPTO_XTS 520 select CRYPTO_CTR 521 select CRYPTO_SKCIPHER 522 523config CRYPTO_DEV_QCE_SHA 524 bool 525 depends on CRYPTO_DEV_QCE 526 select CRYPTO_SHA1 527 select CRYPTO_SHA256 528 529config CRYPTO_DEV_QCE_AEAD 530 bool 531 depends on CRYPTO_DEV_QCE 532 select CRYPTO_AUTHENC 533 select CRYPTO_LIB_DES 534 535choice 536 prompt "Algorithms enabled for QCE acceleration" 537 default CRYPTO_DEV_QCE_ENABLE_ALL 538 depends on CRYPTO_DEV_QCE 539 help 540 This option allows to choose whether to build support for all algorithms 541 (default), hashes-only, or skciphers-only. 542 543 The QCE engine does not appear to scale as well as the CPU to handle 544 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the 545 QCE handles only 2 requests in parallel. 546 547 Ipsec throughput seems to improve when disabling either family of 548 algorithms, sharing the load with the CPU. Enabling skciphers-only 549 appears to work best. 550 551 config CRYPTO_DEV_QCE_ENABLE_ALL 552 bool "All supported algorithms" 553 select CRYPTO_DEV_QCE_SKCIPHER 554 select CRYPTO_DEV_QCE_SHA 555 select CRYPTO_DEV_QCE_AEAD 556 help 557 Enable all supported algorithms: 558 - AES (CBC, CTR, ECB, XTS) 559 - 3DES (CBC, ECB) 560 - DES (CBC, ECB) 561 - SHA1, HMAC-SHA1 562 - SHA256, HMAC-SHA256 563 564 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER 565 bool "Symmetric-key ciphers only" 566 select CRYPTO_DEV_QCE_SKCIPHER 567 help 568 Enable symmetric-key ciphers only: 569 - AES (CBC, CTR, ECB, XTS) 570 - 3DES (ECB, CBC) 571 - DES (ECB, CBC) 572 573 config CRYPTO_DEV_QCE_ENABLE_SHA 574 bool "Hash/HMAC only" 575 select CRYPTO_DEV_QCE_SHA 576 help 577 Enable hashes/HMAC algorithms only: 578 - SHA1, HMAC-SHA1 579 - SHA256, HMAC-SHA256 580 581 config CRYPTO_DEV_QCE_ENABLE_AEAD 582 bool "AEAD algorithms only" 583 select CRYPTO_DEV_QCE_AEAD 584 help 585 Enable AEAD algorithms only: 586 - authenc() 587 - ccm(aes) 588 - rfc4309(ccm(aes)) 589endchoice 590 591config CRYPTO_DEV_QCE_SW_MAX_LEN 592 int "Default maximum request size to use software for AES" 593 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER 594 default 512 595 help 596 This sets the default maximum request size to perform AES requests 597 using software instead of the crypto engine. It can be changed by 598 setting the aes_sw_max_len parameter. 599 600 Small blocks are processed faster in software than hardware. 601 Considering the 256-bit ciphers, software is 2-3 times faster than 602 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. 603 With 128-bit keys, the break-even point would be around 1024-bytes. 604 605 The default is set a little lower, to 512 bytes, to balance the 606 cost in CPU usage. The minimum recommended setting is 16-bytes 607 (1 AES block), since AES-GCM will fail if you set it lower. 608 Setting this to zero will send all requests to the hardware. 609 610 Note that 192-bit keys are not supported by the hardware and are 611 always processed by the software fallback, and all DES requests 612 are done by the hardware. 613 614config CRYPTO_DEV_QCOM_RNG 615 tristate "Qualcomm Random Number Generator Driver" 616 depends on ARCH_QCOM || COMPILE_TEST 617 select CRYPTO_RNG 618 help 619 This driver provides support for the Random Number 620 Generator hardware found on Qualcomm SoCs. 621 622 To compile this driver as a module, choose M here. The 623 module will be called qcom-rng. If unsure, say N. 624 625config CRYPTO_DEV_VMX 626 bool "Support for VMX cryptographic acceleration instructions" 627 depends on PPC64 && VSX 628 help 629 Support for VMX cryptographic acceleration instructions. 630 631source "drivers/crypto/vmx/Kconfig" 632 633config CRYPTO_DEV_IMGTEC_HASH 634 tristate "Imagination Technologies hardware hash accelerator" 635 depends on MIPS || COMPILE_TEST 636 select CRYPTO_MD5 637 select CRYPTO_SHA1 638 select CRYPTO_SHA256 639 select CRYPTO_HASH 640 help 641 This driver interfaces with the Imagination Technologies 642 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 643 hashing algorithms. 644 645config CRYPTO_DEV_ROCKCHIP 646 tristate "Rockchip's Cryptographic Engine driver" 647 depends on OF && ARCH_ROCKCHIP 648 depends on PM 649 select CRYPTO_ECB 650 select CRYPTO_CBC 651 select CRYPTO_DES 652 select CRYPTO_AES 653 select CRYPTO_ENGINE 654 select CRYPTO_LIB_DES 655 select CRYPTO_MD5 656 select CRYPTO_SHA1 657 select CRYPTO_SHA256 658 select CRYPTO_HASH 659 select CRYPTO_SKCIPHER 660 661 help 662 This driver interfaces with the hardware crypto accelerator. 663 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 664 665config CRYPTO_DEV_ROCKCHIP_DEBUG 666 bool "Enable Rockchip crypto stats" 667 depends on CRYPTO_DEV_ROCKCHIP 668 depends on DEBUG_FS 669 help 670 Say y to enable Rockchip crypto debug stats. 671 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying 672 the number of requests per algorithm and other internal stats. 673 674 675config CRYPTO_DEV_ZYNQMP_AES 676 tristate "Support for Xilinx ZynqMP AES hw accelerator" 677 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 678 select CRYPTO_AES 679 select CRYPTO_ENGINE 680 select CRYPTO_AEAD 681 help 682 Xilinx ZynqMP has AES-GCM engine used for symmetric key 683 encryption and decryption. This driver interfaces with AES hw 684 accelerator. Select this if you want to use the ZynqMP module 685 for AES algorithms. 686 687config CRYPTO_DEV_ZYNQMP_SHA3 688 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator" 689 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 690 select CRYPTO_SHA3 691 help 692 Xilinx ZynqMP has SHA3 engine used for secure hash calculation. 693 This driver interfaces with SHA3 hardware engine. 694 Select this if you want to use the ZynqMP module 695 for SHA3 hash computation. 696 697source "drivers/crypto/chelsio/Kconfig" 698 699source "drivers/crypto/virtio/Kconfig" 700 701config CRYPTO_DEV_BCM_SPU 702 tristate "Broadcom symmetric crypto/hash acceleration support" 703 depends on ARCH_BCM_IPROC 704 depends on MAILBOX 705 default m 706 select CRYPTO_AUTHENC 707 select CRYPTO_LIB_DES 708 select CRYPTO_MD5 709 select CRYPTO_SHA1 710 select CRYPTO_SHA256 711 select CRYPTO_SHA512 712 help 713 This driver provides support for Broadcom crypto acceleration using the 714 Secure Processing Unit (SPU). The SPU driver registers skcipher, 715 ahash, and aead algorithms with the kernel cryptographic API. 716 717source "drivers/crypto/stm32/Kconfig" 718 719config CRYPTO_DEV_SAFEXCEL 720 tristate "Inside Secure's SafeXcel cryptographic engine driver" 721 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM 722 select CRYPTO_LIB_AES 723 select CRYPTO_AUTHENC 724 select CRYPTO_SKCIPHER 725 select CRYPTO_LIB_DES 726 select CRYPTO_HASH 727 select CRYPTO_HMAC 728 select CRYPTO_MD5 729 select CRYPTO_SHA1 730 select CRYPTO_SHA256 731 select CRYPTO_SHA512 732 select CRYPTO_CHACHA20POLY1305 733 select CRYPTO_SHA3 734 help 735 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic 736 engines designed by Inside Secure. It currently accelerates DES, 3DES and 737 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, 738 SHA384 and SHA512 hash algorithms for both basic hash and HMAC. 739 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. 740 741config CRYPTO_DEV_ARTPEC6 742 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 743 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 744 depends on OF 745 select CRYPTO_AEAD 746 select CRYPTO_AES 747 select CRYPTO_ALGAPI 748 select CRYPTO_SKCIPHER 749 select CRYPTO_CTR 750 select CRYPTO_HASH 751 select CRYPTO_SHA1 752 select CRYPTO_SHA256 753 select CRYPTO_SHA512 754 help 755 Enables the driver for the on-chip crypto accelerator 756 of Axis ARTPEC SoCs. 757 758 To compile this driver as a module, choose M here. 759 760config CRYPTO_DEV_CCREE 761 tristate "Support for ARM TrustZone CryptoCell family of security processors" 762 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 763 depends on HAS_IOMEM 764 select CRYPTO_HASH 765 select CRYPTO_SKCIPHER 766 select CRYPTO_LIB_DES 767 select CRYPTO_AEAD 768 select CRYPTO_AUTHENC 769 select CRYPTO_SHA1 770 select CRYPTO_MD5 771 select CRYPTO_SHA256 772 select CRYPTO_SHA512 773 select CRYPTO_HMAC 774 select CRYPTO_AES 775 select CRYPTO_CBC 776 select CRYPTO_ECB 777 select CRYPTO_CTR 778 select CRYPTO_XTS 779 select CRYPTO_SM4_GENERIC 780 select CRYPTO_SM3_GENERIC 781 help 782 Say 'Y' to enable a driver for the REE interface of the Arm 783 TrustZone CryptoCell family of processors. Currently the 784 CryptoCell 713, 703, 712, 710 and 630 are supported. 785 Choose this if you wish to use hardware acceleration of 786 cryptographic operations on the system REE. 787 If unsure say Y. 788 789source "drivers/crypto/hisilicon/Kconfig" 790 791source "drivers/crypto/amlogic/Kconfig" 792 793config CRYPTO_DEV_SA2UL 794 tristate "Support for TI security accelerator" 795 depends on ARCH_K3 || COMPILE_TEST 796 select CRYPTO_AES 797 select CRYPTO_ALGAPI 798 select CRYPTO_AUTHENC 799 select CRYPTO_DES 800 select CRYPTO_SHA1 801 select CRYPTO_SHA256 802 select CRYPTO_SHA512 803 select HW_RANDOM 804 select SG_SPLIT 805 help 806 K3 devices include a security accelerator engine that may be 807 used for crypto offload. Select this if you want to use hardware 808 acceleration for cryptographic algorithms on these devices. 809 810source "drivers/crypto/aspeed/Kconfig" 811 812endif # CRYPTO_HW 813