1 /* 2 * core routines for the asynchronous memory transfer/transform api 3 * 4 * Copyright © 2006, Intel Corporation. 5 * 6 * Dan Williams <[email protected]> 7 * 8 * with architecture considerations by: 9 * Neil Brown <[email protected]> 10 * Jeff Garzik <[email protected]> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms and conditions of the GNU General Public License, 14 * version 2, as published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope it will be useful, but WITHOUT 17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 19 * more details. 20 * 21 * You should have received a copy of the GNU General Public License along with 22 * this program; if not, write to the Free Software Foundation, Inc., 23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 24 * 25 */ 26 #include <linux/rculist.h> 27 #include <linux/kernel.h> 28 #include <linux/async_tx.h> 29 30 #ifdef CONFIG_DMA_ENGINE 31 static int __init async_tx_init(void) 32 { 33 async_dmaengine_get(); 34 35 printk(KERN_INFO "async_tx: api initialized (async)\n"); 36 37 return 0; 38 } 39 40 static void __exit async_tx_exit(void) 41 { 42 async_dmaengine_put(); 43 } 44 45 /** 46 * __async_tx_find_channel - find a channel to carry out the operation or let 47 * the transaction execute synchronously 48 * @submit: transaction dependency and submission modifiers 49 * @tx_type: transaction type 50 */ 51 struct dma_chan * 52 __async_tx_find_channel(struct async_submit_ctl *submit, 53 enum dma_transaction_type tx_type) 54 { 55 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; 56 57 /* see if we can keep the chain on one channel */ 58 if (depend_tx && 59 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask)) 60 return depend_tx->chan; 61 return async_dma_find_channel(tx_type); 62 } 63 EXPORT_SYMBOL_GPL(__async_tx_find_channel); 64 #else 65 static int __init async_tx_init(void) 66 { 67 printk(KERN_INFO "async_tx: api initialized (sync-only)\n"); 68 return 0; 69 } 70 71 static void __exit async_tx_exit(void) 72 { 73 do { } while (0); 74 } 75 #endif 76 77 78 /** 79 * async_tx_channel_switch - queue an interrupt descriptor with a dependency 80 * pre-attached. 81 * @depend_tx: the operation that must finish before the new operation runs 82 * @tx: the new operation 83 */ 84 static void 85 async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, 86 struct dma_async_tx_descriptor *tx) 87 { 88 struct dma_chan *chan; 89 struct dma_device *device; 90 struct dma_async_tx_descriptor *intr_tx = (void *) ~0; 91 92 /* first check to see if we can still append to depend_tx */ 93 spin_lock_bh(&depend_tx->lock); 94 if (depend_tx->parent && depend_tx->chan == tx->chan) { 95 tx->parent = depend_tx; 96 depend_tx->next = tx; 97 intr_tx = NULL; 98 } 99 spin_unlock_bh(&depend_tx->lock); 100 101 if (!intr_tx) 102 return; 103 104 chan = depend_tx->chan; 105 device = chan->device; 106 107 /* see if we can schedule an interrupt 108 * otherwise poll for completion 109 */ 110 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask)) 111 intr_tx = device->device_prep_dma_interrupt(chan, 0); 112 else 113 intr_tx = NULL; 114 115 if (intr_tx) { 116 intr_tx->callback = NULL; 117 intr_tx->callback_param = NULL; 118 tx->parent = intr_tx; 119 /* safe to set ->next outside the lock since we know we are 120 * not submitted yet 121 */ 122 intr_tx->next = tx; 123 124 /* check if we need to append */ 125 spin_lock_bh(&depend_tx->lock); 126 if (depend_tx->parent) { 127 intr_tx->parent = depend_tx; 128 depend_tx->next = intr_tx; 129 async_tx_ack(intr_tx); 130 intr_tx = NULL; 131 } 132 spin_unlock_bh(&depend_tx->lock); 133 134 if (intr_tx) { 135 intr_tx->parent = NULL; 136 intr_tx->tx_submit(intr_tx); 137 async_tx_ack(intr_tx); 138 } 139 } else { 140 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR) 141 panic("%s: DMA_ERROR waiting for depend_tx\n", 142 __func__); 143 tx->tx_submit(tx); 144 } 145 } 146 147 148 /** 149 * submit_disposition - flags for routing an incoming operation 150 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock 151 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch 152 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly 153 * 154 * while holding depend_tx->lock we must avoid submitting new operations 155 * to prevent a circular locking dependency with drivers that already 156 * hold a channel lock when calling async_tx_run_dependencies. 157 */ 158 enum submit_disposition { 159 ASYNC_TX_SUBMITTED, 160 ASYNC_TX_CHANNEL_SWITCH, 161 ASYNC_TX_DIRECT_SUBMIT, 162 }; 163 164 void 165 async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, 166 struct async_submit_ctl *submit) 167 { 168 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; 169 170 tx->callback = submit->cb_fn; 171 tx->callback_param = submit->cb_param; 172 173 if (depend_tx) { 174 enum submit_disposition s; 175 176 /* sanity check the dependency chain: 177 * 1/ if ack is already set then we cannot be sure 178 * we are referring to the correct operation 179 * 2/ dependencies are 1:1 i.e. two transactions can 180 * not depend on the same parent 181 */ 182 BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next || 183 tx->parent); 184 185 /* the lock prevents async_tx_run_dependencies from missing 186 * the setting of ->next when ->parent != NULL 187 */ 188 spin_lock_bh(&depend_tx->lock); 189 if (depend_tx->parent) { 190 /* we have a parent so we can not submit directly 191 * if we are staying on the same channel: append 192 * else: channel switch 193 */ 194 if (depend_tx->chan == chan) { 195 tx->parent = depend_tx; 196 depend_tx->next = tx; 197 s = ASYNC_TX_SUBMITTED; 198 } else 199 s = ASYNC_TX_CHANNEL_SWITCH; 200 } else { 201 /* we do not have a parent so we may be able to submit 202 * directly if we are staying on the same channel 203 */ 204 if (depend_tx->chan == chan) 205 s = ASYNC_TX_DIRECT_SUBMIT; 206 else 207 s = ASYNC_TX_CHANNEL_SWITCH; 208 } 209 spin_unlock_bh(&depend_tx->lock); 210 211 switch (s) { 212 case ASYNC_TX_SUBMITTED: 213 break; 214 case ASYNC_TX_CHANNEL_SWITCH: 215 async_tx_channel_switch(depend_tx, tx); 216 break; 217 case ASYNC_TX_DIRECT_SUBMIT: 218 tx->parent = NULL; 219 tx->tx_submit(tx); 220 break; 221 } 222 } else { 223 tx->parent = NULL; 224 tx->tx_submit(tx); 225 } 226 227 if (submit->flags & ASYNC_TX_ACK) 228 async_tx_ack(tx); 229 230 if (depend_tx) 231 async_tx_ack(depend_tx); 232 } 233 EXPORT_SYMBOL_GPL(async_tx_submit); 234 235 /** 236 * async_trigger_callback - schedules the callback function to be run 237 * @submit: submission and completion parameters 238 * 239 * honored flags: ASYNC_TX_ACK 240 * 241 * The callback is run after any dependent operations have completed. 242 */ 243 struct dma_async_tx_descriptor * 244 async_trigger_callback(struct async_submit_ctl *submit) 245 { 246 struct dma_chan *chan; 247 struct dma_device *device; 248 struct dma_async_tx_descriptor *tx; 249 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; 250 251 if (depend_tx) { 252 chan = depend_tx->chan; 253 device = chan->device; 254 255 /* see if we can schedule an interrupt 256 * otherwise poll for completion 257 */ 258 if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask)) 259 device = NULL; 260 261 tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL; 262 } else 263 tx = NULL; 264 265 if (tx) { 266 pr_debug("%s: (async)\n", __func__); 267 268 async_tx_submit(chan, tx, submit); 269 } else { 270 pr_debug("%s: (sync)\n", __func__); 271 272 /* wait for any prerequisite operations */ 273 async_tx_quiesce(&submit->depend_tx); 274 275 async_tx_sync_epilog(submit); 276 } 277 278 return tx; 279 } 280 EXPORT_SYMBOL_GPL(async_trigger_callback); 281 282 /** 283 * async_tx_quiesce - ensure tx is complete and freeable upon return 284 * @tx - transaction to quiesce 285 */ 286 void async_tx_quiesce(struct dma_async_tx_descriptor **tx) 287 { 288 if (*tx) { 289 /* if ack is already set then we cannot be sure 290 * we are referring to the correct operation 291 */ 292 BUG_ON(async_tx_test_ack(*tx)); 293 if (dma_wait_for_async_tx(*tx) == DMA_ERROR) 294 panic("DMA_ERROR waiting for transaction\n"); 295 async_tx_ack(*tx); 296 *tx = NULL; 297 } 298 } 299 EXPORT_SYMBOL_GPL(async_tx_quiesce); 300 301 module_init(async_tx_init); 302 module_exit(async_tx_exit); 303 304 MODULE_AUTHOR("Intel Corporation"); 305 MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API"); 306 MODULE_LICENSE("GPL"); 307