1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Intel Multiprocessor Specification 1.1 and 1.4 4 * compliant MP-table parsing routines. 5 * 6 * (c) 1995 Alan Cox, Building #3 <[email protected]> 7 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <[email protected]> 8 * (c) 2008 Alexey Starikovskiy <[email protected]> 9 */ 10 11 #include <linux/mm.h> 12 #include <linux/init.h> 13 #include <linux/delay.h> 14 #include <linux/memblock.h> 15 #include <linux/kernel_stat.h> 16 #include <linux/mc146818rtc.h> 17 #include <linux/bitops.h> 18 #include <linux/acpi.h> 19 #include <linux/smp.h> 20 #include <linux/pci.h> 21 22 #include <asm/i8259.h> 23 #include <asm/io_apic.h> 24 #include <asm/acpi.h> 25 #include <asm/irqdomain.h> 26 #include <asm/mtrr.h> 27 #include <asm/mpspec.h> 28 #include <asm/proto.h> 29 #include <asm/bios_ebda.h> 30 #include <asm/e820/api.h> 31 #include <asm/setup.h> 32 #include <asm/smp.h> 33 34 #include <asm/apic.h> 35 /* 36 * Checksum an MP configuration block. 37 */ 38 39 static int __init mpf_checksum(unsigned char *mp, int len) 40 { 41 int sum = 0; 42 43 while (len--) 44 sum += *mp++; 45 46 return sum & 0xFF; 47 } 48 49 static void __init MP_processor_info(struct mpc_cpu *m) 50 { 51 char *bootup_cpu = ""; 52 53 if (!(m->cpuflag & CPU_ENABLED)) { 54 disabled_cpus++; 55 return; 56 } 57 58 if (m->cpuflag & CPU_BOOTPROCESSOR) 59 bootup_cpu = " (Bootup-CPU)"; 60 61 pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); 62 generic_processor_info(m->apicid); 63 } 64 65 #ifdef CONFIG_X86_IO_APIC 66 static void __init mpc_oem_bus_info(struct mpc_bus *m, char *str) 67 { 68 memcpy(str, m->bustype, 6); 69 str[6] = 0; 70 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 71 } 72 73 static void __init MP_bus_info(struct mpc_bus *m) 74 { 75 char str[7]; 76 77 mpc_oem_bus_info(m, str); 78 79 #if MAX_MP_BUSSES < 256 80 if (m->busid >= MAX_MP_BUSSES) { 81 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n", 82 m->busid, str, MAX_MP_BUSSES - 1); 83 return; 84 } 85 #endif 86 87 set_bit(m->busid, mp_bus_not_pci); 88 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 89 #ifdef CONFIG_EISA 90 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 91 #endif 92 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 93 clear_bit(m->busid, mp_bus_not_pci); 94 #ifdef CONFIG_EISA 95 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 96 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 97 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 98 #endif 99 } else 100 pr_warn("Unknown bustype %s - ignoring\n", str); 101 } 102 103 static void __init MP_ioapic_info(struct mpc_ioapic *m) 104 { 105 struct ioapic_domain_cfg cfg = { 106 .type = IOAPIC_DOMAIN_LEGACY, 107 .ops = &mp_ioapic_irqdomain_ops, 108 }; 109 110 if (m->flags & MPC_APIC_USABLE) 111 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top, &cfg); 112 } 113 114 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 115 { 116 apic_printk(APIC_VERBOSE, 117 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n", 118 mp_irq->irqtype, mp_irq->irqflag & 3, 119 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 120 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 121 } 122 123 #else /* CONFIG_X86_IO_APIC */ 124 static inline void __init MP_bus_info(struct mpc_bus *m) {} 125 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 126 #endif /* CONFIG_X86_IO_APIC */ 127 128 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 129 { 130 apic_printk(APIC_VERBOSE, 131 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n", 132 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 133 m->srcbusirq, m->destapic, m->destapiclint); 134 } 135 136 /* 137 * Read/parse the MPC 138 */ 139 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 140 { 141 142 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 143 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n", 144 mpc->signature[0], mpc->signature[1], 145 mpc->signature[2], mpc->signature[3]); 146 return 0; 147 } 148 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 149 pr_err("MPTABLE: checksum error!\n"); 150 return 0; 151 } 152 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 153 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec); 154 return 0; 155 } 156 if (!mpc->lapic) { 157 pr_err("MPTABLE: null local APIC address!\n"); 158 return 0; 159 } 160 memcpy(oem, mpc->oem, 8); 161 oem[8] = 0; 162 pr_info("MPTABLE: OEM ID: %s\n", oem); 163 164 memcpy(str, mpc->productid, 12); 165 str[12] = 0; 166 167 pr_info("MPTABLE: Product ID: %s\n", str); 168 169 pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic); 170 171 return 1; 172 } 173 174 static void skip_entry(unsigned char **ptr, int *count, int size) 175 { 176 *ptr += size; 177 *count += size; 178 } 179 180 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 181 { 182 pr_err("Your mptable is wrong, contact your HW vendor!\n"); 183 pr_cont("type %x\n", *mpt); 184 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 185 1, mpc, mpc->length, 1); 186 } 187 188 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 189 { 190 char str[16]; 191 char oem[10]; 192 193 int count = sizeof(*mpc); 194 unsigned char *mpt = ((unsigned char *)mpc) + count; 195 196 if (!smp_check_mpc(mpc, oem, str)) 197 return 0; 198 199 /* Initialize the lapic mapping */ 200 if (!acpi_lapic) 201 register_lapic_address(mpc->lapic); 202 203 if (early) 204 return 1; 205 206 /* Now process the configuration blocks. */ 207 while (count < mpc->length) { 208 switch (*mpt) { 209 case MP_PROCESSOR: 210 /* ACPI may have already provided this data */ 211 if (!acpi_lapic) 212 MP_processor_info((struct mpc_cpu *)mpt); 213 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 214 break; 215 case MP_BUS: 216 MP_bus_info((struct mpc_bus *)mpt); 217 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 218 break; 219 case MP_IOAPIC: 220 MP_ioapic_info((struct mpc_ioapic *)mpt); 221 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 222 break; 223 case MP_INTSRC: 224 mp_save_irq((struct mpc_intsrc *)mpt); 225 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 226 break; 227 case MP_LINTSRC: 228 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 229 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 230 break; 231 default: 232 /* wrong mptable */ 233 smp_dump_mptable(mpc, mpt); 234 count = mpc->length; 235 break; 236 } 237 } 238 239 if (!num_processors) 240 pr_err("MPTABLE: no processors registered!\n"); 241 return num_processors; 242 } 243 244 #ifdef CONFIG_X86_IO_APIC 245 246 static int __init ELCR_trigger(unsigned int irq) 247 { 248 unsigned int port; 249 250 port = PIC_ELCR1 + (irq >> 3); 251 return (inb(port) >> (irq & 7)) & 1; 252 } 253 254 static void __init construct_default_ioirq_mptable(int mpc_default_type) 255 { 256 struct mpc_intsrc intsrc; 257 int i; 258 int ELCR_fallback = 0; 259 260 intsrc.type = MP_INTSRC; 261 intsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT; 262 intsrc.srcbus = 0; 263 intsrc.dstapic = mpc_ioapic_id(0); 264 265 intsrc.irqtype = mp_INT; 266 267 /* 268 * If true, we have an ISA/PCI system with no IRQ entries 269 * in the MP table. To prevent the PCI interrupts from being set up 270 * incorrectly, we try to use the ELCR. The sanity check to see if 271 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 272 * never be level sensitive, so we simply see if the ELCR agrees. 273 * If it does, we assume it's valid. 274 */ 275 if (mpc_default_type == 5) { 276 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n"); 277 278 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 279 ELCR_trigger(13)) 280 pr_err("ELCR contains invalid data... not using ELCR\n"); 281 else { 282 pr_info("Using ELCR to identify PCI interrupts\n"); 283 ELCR_fallback = 1; 284 } 285 } 286 287 for (i = 0; i < 16; i++) { 288 switch (mpc_default_type) { 289 case 2: 290 if (i == 0 || i == 13) 291 continue; /* IRQ0 & IRQ13 not connected */ 292 fallthrough; 293 default: 294 if (i == 2) 295 continue; /* IRQ2 is never connected */ 296 } 297 298 if (ELCR_fallback) { 299 /* 300 * If the ELCR indicates a level-sensitive interrupt, we 301 * copy that information over to the MP table in the 302 * irqflag field (level sensitive, active high polarity). 303 */ 304 if (ELCR_trigger(i)) { 305 intsrc.irqflag = MP_IRQTRIG_LEVEL | 306 MP_IRQPOL_ACTIVE_HIGH; 307 } else { 308 intsrc.irqflag = MP_IRQTRIG_DEFAULT | 309 MP_IRQPOL_DEFAULT; 310 } 311 } 312 313 intsrc.srcbusirq = i; 314 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 315 mp_save_irq(&intsrc); 316 } 317 318 intsrc.irqtype = mp_ExtINT; 319 intsrc.srcbusirq = 0; 320 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 321 mp_save_irq(&intsrc); 322 } 323 324 325 static void __init construct_ioapic_table(int mpc_default_type) 326 { 327 struct mpc_ioapic ioapic; 328 struct mpc_bus bus; 329 330 bus.type = MP_BUS; 331 bus.busid = 0; 332 switch (mpc_default_type) { 333 default: 334 pr_err("???\nUnknown standard configuration %d\n", 335 mpc_default_type); 336 fallthrough; 337 case 1: 338 case 5: 339 memcpy(bus.bustype, "ISA ", 6); 340 break; 341 case 2: 342 case 6: 343 case 3: 344 memcpy(bus.bustype, "EISA ", 6); 345 break; 346 } 347 MP_bus_info(&bus); 348 if (mpc_default_type > 4) { 349 bus.busid = 1; 350 memcpy(bus.bustype, "PCI ", 6); 351 MP_bus_info(&bus); 352 } 353 354 ioapic.type = MP_IOAPIC; 355 ioapic.apicid = 2; 356 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 357 ioapic.flags = MPC_APIC_USABLE; 358 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; 359 MP_ioapic_info(&ioapic); 360 361 /* 362 * We set up most of the low 16 IO-APIC pins according to MPS rules. 363 */ 364 construct_default_ioirq_mptable(mpc_default_type); 365 } 366 #else 367 static inline void __init construct_ioapic_table(int mpc_default_type) { } 368 #endif 369 370 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 371 { 372 struct mpc_cpu processor; 373 struct mpc_lintsrc lintsrc; 374 int linttypes[2] = { mp_ExtINT, mp_NMI }; 375 int i; 376 377 /* 378 * local APIC has default address 379 */ 380 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 381 382 /* 383 * 2 CPUs, numbered 0 & 1. 384 */ 385 processor.type = MP_PROCESSOR; 386 /* Either an integrated APIC or a discrete 82489DX. */ 387 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 388 processor.cpuflag = CPU_ENABLED; 389 processor.cpufeature = (boot_cpu_data.x86 << 8) | 390 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_stepping; 391 processor.featureflag = boot_cpu_data.x86_capability[CPUID_1_EDX]; 392 processor.reserved[0] = 0; 393 processor.reserved[1] = 0; 394 for (i = 0; i < 2; i++) { 395 processor.apicid = i; 396 MP_processor_info(&processor); 397 } 398 399 construct_ioapic_table(mpc_default_type); 400 401 lintsrc.type = MP_LINTSRC; 402 lintsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT; 403 lintsrc.srcbusid = 0; 404 lintsrc.srcbusirq = 0; 405 lintsrc.destapic = MP_APIC_ALL; 406 for (i = 0; i < 2; i++) { 407 lintsrc.irqtype = linttypes[i]; 408 lintsrc.destapiclint = i; 409 MP_lintsrc_info(&lintsrc); 410 } 411 } 412 413 static unsigned long mpf_base; 414 static bool mpf_found; 415 416 static unsigned long __init get_mpc_size(unsigned long physptr) 417 { 418 struct mpc_table *mpc; 419 unsigned long size; 420 421 mpc = early_memremap(physptr, PAGE_SIZE); 422 size = mpc->length; 423 early_memunmap(mpc, PAGE_SIZE); 424 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 425 426 return size; 427 } 428 429 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 430 { 431 struct mpc_table *mpc; 432 unsigned long size; 433 434 size = get_mpc_size(mpf->physptr); 435 mpc = early_memremap(mpf->physptr, size); 436 437 /* 438 * Read the physical hardware table. Anything here will 439 * override the defaults. 440 */ 441 if (!smp_read_mpc(mpc, early)) { 442 #ifdef CONFIG_X86_LOCAL_APIC 443 smp_found_config = 0; 444 #endif 445 pr_err("BIOS bug, MP table errors detected!...\n"); 446 pr_cont("... disabling SMP support. (tell your hw vendor)\n"); 447 early_memunmap(mpc, size); 448 return -1; 449 } 450 early_memunmap(mpc, size); 451 452 if (early) 453 return -1; 454 455 #ifdef CONFIG_X86_IO_APIC 456 /* 457 * If there are no explicit MP IRQ entries, then we are 458 * broken. We set up most of the low 16 IO-APIC pins to 459 * ISA defaults and hope it will work. 460 */ 461 if (!mp_irq_entries) { 462 struct mpc_bus bus; 463 464 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n"); 465 466 bus.type = MP_BUS; 467 bus.busid = 0; 468 memcpy(bus.bustype, "ISA ", 6); 469 MP_bus_info(&bus); 470 471 construct_default_ioirq_mptable(0); 472 } 473 #endif 474 475 return 0; 476 } 477 478 /* 479 * Scan the memory blocks for an SMP configuration block. 480 */ 481 void __init default_get_smp_config(unsigned int early) 482 { 483 struct mpf_intel *mpf; 484 485 if (!smp_found_config) 486 return; 487 488 if (!mpf_found) 489 return; 490 491 if (acpi_lapic && early) 492 return; 493 494 /* 495 * MPS doesn't support hyperthreading, aka only have 496 * thread 0 apic id in MPS table 497 */ 498 if (acpi_lapic && acpi_ioapic) 499 return; 500 501 mpf = early_memremap(mpf_base, sizeof(*mpf)); 502 if (!mpf) { 503 pr_err("MPTABLE: error mapping MP table\n"); 504 return; 505 } 506 507 pr_info("Intel MultiProcessor Specification v1.%d\n", 508 mpf->specification); 509 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 510 if (mpf->feature2 & (1 << 7)) { 511 pr_info(" IMCR and PIC compatibility mode.\n"); 512 pic_mode = 1; 513 } else { 514 pr_info(" Virtual Wire compatibility mode.\n"); 515 pic_mode = 0; 516 } 517 #endif 518 /* 519 * Now see if we need to read further. 520 */ 521 if (mpf->feature1) { 522 if (early) { 523 /* 524 * local APIC has default address 525 */ 526 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 527 goto out; 528 } 529 530 pr_info("Default MP configuration #%d\n", mpf->feature1); 531 construct_default_ISA_mptable(mpf->feature1); 532 533 } else if (mpf->physptr) { 534 if (check_physptr(mpf, early)) 535 goto out; 536 } else 537 BUG(); 538 539 if (!early) 540 pr_info("Processors: %d\n", num_processors); 541 /* 542 * Only use the first configuration found. 543 */ 544 out: 545 early_memunmap(mpf, sizeof(*mpf)); 546 } 547 548 static void __init smp_reserve_memory(struct mpf_intel *mpf) 549 { 550 memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr)); 551 } 552 553 static int __init smp_scan_config(unsigned long base, unsigned long length) 554 { 555 unsigned int *bp; 556 struct mpf_intel *mpf; 557 int ret = 0; 558 559 apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n", 560 base, base + length - 1); 561 BUILD_BUG_ON(sizeof(*mpf) != 16); 562 563 while (length > 0) { 564 bp = early_memremap(base, length); 565 mpf = (struct mpf_intel *)bp; 566 if ((*bp == SMP_MAGIC_IDENT) && 567 (mpf->length == 1) && 568 !mpf_checksum((unsigned char *)bp, 16) && 569 ((mpf->specification == 1) 570 || (mpf->specification == 4))) { 571 #ifdef CONFIG_X86_LOCAL_APIC 572 smp_found_config = 1; 573 #endif 574 mpf_base = base; 575 mpf_found = true; 576 577 pr_info("found SMP MP-table at [mem %#010lx-%#010lx]\n", 578 base, base + sizeof(*mpf) - 1); 579 580 memblock_reserve(base, sizeof(*mpf)); 581 if (mpf->physptr) 582 smp_reserve_memory(mpf); 583 584 ret = 1; 585 } 586 early_memunmap(bp, length); 587 588 if (ret) 589 break; 590 591 base += 16; 592 length -= 16; 593 } 594 return ret; 595 } 596 597 void __init default_find_smp_config(void) 598 { 599 unsigned int address; 600 601 /* 602 * FIXME: Linux assumes you have 640K of base ram.. 603 * this continues the error... 604 * 605 * 1) Scan the bottom 1K for a signature 606 * 2) Scan the top 1K of base RAM 607 * 3) Scan the 64K of bios 608 */ 609 if (smp_scan_config(0x0, 0x400) || 610 smp_scan_config(639 * 0x400, 0x400) || 611 smp_scan_config(0xF0000, 0x10000)) 612 return; 613 /* 614 * If it is an SMP machine we should know now, unless the 615 * configuration is in an EISA bus machine with an 616 * extended bios data area. 617 * 618 * there is a real-mode segmented pointer pointing to the 619 * 4K EBDA area at 0x40E, calculate and scan it here. 620 * 621 * NOTE! There are Linux loaders that will corrupt the EBDA 622 * area, and as such this kind of SMP config may be less 623 * trustworthy, simply because the SMP table may have been 624 * stomped on during early boot. These loaders are buggy and 625 * should be fixed. 626 * 627 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 628 */ 629 630 address = get_bios_ebda(); 631 if (address) 632 smp_scan_config(address, 0x400); 633 } 634 635 #ifdef CONFIG_X86_IO_APIC 636 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 637 638 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 639 { 640 int i; 641 642 if (m->irqtype != mp_INT) 643 return 0; 644 645 if (m->irqflag != (MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW)) 646 return 0; 647 648 /* not legacy */ 649 650 for (i = 0; i < mp_irq_entries; i++) { 651 if (mp_irqs[i].irqtype != mp_INT) 652 continue; 653 654 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL | 655 MP_IRQPOL_ACTIVE_LOW)) 656 continue; 657 658 if (mp_irqs[i].srcbus != m->srcbus) 659 continue; 660 if (mp_irqs[i].srcbusirq != m->srcbusirq) 661 continue; 662 if (irq_used[i]) { 663 /* already claimed */ 664 return -2; 665 } 666 irq_used[i] = 1; 667 return i; 668 } 669 670 /* not found */ 671 return -1; 672 } 673 674 #define SPARE_SLOT_NUM 20 675 676 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 677 678 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 679 { 680 int i; 681 682 apic_printk(APIC_VERBOSE, "OLD "); 683 print_mp_irq_info(m); 684 685 i = get_MP_intsrc_index(m); 686 if (i > 0) { 687 memcpy(m, &mp_irqs[i], sizeof(*m)); 688 apic_printk(APIC_VERBOSE, "NEW "); 689 print_mp_irq_info(&mp_irqs[i]); 690 return; 691 } 692 if (!i) { 693 /* legacy, do nothing */ 694 return; 695 } 696 if (*nr_m_spare < SPARE_SLOT_NUM) { 697 /* 698 * not found (-1), or duplicated (-2) are invalid entries, 699 * we need to use the slot later 700 */ 701 m_spare[*nr_m_spare] = m; 702 *nr_m_spare += 1; 703 } 704 } 705 706 static int __init 707 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 708 { 709 if (!mpc_new_phys || count <= mpc_new_length) { 710 WARN(1, "update_mptable: No spare slots (length: %x)\n", count); 711 return -1; 712 } 713 714 return 0; 715 } 716 #else /* CONFIG_X86_IO_APIC */ 717 static 718 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 719 #endif /* CONFIG_X86_IO_APIC */ 720 721 static int __init replace_intsrc_all(struct mpc_table *mpc, 722 unsigned long mpc_new_phys, 723 unsigned long mpc_new_length) 724 { 725 #ifdef CONFIG_X86_IO_APIC 726 int i; 727 #endif 728 int count = sizeof(*mpc); 729 int nr_m_spare = 0; 730 unsigned char *mpt = ((unsigned char *)mpc) + count; 731 732 pr_info("mpc_length %x\n", mpc->length); 733 while (count < mpc->length) { 734 switch (*mpt) { 735 case MP_PROCESSOR: 736 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 737 break; 738 case MP_BUS: 739 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 740 break; 741 case MP_IOAPIC: 742 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 743 break; 744 case MP_INTSRC: 745 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 746 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 747 break; 748 case MP_LINTSRC: 749 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 750 break; 751 default: 752 /* wrong mptable */ 753 smp_dump_mptable(mpc, mpt); 754 goto out; 755 } 756 } 757 758 #ifdef CONFIG_X86_IO_APIC 759 for (i = 0; i < mp_irq_entries; i++) { 760 if (irq_used[i]) 761 continue; 762 763 if (mp_irqs[i].irqtype != mp_INT) 764 continue; 765 766 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL | 767 MP_IRQPOL_ACTIVE_LOW)) 768 continue; 769 770 if (nr_m_spare > 0) { 771 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 772 nr_m_spare--; 773 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i])); 774 m_spare[nr_m_spare] = NULL; 775 } else { 776 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 777 count += sizeof(struct mpc_intsrc); 778 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 779 goto out; 780 memcpy(m, &mp_irqs[i], sizeof(*m)); 781 mpc->length = count; 782 mpt += sizeof(struct mpc_intsrc); 783 } 784 print_mp_irq_info(&mp_irqs[i]); 785 } 786 #endif 787 out: 788 /* update checksum */ 789 mpc->checksum = 0; 790 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 791 792 return 0; 793 } 794 795 int enable_update_mptable; 796 797 static int __init update_mptable_setup(char *str) 798 { 799 enable_update_mptable = 1; 800 #ifdef CONFIG_PCI 801 pci_routeirq = 1; 802 #endif 803 return 0; 804 } 805 early_param("update_mptable", update_mptable_setup); 806 807 static unsigned long __initdata mpc_new_phys; 808 static unsigned long mpc_new_length __initdata = 4096; 809 810 /* alloc_mptable or alloc_mptable=4k */ 811 static int __initdata alloc_mptable; 812 static int __init parse_alloc_mptable_opt(char *p) 813 { 814 enable_update_mptable = 1; 815 #ifdef CONFIG_PCI 816 pci_routeirq = 1; 817 #endif 818 alloc_mptable = 1; 819 if (!p) 820 return 0; 821 mpc_new_length = memparse(p, &p); 822 return 0; 823 } 824 early_param("alloc_mptable", parse_alloc_mptable_opt); 825 826 void __init e820__memblock_alloc_reserved_mpc_new(void) 827 { 828 if (enable_update_mptable && alloc_mptable) 829 mpc_new_phys = e820__memblock_alloc_reserved(mpc_new_length, 4); 830 } 831 832 static int __init update_mp_table(void) 833 { 834 char str[16]; 835 char oem[10]; 836 struct mpf_intel *mpf; 837 struct mpc_table *mpc, *mpc_new; 838 unsigned long size; 839 840 if (!enable_update_mptable) 841 return 0; 842 843 if (!mpf_found) 844 return 0; 845 846 mpf = early_memremap(mpf_base, sizeof(*mpf)); 847 if (!mpf) { 848 pr_err("MPTABLE: mpf early_memremap() failed\n"); 849 return 0; 850 } 851 852 /* 853 * Now see if we need to go further. 854 */ 855 if (mpf->feature1) 856 goto do_unmap_mpf; 857 858 if (!mpf->physptr) 859 goto do_unmap_mpf; 860 861 size = get_mpc_size(mpf->physptr); 862 mpc = early_memremap(mpf->physptr, size); 863 if (!mpc) { 864 pr_err("MPTABLE: mpc early_memremap() failed\n"); 865 goto do_unmap_mpf; 866 } 867 868 if (!smp_check_mpc(mpc, oem, str)) 869 goto do_unmap_mpc; 870 871 pr_info("mpf: %llx\n", (u64)mpf_base); 872 pr_info("physptr: %x\n", mpf->physptr); 873 874 if (mpc_new_phys && mpc->length > mpc_new_length) { 875 mpc_new_phys = 0; 876 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n", 877 mpc_new_length); 878 } 879 880 if (!mpc_new_phys) { 881 unsigned char old, new; 882 /* check if we can change the position */ 883 mpc->checksum = 0; 884 old = mpf_checksum((unsigned char *)mpc, mpc->length); 885 mpc->checksum = 0xff; 886 new = mpf_checksum((unsigned char *)mpc, mpc->length); 887 if (old == new) { 888 pr_info("mpc is readonly, please try alloc_mptable instead\n"); 889 goto do_unmap_mpc; 890 } 891 pr_info("use in-position replacing\n"); 892 } else { 893 mpc_new = early_memremap(mpc_new_phys, mpc_new_length); 894 if (!mpc_new) { 895 pr_err("MPTABLE: new mpc early_memremap() failed\n"); 896 goto do_unmap_mpc; 897 } 898 mpf->physptr = mpc_new_phys; 899 memcpy(mpc_new, mpc, mpc->length); 900 early_memunmap(mpc, size); 901 mpc = mpc_new; 902 size = mpc_new_length; 903 /* check if we can modify that */ 904 if (mpc_new_phys - mpf->physptr) { 905 struct mpf_intel *mpf_new; 906 /* steal 16 bytes from [0, 1k) */ 907 mpf_new = early_memremap(0x400 - 16, sizeof(*mpf_new)); 908 if (!mpf_new) { 909 pr_err("MPTABLE: new mpf early_memremap() failed\n"); 910 goto do_unmap_mpc; 911 } 912 pr_info("mpf new: %x\n", 0x400 - 16); 913 memcpy(mpf_new, mpf, 16); 914 early_memunmap(mpf, sizeof(*mpf)); 915 mpf = mpf_new; 916 mpf->physptr = mpc_new_phys; 917 } 918 mpf->checksum = 0; 919 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 920 pr_info("physptr new: %x\n", mpf->physptr); 921 } 922 923 /* 924 * only replace the one with mp_INT and 925 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 926 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 927 * may need pci=routeirq for all coverage 928 */ 929 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 930 931 do_unmap_mpc: 932 early_memunmap(mpc, size); 933 934 do_unmap_mpf: 935 early_memunmap(mpf, sizeof(*mpf)); 936 937 return 0; 938 } 939 940 late_initcall(update_mp_table); 941