xref: /linux-6.15/arch/x86/boot/cpuflags.c (revision 558fc8e1)
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/types.h>
3 #include "bitops.h"
4 
5 #include <asm/processor-flags.h>
6 #include <asm/required-features.h>
7 #include <asm/msr-index.h>
8 #include "cpuflags.h"
9 
10 struct cpu_features cpu;
11 u32 cpu_vendor[3];
12 
13 static bool loaded_flags;
14 
15 static int has_fpu(void)
16 {
17 	u16 fcw = -1, fsw = -1;
18 	unsigned long cr0;
19 
20 	asm volatile("mov %%cr0,%0" : "=r" (cr0));
21 	if (cr0 & (X86_CR0_EM|X86_CR0_TS)) {
22 		cr0 &= ~(X86_CR0_EM|X86_CR0_TS);
23 		asm volatile("mov %0,%%cr0" : : "r" (cr0));
24 	}
25 
26 	asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
27 		     : "+m" (fsw), "+m" (fcw));
28 
29 	return fsw == 0 && (fcw & 0x103f) == 0x003f;
30 }
31 
32 #ifdef CONFIG_X86_32
33 /*
34  * For building the 16-bit code we want to explicitly specify 32-bit
35  * push/pop operations, rather than just saying 'pushf' or 'popf' and
36  * letting the compiler choose.
37  */
38 bool has_eflag(unsigned long mask)
39 {
40 	unsigned long f0, f1;
41 
42 	asm volatile("pushfl	\n\t"
43 		     "pushfl	\n\t"
44 		     "pop %0	\n\t"
45 		     "mov %0,%1	\n\t"
46 		     "xor %2,%1	\n\t"
47 		     "push %1	\n\t"
48 		     "popfl	\n\t"
49 		     "pushfl	\n\t"
50 		     "pop %1	\n\t"
51 		     "popfl"
52 		     : "=&r" (f0), "=&r" (f1)
53 		     : "ri" (mask));
54 
55 	return !!((f0^f1) & mask);
56 }
57 #endif
58 
59 void cpuid_count(u32 id, u32 count, u32 *a, u32 *b, u32 *c, u32 *d)
60 {
61 	asm volatile("cpuid"
62 		     : "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)
63 		     : "0" (id), "2" (count)
64 	);
65 }
66 
67 #define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d)
68 
69 void get_cpuflags(void)
70 {
71 	u32 max_intel_level, max_amd_level;
72 	u32 tfms;
73 	u32 ignored;
74 
75 	if (loaded_flags)
76 		return;
77 	loaded_flags = true;
78 
79 	if (has_fpu())
80 		set_bit(X86_FEATURE_FPU, cpu.flags);
81 
82 	if (has_eflag(X86_EFLAGS_ID)) {
83 		cpuid(0x0, &max_intel_level, &cpu_vendor[0], &cpu_vendor[2],
84 		      &cpu_vendor[1]);
85 
86 		if (max_intel_level >= 0x00000001 &&
87 		    max_intel_level <= 0x0000ffff) {
88 			cpuid(0x1, &tfms, &ignored, &cpu.flags[4],
89 			      &cpu.flags[0]);
90 			cpu.level = (tfms >> 8) & 15;
91 			cpu.family = cpu.level;
92 			cpu.model = (tfms >> 4) & 15;
93 			if (cpu.level >= 6)
94 				cpu.model += ((tfms >> 16) & 0xf) << 4;
95 		}
96 
97 		if (max_intel_level >= 0x00000007) {
98 			cpuid_count(0x00000007, 0, &ignored, &ignored,
99 					&cpu.flags[16], &ignored);
100 		}
101 
102 		cpuid(0x80000000, &max_amd_level, &ignored, &ignored,
103 		      &ignored);
104 
105 		if (max_amd_level >= 0x80000001 &&
106 		    max_amd_level <= 0x8000ffff) {
107 			cpuid(0x80000001, &ignored, &ignored, &cpu.flags[6],
108 			      &cpu.flags[1]);
109 		}
110 	}
111 }
112