1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright IBM Corp. 2008 4 * Author(s): Martin Schwidefsky ([email protected]) 5 */ 6 7 #define KMSG_COMPONENT "cpu" 8 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 9 10 #include <linux/stop_machine.h> 11 #include <linux/cpufeature.h> 12 #include <linux/bitops.h> 13 #include <linux/kernel.h> 14 #include <linux/random.h> 15 #include <linux/sched/mm.h> 16 #include <linux/init.h> 17 #include <linux/seq_file.h> 18 #include <linux/mm_types.h> 19 #include <linux/delay.h> 20 #include <linux/cpu.h> 21 22 #include <asm/diag.h> 23 #include <asm/facility.h> 24 #include <asm/elf.h> 25 #include <asm/lowcore.h> 26 #include <asm/param.h> 27 #include <asm/sclp.h> 28 #include <asm/smp.h> 29 30 unsigned long __read_mostly elf_hwcap; 31 char elf_platform[ELF_PLATFORM_SIZE]; 32 33 unsigned long int_hwcap; 34 35 struct cpu_info { 36 unsigned int cpu_mhz_dynamic; 37 unsigned int cpu_mhz_static; 38 struct cpuid cpu_id; 39 }; 40 41 static DEFINE_PER_CPU(struct cpu_info, cpu_info); 42 static DEFINE_PER_CPU(int, cpu_relax_retry); 43 44 static bool machine_has_cpu_mhz; 45 46 void __init cpu_detect_mhz_feature(void) 47 { 48 if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL) 49 machine_has_cpu_mhz = true; 50 } 51 52 static void update_cpu_mhz(void *arg) 53 { 54 unsigned long mhz; 55 struct cpu_info *c; 56 57 mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0); 58 c = this_cpu_ptr(&cpu_info); 59 c->cpu_mhz_dynamic = mhz >> 32; 60 c->cpu_mhz_static = mhz & 0xffffffff; 61 } 62 63 void s390_update_cpu_mhz(void) 64 { 65 s390_adjust_jiffies(); 66 if (machine_has_cpu_mhz) 67 on_each_cpu(update_cpu_mhz, NULL, 0); 68 } 69 70 void notrace stop_machine_yield(const struct cpumask *cpumask) 71 { 72 int cpu, this_cpu; 73 74 this_cpu = smp_processor_id(); 75 if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) { 76 __this_cpu_write(cpu_relax_retry, 0); 77 cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false); 78 if (cpu >= nr_cpu_ids) 79 return; 80 if (arch_vcpu_is_preempted(cpu)) 81 smp_yield_cpu(cpu); 82 } 83 } 84 85 /* 86 * cpu_init - initializes state that is per-CPU. 87 */ 88 void cpu_init(void) 89 { 90 struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id); 91 92 get_cpu_id(id); 93 if (machine_has_cpu_mhz) 94 update_cpu_mhz(NULL); 95 mmgrab(&init_mm); 96 current->active_mm = &init_mm; 97 BUG_ON(current->mm); 98 enter_lazy_tlb(&init_mm, current); 99 } 100 101 /* 102 * cpu_have_feature - Test CPU features on module initialization 103 */ 104 int cpu_have_feature(unsigned int num) 105 { 106 return elf_hwcap & (1UL << num); 107 } 108 EXPORT_SYMBOL(cpu_have_feature); 109 110 static void show_facilities(struct seq_file *m) 111 { 112 unsigned int bit; 113 114 seq_puts(m, "facilities :"); 115 for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT) 116 seq_printf(m, " %d", bit); 117 seq_putc(m, '\n'); 118 } 119 120 static void show_cpu_summary(struct seq_file *m, void *v) 121 { 122 static const char *hwcap_str[] = { 123 [HWCAP_NR_ESAN3] = "esan3", 124 [HWCAP_NR_ZARCH] = "zarch", 125 [HWCAP_NR_STFLE] = "stfle", 126 [HWCAP_NR_MSA] = "msa", 127 [HWCAP_NR_LDISP] = "ldisp", 128 [HWCAP_NR_EIMM] = "eimm", 129 [HWCAP_NR_DFP] = "dfp", 130 [HWCAP_NR_HPAGE] = "edat", 131 [HWCAP_NR_ETF3EH] = "etf3eh", 132 [HWCAP_NR_HIGH_GPRS] = "highgprs", 133 [HWCAP_NR_TE] = "te", 134 [HWCAP_NR_VXRS] = "vx", 135 [HWCAP_NR_VXRS_BCD] = "vxd", 136 [HWCAP_NR_VXRS_EXT] = "vxe", 137 [HWCAP_NR_GS] = "gs", 138 [HWCAP_NR_VXRS_EXT2] = "vxe2", 139 [HWCAP_NR_VXRS_PDE] = "vxp", 140 [HWCAP_NR_SORT] = "sort", 141 [HWCAP_NR_DFLT] = "dflt", 142 [HWCAP_NR_VXRS_PDE2] = "vxp2", 143 [HWCAP_NR_NNPA] = "nnpa", 144 [HWCAP_NR_PCI_MIO] = "pcimio", 145 }; 146 static const char * const int_hwcap_str[] = { 147 [HWCAP_INT_NR_SIE] = "sie", 148 }; 149 int i, cpu; 150 151 BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX); 152 BUILD_BUG_ON(ARRAY_SIZE(int_hwcap_str) != HWCAP_INT_NR_MAX); 153 seq_printf(m, "vendor_id : IBM/S390\n" 154 "# processors : %i\n" 155 "bogomips per cpu: %lu.%02lu\n", 156 num_online_cpus(), loops_per_jiffy/(500000/HZ), 157 (loops_per_jiffy/(5000/HZ))%100); 158 seq_printf(m, "max thread id : %d\n", smp_cpu_mtid); 159 seq_puts(m, "features\t: "); 160 for (i = 0; i < ARRAY_SIZE(hwcap_str); i++) 161 if (hwcap_str[i] && (elf_hwcap & (1UL << i))) 162 seq_printf(m, "%s ", hwcap_str[i]); 163 for (i = 0; i < ARRAY_SIZE(int_hwcap_str); i++) 164 if (int_hwcap_str[i] && (int_hwcap & (1UL << i))) 165 seq_printf(m, "%s ", int_hwcap_str[i]); 166 seq_puts(m, "\n"); 167 show_facilities(m); 168 show_cacheinfo(m); 169 for_each_online_cpu(cpu) { 170 struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu); 171 172 seq_printf(m, "processor %d: " 173 "version = %02X, " 174 "identification = %06X, " 175 "machine = %04X\n", 176 cpu, id->version, id->ident, id->machine); 177 } 178 } 179 180 /* 181 * Setup hardware capabilities. 182 */ 183 static int __init setup_hwcaps(void) 184 { 185 static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 }; 186 int i; 187 188 /* 189 * The store facility list bits numbers as found in the principles 190 * of operation are numbered with bit 1UL<<31 as number 0 to 191 * bit 1UL<<0 as number 31. 192 * Bit 0: instructions named N3, "backported" to esa-mode 193 * Bit 2: z/Architecture mode is active 194 * Bit 7: the store-facility-list-extended facility is installed 195 * Bit 17: the message-security assist is installed 196 * Bit 19: the long-displacement facility is installed 197 * Bit 21: the extended-immediate facility is installed 198 * Bit 22: extended-translation facility 3 is installed 199 * Bit 30: extended-translation facility 3 enhancement facility 200 * These get translated to: 201 * HWCAP_ESAN3 bit 0, HWCAP_ZARCH bit 1, 202 * HWCAP_STFLE bit 2, HWCAP_MSA bit 3, 203 * HWCAP_LDISP bit 4, HWCAP_EIMM bit 5 and 204 * HWCAP_ETF3EH bit 8 (22 && 30). 205 */ 206 for (i = 0; i < 6; i++) 207 if (test_facility(stfl_bits[i])) 208 elf_hwcap |= 1UL << i; 209 210 if (test_facility(22) && test_facility(30)) 211 elf_hwcap |= HWCAP_ETF3EH; 212 213 /* 214 * Check for additional facilities with store-facility-list-extended. 215 * stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0 216 * and 1ULL<<0 as bit 63. Bits 0-31 contain the same information 217 * as stored by stfl, bits 32-xxx contain additional facilities. 218 * How many facility words are stored depends on the number of 219 * doublewords passed to the instruction. The additional facilities 220 * are: 221 * Bit 42: decimal floating point facility is installed 222 * Bit 44: perform floating point operation facility is installed 223 * translated to: 224 * HWCAP_DFP bit 6 (42 && 44). 225 */ 226 if ((elf_hwcap & (1UL << 2)) && test_facility(42) && test_facility(44)) 227 elf_hwcap |= HWCAP_DFP; 228 229 /* 230 * Huge page support HWCAP_HPAGE is bit 7. 231 */ 232 if (MACHINE_HAS_EDAT1) 233 elf_hwcap |= HWCAP_HPAGE; 234 235 /* 236 * 64-bit register support for 31-bit processes 237 * HWCAP_HIGH_GPRS is bit 9. 238 */ 239 elf_hwcap |= HWCAP_HIGH_GPRS; 240 241 /* 242 * Transactional execution support HWCAP_TE is bit 10. 243 */ 244 if (MACHINE_HAS_TE) 245 elf_hwcap |= HWCAP_TE; 246 247 /* 248 * Vector extension HWCAP_VXRS is bit 11. The Vector extension 249 * can be disabled with the "novx" parameter. Use MACHINE_HAS_VX 250 * instead of facility bit 129. 251 */ 252 if (MACHINE_HAS_VX) { 253 elf_hwcap |= HWCAP_VXRS; 254 if (test_facility(134)) 255 elf_hwcap |= HWCAP_VXRS_BCD; 256 if (test_facility(135)) 257 elf_hwcap |= HWCAP_VXRS_EXT; 258 if (test_facility(148)) 259 elf_hwcap |= HWCAP_VXRS_EXT2; 260 if (test_facility(152)) 261 elf_hwcap |= HWCAP_VXRS_PDE; 262 if (test_facility(192)) 263 elf_hwcap |= HWCAP_VXRS_PDE2; 264 } 265 if (test_facility(150)) 266 elf_hwcap |= HWCAP_SORT; 267 if (test_facility(151)) 268 elf_hwcap |= HWCAP_DFLT; 269 if (test_facility(165)) 270 elf_hwcap |= HWCAP_NNPA; 271 272 /* 273 * Guarded storage support HWCAP_GS is bit 12. 274 */ 275 if (MACHINE_HAS_GS) 276 elf_hwcap |= HWCAP_GS; 277 if (MACHINE_HAS_PCI_MIO) 278 elf_hwcap |= HWCAP_PCI_MIO; 279 280 /* 281 * Virtualization support HWCAP_INT_SIE is bit 0. 282 */ 283 if (sclp.has_sief2) 284 int_hwcap |= HWCAP_INT_SIE; 285 286 return 0; 287 } 288 arch_initcall(setup_hwcaps); 289 290 static int __init setup_elf_platform(void) 291 { 292 struct cpuid cpu_id; 293 294 get_cpu_id(&cpu_id); 295 add_device_randomness(&cpu_id, sizeof(cpu_id)); 296 switch (cpu_id.machine) { 297 case 0x2064: 298 case 0x2066: 299 default: /* Use "z900" as default for 64 bit kernels. */ 300 strcpy(elf_platform, "z900"); 301 break; 302 case 0x2084: 303 case 0x2086: 304 strcpy(elf_platform, "z990"); 305 break; 306 case 0x2094: 307 case 0x2096: 308 strcpy(elf_platform, "z9-109"); 309 break; 310 case 0x2097: 311 case 0x2098: 312 strcpy(elf_platform, "z10"); 313 break; 314 case 0x2817: 315 case 0x2818: 316 strcpy(elf_platform, "z196"); 317 break; 318 case 0x2827: 319 case 0x2828: 320 strcpy(elf_platform, "zEC12"); 321 break; 322 case 0x2964: 323 case 0x2965: 324 strcpy(elf_platform, "z13"); 325 break; 326 case 0x3906: 327 case 0x3907: 328 strcpy(elf_platform, "z14"); 329 break; 330 case 0x8561: 331 case 0x8562: 332 strcpy(elf_platform, "z15"); 333 break; 334 } 335 return 0; 336 } 337 arch_initcall(setup_elf_platform); 338 339 static void show_cpu_topology(struct seq_file *m, unsigned long n) 340 { 341 #ifdef CONFIG_SCHED_TOPOLOGY 342 seq_printf(m, "physical id : %d\n", topology_physical_package_id(n)); 343 seq_printf(m, "core id : %d\n", topology_core_id(n)); 344 seq_printf(m, "book id : %d\n", topology_book_id(n)); 345 seq_printf(m, "drawer id : %d\n", topology_drawer_id(n)); 346 seq_printf(m, "dedicated : %d\n", topology_cpu_dedicated(n)); 347 seq_printf(m, "address : %d\n", smp_cpu_get_cpu_address(n)); 348 seq_printf(m, "siblings : %d\n", cpumask_weight(topology_core_cpumask(n))); 349 seq_printf(m, "cpu cores : %d\n", topology_booted_cores(n)); 350 #endif /* CONFIG_SCHED_TOPOLOGY */ 351 } 352 353 static void show_cpu_ids(struct seq_file *m, unsigned long n) 354 { 355 struct cpuid *id = &per_cpu(cpu_info.cpu_id, n); 356 357 seq_printf(m, "version : %02X\n", id->version); 358 seq_printf(m, "identification : %06X\n", id->ident); 359 seq_printf(m, "machine : %04X\n", id->machine); 360 } 361 362 static void show_cpu_mhz(struct seq_file *m, unsigned long n) 363 { 364 struct cpu_info *c = per_cpu_ptr(&cpu_info, n); 365 366 if (!machine_has_cpu_mhz) 367 return; 368 seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic); 369 seq_printf(m, "cpu MHz static : %d\n", c->cpu_mhz_static); 370 } 371 372 /* 373 * show_cpuinfo - Get information on one CPU for use by procfs. 374 */ 375 static int show_cpuinfo(struct seq_file *m, void *v) 376 { 377 unsigned long n = (unsigned long) v - 1; 378 unsigned long first = cpumask_first(cpu_online_mask); 379 380 if (n == first) 381 show_cpu_summary(m, v); 382 seq_printf(m, "\ncpu number : %ld\n", n); 383 show_cpu_topology(m, n); 384 show_cpu_ids(m, n); 385 show_cpu_mhz(m, n); 386 return 0; 387 } 388 389 static inline void *c_update(loff_t *pos) 390 { 391 if (*pos) 392 *pos = cpumask_next(*pos - 1, cpu_online_mask); 393 else 394 *pos = cpumask_first(cpu_online_mask); 395 return *pos < nr_cpu_ids ? (void *)*pos + 1 : NULL; 396 } 397 398 static void *c_start(struct seq_file *m, loff_t *pos) 399 { 400 get_online_cpus(); 401 return c_update(pos); 402 } 403 404 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 405 { 406 ++*pos; 407 return c_update(pos); 408 } 409 410 static void c_stop(struct seq_file *m, void *v) 411 { 412 put_online_cpus(); 413 } 414 415 const struct seq_operations cpuinfo_op = { 416 .start = c_start, 417 .next = c_next, 418 .stop = c_stop, 419 .show = show_cpuinfo, 420 }; 421 422 int s390_isolate_bp(void) 423 { 424 if (!test_facility(82)) 425 return -EOPNOTSUPP; 426 set_thread_flag(TIF_ISOLATE_BP); 427 return 0; 428 } 429 EXPORT_SYMBOL(s390_isolate_bp); 430 431 int s390_isolate_bp_guest(void) 432 { 433 if (!test_facility(82)) 434 return -EOPNOTSUPP; 435 set_thread_flag(TIF_ISOLATE_BP_GUEST); 436 return 0; 437 } 438 EXPORT_SYMBOL(s390_isolate_bp_guest); 439