1588cb88cSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 27db91e57SPalmer Dabbelt /* 37db91e57SPalmer Dabbelt * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. 47db91e57SPalmer Dabbelt * Chen Liqin <[email protected]> 57db91e57SPalmer Dabbelt * Lennox Wu <[email protected]> 67db91e57SPalmer Dabbelt * Copyright (C) 2012 Regents of the University of California 77db91e57SPalmer Dabbelt * Copyright (C) 2017 SiFive 87db91e57SPalmer Dabbelt */ 97db91e57SPalmer Dabbelt 105ed881bcSPaul Walmsley #include <linux/cpu.h> 117db91e57SPalmer Dabbelt #include <linux/kernel.h> 127db91e57SPalmer Dabbelt #include <linux/sched.h> 1386b276c1SNanyong Sun #include <linux/sched/debug.h> 147db91e57SPalmer Dabbelt #include <linux/sched/task_stack.h> 157db91e57SPalmer Dabbelt #include <linux/tick.h> 167db91e57SPalmer Dabbelt #include <linux/ptrace.h> 175e454b54SAl Viro #include <linux/uaccess.h> 18*048e2906SYunhui Cui #include <linux/personality.h> 197db91e57SPalmer Dabbelt 207db91e57SPalmer Dabbelt #include <asm/unistd.h> 217db91e57SPalmer Dabbelt #include <asm/processor.h> 227db91e57SPalmer Dabbelt #include <asm/csr.h> 23091b9450SKefeng Wang #include <asm/stacktrace.h> 247db91e57SPalmer Dabbelt #include <asm/string.h> 257db91e57SPalmer Dabbelt #include <asm/switch_to.h> 265ed881bcSPaul Walmsley #include <asm/thread_info.h> 27f6e64b66SAnup Patel #include <asm/cpuidle.h> 283a2df632SGreentime Hu #include <asm/vector.h> 299f23a5d2SClément Léger #include <asm/cpufeature.h> 30*048e2906SYunhui Cui #include <asm/exec.h> 317db91e57SPalmer Dabbelt 32fea2fed2SGuo Ren #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_STACKPROTECTOR_PER_TASK) 33f2c9699fSGuo Ren #include <linux/stackprotector.h> 34f2c9699fSGuo Ren unsigned long __stack_chk_guard __read_mostly; 35f2c9699fSGuo Ren EXPORT_SYMBOL(__stack_chk_guard); 36f2c9699fSGuo Ren #endif 37f2c9699fSGuo Ren 387db91e57SPalmer Dabbelt extern asmlinkage void ret_from_fork(void); 397db91e57SPalmer Dabbelt 408a48ea87SAlexandre Ghiti void noinstr arch_cpu_idle(void) 417db91e57SPalmer Dabbelt { 42f6e64b66SAnup Patel cpu_do_idle(); 437db91e57SPalmer Dabbelt } 447db91e57SPalmer Dabbelt 459f23a5d2SClément Léger int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 469f23a5d2SClément Léger { 479f23a5d2SClément Léger if (!unaligned_ctl_available()) 489f23a5d2SClément Léger return -EINVAL; 499f23a5d2SClément Léger 509f23a5d2SClément Léger tsk->thread.align_ctl = val; 519f23a5d2SClément Léger return 0; 529f23a5d2SClément Léger } 539f23a5d2SClément Léger 549f23a5d2SClément Léger int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 559f23a5d2SClément Léger { 569f23a5d2SClément Léger if (!unaligned_ctl_available()) 579f23a5d2SClément Léger return -EINVAL; 589f23a5d2SClément Léger 599f23a5d2SClément Léger return put_user(tsk->thread.align_ctl, (unsigned long __user *)adr); 609f23a5d2SClément Léger } 619f23a5d2SClément Léger 62091b9450SKefeng Wang void __show_regs(struct pt_regs *regs) 637db91e57SPalmer Dabbelt { 647db91e57SPalmer Dabbelt show_regs_print_info(KERN_DEFAULT); 657db91e57SPalmer Dabbelt 66da401e89SKefeng Wang if (!user_mode(regs)) { 67da401e89SKefeng Wang pr_cont("epc : %pS\n", (void *)regs->epc); 68da401e89SKefeng Wang pr_cont(" ra : %pS\n", (void *)regs->ra); 69da401e89SKefeng Wang } 70da401e89SKefeng Wang 71a4c3733dSChristoph Hellwig pr_cont("epc : " REG_FMT " ra : " REG_FMT " sp : " REG_FMT "\n", 72a4c3733dSChristoph Hellwig regs->epc, regs->ra, regs->sp); 737db91e57SPalmer Dabbelt pr_cont(" gp : " REG_FMT " tp : " REG_FMT " t0 : " REG_FMT "\n", 747db91e57SPalmer Dabbelt regs->gp, regs->tp, regs->t0); 757db91e57SPalmer Dabbelt pr_cont(" t1 : " REG_FMT " t2 : " REG_FMT " s0 : " REG_FMT "\n", 767db91e57SPalmer Dabbelt regs->t1, regs->t2, regs->s0); 777db91e57SPalmer Dabbelt pr_cont(" s1 : " REG_FMT " a0 : " REG_FMT " a1 : " REG_FMT "\n", 787db91e57SPalmer Dabbelt regs->s1, regs->a0, regs->a1); 797db91e57SPalmer Dabbelt pr_cont(" a2 : " REG_FMT " a3 : " REG_FMT " a4 : " REG_FMT "\n", 807db91e57SPalmer Dabbelt regs->a2, regs->a3, regs->a4); 817db91e57SPalmer Dabbelt pr_cont(" a5 : " REG_FMT " a6 : " REG_FMT " a7 : " REG_FMT "\n", 827db91e57SPalmer Dabbelt regs->a5, regs->a6, regs->a7); 837db91e57SPalmer Dabbelt pr_cont(" s2 : " REG_FMT " s3 : " REG_FMT " s4 : " REG_FMT "\n", 847db91e57SPalmer Dabbelt regs->s2, regs->s3, regs->s4); 857db91e57SPalmer Dabbelt pr_cont(" s5 : " REG_FMT " s6 : " REG_FMT " s7 : " REG_FMT "\n", 867db91e57SPalmer Dabbelt regs->s5, regs->s6, regs->s7); 877db91e57SPalmer Dabbelt pr_cont(" s8 : " REG_FMT " s9 : " REG_FMT " s10: " REG_FMT "\n", 887db91e57SPalmer Dabbelt regs->s8, regs->s9, regs->s10); 897db91e57SPalmer Dabbelt pr_cont(" s11: " REG_FMT " t3 : " REG_FMT " t4 : " REG_FMT "\n", 907db91e57SPalmer Dabbelt regs->s11, regs->t3, regs->t4); 917db91e57SPalmer Dabbelt pr_cont(" t5 : " REG_FMT " t6 : " REG_FMT "\n", 927db91e57SPalmer Dabbelt regs->t5, regs->t6); 937db91e57SPalmer Dabbelt 94a4c3733dSChristoph Hellwig pr_cont("status: " REG_FMT " badaddr: " REG_FMT " cause: " REG_FMT "\n", 95a4c3733dSChristoph Hellwig regs->status, regs->badaddr, regs->cause); 967db91e57SPalmer Dabbelt } 97091b9450SKefeng Wang void show_regs(struct pt_regs *regs) 98091b9450SKefeng Wang { 99091b9450SKefeng Wang __show_regs(regs); 100091b9450SKefeng Wang if (!user_mode(regs)) 101091b9450SKefeng Wang dump_backtrace(regs, NULL, KERN_DEFAULT); 102091b9450SKefeng Wang } 1037db91e57SPalmer Dabbelt 104*048e2906SYunhui Cui unsigned long arch_align_stack(unsigned long sp) 105*048e2906SYunhui Cui { 106*048e2906SYunhui Cui if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 107*048e2906SYunhui Cui sp -= get_random_u32_below(PAGE_SIZE); 108*048e2906SYunhui Cui return sp & ~0xf; 109*048e2906SYunhui Cui } 110*048e2906SYunhui Cui 111f4b395e6SGuo Ren #ifdef CONFIG_COMPAT 112f4b395e6SGuo Ren static bool compat_mode_supported __read_mostly; 113f4b395e6SGuo Ren 114f4b395e6SGuo Ren bool compat_elf_check_arch(Elf32_Ehdr *hdr) 115f4b395e6SGuo Ren { 116f4b395e6SGuo Ren return compat_mode_supported && 117f4b395e6SGuo Ren hdr->e_machine == EM_RISCV && 118f4b395e6SGuo Ren hdr->e_ident[EI_CLASS] == ELFCLASS32; 119f4b395e6SGuo Ren } 120f4b395e6SGuo Ren 121f4b395e6SGuo Ren static int __init compat_mode_detect(void) 122f4b395e6SGuo Ren { 123f4b395e6SGuo Ren unsigned long tmp = csr_read(CSR_STATUS); 124f4b395e6SGuo Ren 125f4b395e6SGuo Ren csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); 126f4b395e6SGuo Ren compat_mode_supported = 127f4b395e6SGuo Ren (csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32; 128f4b395e6SGuo Ren 129f4b395e6SGuo Ren csr_write(CSR_STATUS, tmp); 130f4b395e6SGuo Ren 131f4b395e6SGuo Ren pr_info("riscv: ELF compat mode %s", 132542d353eSJisheng Zhang compat_mode_supported ? "supported" : "unsupported"); 133f4b395e6SGuo Ren 134f4b395e6SGuo Ren return 0; 135f4b395e6SGuo Ren } 136f4b395e6SGuo Ren early_initcall(compat_mode_detect); 137f4b395e6SGuo Ren #endif 138f4b395e6SGuo Ren 1397db91e57SPalmer Dabbelt void start_thread(struct pt_regs *regs, unsigned long pc, 1407db91e57SPalmer Dabbelt unsigned long sp) 1417db91e57SPalmer Dabbelt { 142a4c3733dSChristoph Hellwig regs->status = SR_PIE; 14337a7a2a1SJisheng Zhang if (has_fpu()) { 144a4c3733dSChristoph Hellwig regs->status |= SR_FS_INITIAL; 1458ac71d7eSVincent Chen /* 1468ac71d7eSVincent Chen * Restore the initial value to the FP register 1478ac71d7eSVincent Chen * before starting the user program. 1488ac71d7eSVincent Chen */ 1498ac71d7eSVincent Chen fstate_restore(current, regs); 1508ac71d7eSVincent Chen } 151a4c3733dSChristoph Hellwig regs->epc = pc; 1527db91e57SPalmer Dabbelt regs->sp = sp; 15369d0bf4cSGuo Ren 15469d0bf4cSGuo Ren #ifdef CONFIG_64BIT 15569d0bf4cSGuo Ren regs->status &= ~SR_UXL; 15669d0bf4cSGuo Ren 15769d0bf4cSGuo Ren if (is_compat_task()) 15869d0bf4cSGuo Ren regs->status |= SR_UXL_32; 15969d0bf4cSGuo Ren else 16069d0bf4cSGuo Ren regs->status |= SR_UXL_64; 16169d0bf4cSGuo Ren #endif 1627db91e57SPalmer Dabbelt } 1637db91e57SPalmer Dabbelt 1647db91e57SPalmer Dabbelt void flush_thread(void) 1657db91e57SPalmer Dabbelt { 1669671f706SAlan Kao #ifdef CONFIG_FPU 1677db91e57SPalmer Dabbelt /* 1688ac71d7eSVincent Chen * Reset FPU state and context 1697db91e57SPalmer Dabbelt * frm: round to nearest, ties to even (IEEE default) 1707db91e57SPalmer Dabbelt * fflags: accrued exceptions cleared 1717db91e57SPalmer Dabbelt */ 1728ac71d7eSVincent Chen fstate_off(current, task_pt_regs(current)); 1737db91e57SPalmer Dabbelt memset(¤t->thread.fstate, 0, sizeof(current->thread.fstate)); 1749671f706SAlan Kao #endif 1753a2df632SGreentime Hu #ifdef CONFIG_RISCV_ISA_V 1763a2df632SGreentime Hu /* Reset vector state */ 1771fd96a3eSAndy Chiu riscv_v_vstate_ctrl_init(current); 1783a2df632SGreentime Hu riscv_v_vstate_off(task_pt_regs(current)); 1793a2df632SGreentime Hu kfree(current->thread.vstate.datap); 1803a2df632SGreentime Hu memset(¤t->thread.vstate, 0, sizeof(struct __riscv_v_ext_state)); 1817df56cbcSAndy Chiu clear_tsk_thread_flag(current, TIF_RISCV_V_DEFER_RESTORE); 1823a2df632SGreentime Hu #endif 1833a2df632SGreentime Hu } 1843a2df632SGreentime Hu 1853a2df632SGreentime Hu void arch_release_task_struct(struct task_struct *tsk) 1863a2df632SGreentime Hu { 1873a2df632SGreentime Hu /* Free the vector context of datap. */ 1883a2df632SGreentime Hu if (has_vector()) 189bd446f5dSAndy Chiu riscv_v_thread_free(tsk); 1907db91e57SPalmer Dabbelt } 1917db91e57SPalmer Dabbelt 1927db91e57SPalmer Dabbelt int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 1937db91e57SPalmer Dabbelt { 1947db91e57SPalmer Dabbelt fstate_save(src, task_pt_regs(src)); 1957db91e57SPalmer Dabbelt *dst = *src; 1963a2df632SGreentime Hu /* clear entire V context, including datap for a new task */ 1973a2df632SGreentime Hu memset(&dst->thread.vstate, 0, sizeof(struct __riscv_v_ext_state)); 1982080ff94SAndy Chiu memset(&dst->thread.kernel_vstate, 0, sizeof(struct __riscv_v_ext_state)); 1997df56cbcSAndy Chiu clear_tsk_thread_flag(dst, TIF_RISCV_V_DEFER_RESTORE); 2003a2df632SGreentime Hu 2017db91e57SPalmer Dabbelt return 0; 2027db91e57SPalmer Dabbelt } 2037db91e57SPalmer Dabbelt 204c5febea0SEric W. Biederman int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) 2057db91e57SPalmer Dabbelt { 206c5febea0SEric W. Biederman unsigned long clone_flags = args->flags; 207c5febea0SEric W. Biederman unsigned long usp = args->stack; 208c5febea0SEric W. Biederman unsigned long tls = args->tls; 2097db91e57SPalmer Dabbelt struct pt_regs *childregs = task_pt_regs(p); 2107db91e57SPalmer Dabbelt 2116510c784SJisheng Zhang memset(&p->thread.s, 0, sizeof(p->thread.s)); 2126510c784SJisheng Zhang 2137db91e57SPalmer Dabbelt /* p->thread holds context to be restored by __switch_to() */ 2145bd2e97cSEric W. Biederman if (unlikely(args->fn)) { 2157db91e57SPalmer Dabbelt /* Kernel thread */ 2167db91e57SPalmer Dabbelt memset(childregs, 0, sizeof(struct pt_regs)); 217a4c3733dSChristoph Hellwig /* Supervisor/Machine, irqs on: */ 218a4c3733dSChristoph Hellwig childregs->status = SR_PP | SR_PIE; 2197db91e57SPalmer Dabbelt 2205bd2e97cSEric W. Biederman p->thread.s[0] = (unsigned long)args->fn; 2215bd2e97cSEric W. Biederman p->thread.s[1] = (unsigned long)args->fn_arg; 2227db91e57SPalmer Dabbelt } else { 2237db91e57SPalmer Dabbelt *childregs = *(current_pt_regs()); 2243a2df632SGreentime Hu /* Turn off status.VS */ 2253a2df632SGreentime Hu riscv_v_vstate_off(childregs); 2267db91e57SPalmer Dabbelt if (usp) /* User fork */ 2277db91e57SPalmer Dabbelt childregs->sp = usp; 2287db91e57SPalmer Dabbelt if (clone_flags & CLONE_SETTLS) 22920bda4edSAmanieu d'Antras childregs->tp = tls; 2307db91e57SPalmer Dabbelt childregs->a0 = 0; /* Return value of fork() */ 231ab9164daSJisheng Zhang p->thread.s[0] = 0; 2327db91e57SPalmer Dabbelt } 233ecd2ada8SGreentime Hu p->thread.riscv_v_flags = 0; 2342080ff94SAndy Chiu if (has_vector()) 2352080ff94SAndy Chiu riscv_v_thread_alloc(p); 236ab9164daSJisheng Zhang p->thread.ra = (unsigned long)ret_from_fork; 2377db91e57SPalmer Dabbelt p->thread.sp = (unsigned long)childregs; /* kernel sp */ 2387db91e57SPalmer Dabbelt return 0; 2397db91e57SPalmer Dabbelt } 240bd446f5dSAndy Chiu 241bd446f5dSAndy Chiu void __init arch_task_cache_init(void) 242bd446f5dSAndy Chiu { 243bd446f5dSAndy Chiu riscv_v_setup_ctx_cache(); 244bd446f5dSAndy Chiu } 245