1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_POWERPC_INTERRUPT_H 3 #define _ASM_POWERPC_INTERRUPT_H 4 5 /* BookE/4xx */ 6 #define INTERRUPT_CRITICAL_INPUT 0x100 7 8 /* BookE */ 9 #define INTERRUPT_DEBUG 0xd00 10 #ifdef CONFIG_BOOKE 11 #define INTERRUPT_PERFMON 0x260 12 #define INTERRUPT_DOORBELL 0x280 13 #endif 14 15 /* BookS/4xx/8xx */ 16 #define INTERRUPT_MACHINE_CHECK 0x200 17 18 /* BookS/8xx */ 19 #define INTERRUPT_SYSTEM_RESET 0x100 20 21 /* BookS */ 22 #define INTERRUPT_DATA_SEGMENT 0x380 23 #define INTERRUPT_INST_SEGMENT 0x480 24 #define INTERRUPT_TRACE 0xd00 25 #define INTERRUPT_H_DATA_STORAGE 0xe00 26 #define INTERRUPT_HMI 0xe60 27 #define INTERRUPT_H_FAC_UNAVAIL 0xf80 28 #ifdef CONFIG_PPC_BOOK3S 29 #define INTERRUPT_DOORBELL 0xa00 30 #define INTERRUPT_PERFMON 0xf00 31 #define INTERRUPT_ALTIVEC_UNAVAIL 0xf20 32 #endif 33 34 /* BookE/BookS/4xx/8xx */ 35 #define INTERRUPT_DATA_STORAGE 0x300 36 #define INTERRUPT_INST_STORAGE 0x400 37 #define INTERRUPT_EXTERNAL 0x500 38 #define INTERRUPT_ALIGNMENT 0x600 39 #define INTERRUPT_PROGRAM 0x700 40 #define INTERRUPT_SYSCALL 0xc00 41 #define INTERRUPT_TRACE 0xd00 42 43 /* BookE/BookS/44x */ 44 #define INTERRUPT_FP_UNAVAIL 0x800 45 46 /* BookE/BookS/44x/8xx */ 47 #define INTERRUPT_DECREMENTER 0x900 48 49 #ifndef INTERRUPT_PERFMON 50 #define INTERRUPT_PERFMON 0x0 51 #endif 52 53 /* 8xx */ 54 #define INTERRUPT_SOFT_EMU_8xx 0x1000 55 #define INTERRUPT_INST_TLB_MISS_8xx 0x1100 56 #define INTERRUPT_DATA_TLB_MISS_8xx 0x1200 57 #define INTERRUPT_INST_TLB_ERROR_8xx 0x1300 58 #define INTERRUPT_DATA_TLB_ERROR_8xx 0x1400 59 #define INTERRUPT_DATA_BREAKPOINT_8xx 0x1c00 60 #define INTERRUPT_INST_BREAKPOINT_8xx 0x1d00 61 62 /* 603 */ 63 #define INTERRUPT_INST_TLB_MISS_603 0x1000 64 #define INTERRUPT_DATA_LOAD_TLB_MISS_603 0x1100 65 #define INTERRUPT_DATA_STORE_TLB_MISS_603 0x1200 66 67 #ifndef __ASSEMBLY__ 68 69 #include <linux/context_tracking.h> 70 #include <linux/hardirq.h> 71 #include <asm/cputime.h> 72 #include <asm/ftrace.h> 73 #include <asm/kprobes.h> 74 #include <asm/runlatch.h> 75 76 #ifdef CONFIG_PPC_BOOK3S_64 77 extern char __end_soft_masked[]; 78 bool search_kernel_soft_mask_table(unsigned long addr); 79 unsigned long search_kernel_restart_table(unsigned long addr); 80 81 DECLARE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant); 82 83 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 84 { 85 if (regs->msr & MSR_PR) 86 return false; 87 88 if (regs->nip >= (unsigned long)__end_soft_masked) 89 return false; 90 91 return search_kernel_soft_mask_table(regs->nip); 92 } 93 94 static inline void srr_regs_clobbered(void) 95 { 96 local_paca->srr_valid = 0; 97 local_paca->hsrr_valid = 0; 98 } 99 #else 100 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 101 { 102 return false; 103 } 104 105 static inline void srr_regs_clobbered(void) 106 { 107 } 108 #endif 109 110 static inline void nap_adjust_return(struct pt_regs *regs) 111 { 112 #ifdef CONFIG_PPC_970_NAP 113 if (unlikely(test_thread_local_flags(_TLF_NAPPING))) { 114 /* Can avoid a test-and-clear because NMIs do not call this */ 115 clear_thread_local_flags(_TLF_NAPPING); 116 regs_set_return_ip(regs, (unsigned long)power4_idle_nap_return); 117 } 118 #endif 119 } 120 121 struct interrupt_state { 122 }; 123 124 static inline void booke_restore_dbcr0(void) 125 { 126 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 127 unsigned long dbcr0 = current->thread.debug.dbcr0; 128 129 if (IS_ENABLED(CONFIG_PPC32) && unlikely(dbcr0 & DBCR0_IDM)) { 130 mtspr(SPRN_DBSR, -1); 131 mtspr(SPRN_DBCR0, global_dbcr0[smp_processor_id()]); 132 } 133 #endif 134 } 135 136 static inline void interrupt_enter_prepare(struct pt_regs *regs, struct interrupt_state *state) 137 { 138 #ifdef CONFIG_PPC32 139 if (!arch_irq_disabled_regs(regs)) 140 trace_hardirqs_off(); 141 142 if (user_mode(regs)) 143 kuap_lock(); 144 else 145 kuap_save_and_lock(regs); 146 147 if (user_mode(regs)) 148 account_cpu_user_entry(); 149 #endif 150 151 #ifdef CONFIG_PPC64 152 if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED) 153 trace_hardirqs_off(); 154 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 155 156 if (user_mode(regs)) { 157 CT_WARN_ON(ct_state() != CONTEXT_USER); 158 user_exit_irqoff(); 159 160 account_cpu_user_entry(); 161 account_stolen_time(); 162 } else { 163 /* 164 * CT_WARN_ON comes here via program_check_exception, 165 * so avoid recursion. 166 */ 167 if (TRAP(regs) != INTERRUPT_PROGRAM) { 168 CT_WARN_ON(ct_state() != CONTEXT_KERNEL); 169 BUG_ON(is_implicit_soft_masked(regs)); 170 } 171 #ifdef CONFIG_PPC_BOOK3S 172 /* Move this under a debugging check */ 173 if (arch_irq_disabled_regs(regs)) 174 BUG_ON(search_kernel_restart_table(regs->nip)); 175 #endif 176 } 177 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 178 BUG_ON(!arch_irq_disabled_regs(regs) && !(regs->msr & MSR_EE)); 179 #endif 180 181 booke_restore_dbcr0(); 182 } 183 184 /* 185 * Care should be taken to note that interrupt_exit_prepare and 186 * interrupt_async_exit_prepare do not necessarily return immediately to 187 * regs context (e.g., if regs is usermode, we don't necessarily return to 188 * user mode). Other interrupts might be taken between here and return, 189 * context switch / preemption may occur in the exit path after this, or a 190 * signal may be delivered, etc. 191 * 192 * The real interrupt exit code is platform specific, e.g., 193 * interrupt_exit_user_prepare / interrupt_exit_kernel_prepare for 64s. 194 * 195 * However interrupt_nmi_exit_prepare does return directly to regs, because 196 * NMIs do not do "exit work" or replay soft-masked interrupts. 197 */ 198 static inline void interrupt_exit_prepare(struct pt_regs *regs, struct interrupt_state *state) 199 { 200 } 201 202 static inline void interrupt_async_enter_prepare(struct pt_regs *regs, struct interrupt_state *state) 203 { 204 #ifdef CONFIG_PPC_BOOK3S_64 205 if (cpu_has_feature(CPU_FTR_CTRL) && 206 !test_thread_local_flags(_TLF_RUNLATCH)) 207 __ppc64_runlatch_on(); 208 #endif 209 210 interrupt_enter_prepare(regs, state); 211 irq_enter(); 212 } 213 214 static inline void interrupt_async_exit_prepare(struct pt_regs *regs, struct interrupt_state *state) 215 { 216 /* 217 * Adjust at exit so the main handler sees the true NIA. This must 218 * come before irq_exit() because irq_exit can enable interrupts, and 219 * if another interrupt is taken before nap_adjust_return has run 220 * here, then that interrupt would return directly to idle nap return. 221 */ 222 nap_adjust_return(regs); 223 224 irq_exit(); 225 interrupt_exit_prepare(regs, state); 226 } 227 228 struct interrupt_nmi_state { 229 #ifdef CONFIG_PPC64 230 u8 irq_soft_mask; 231 u8 irq_happened; 232 u8 ftrace_enabled; 233 u64 softe; 234 #endif 235 }; 236 237 static inline bool nmi_disables_ftrace(struct pt_regs *regs) 238 { 239 /* Allow DEC and PMI to be traced when they are soft-NMI */ 240 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) { 241 if (TRAP(regs) == INTERRUPT_DECREMENTER) 242 return false; 243 if (TRAP(regs) == INTERRUPT_PERFMON) 244 return false; 245 } 246 if (IS_ENABLED(CONFIG_PPC_BOOK3E)) { 247 if (TRAP(regs) == INTERRUPT_PERFMON) 248 return false; 249 } 250 251 return true; 252 } 253 254 static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 255 { 256 #ifdef CONFIG_PPC64 257 state->irq_soft_mask = local_paca->irq_soft_mask; 258 state->irq_happened = local_paca->irq_happened; 259 state->softe = regs->softe; 260 261 /* 262 * Set IRQS_ALL_DISABLED unconditionally so irqs_disabled() does 263 * the right thing, and set IRQ_HARD_DIS. We do not want to reconcile 264 * because that goes through irq tracing which we don't want in NMI. 265 */ 266 local_paca->irq_soft_mask = IRQS_ALL_DISABLED; 267 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 268 269 if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) { 270 /* 271 * Adjust regs->softe to be soft-masked if it had not been 272 * reconcied (e.g., interrupt entry with MSR[EE]=0 but softe 273 * not yet set disabled), or if it was in an implicit soft 274 * masked state. This makes arch_irq_disabled_regs(regs) 275 * behave as expected. 276 */ 277 regs->softe = IRQS_ALL_DISABLED; 278 } 279 280 /* Don't do any per-CPU operations until interrupt state is fixed */ 281 282 if (nmi_disables_ftrace(regs)) { 283 state->ftrace_enabled = this_cpu_get_ftrace_enabled(); 284 this_cpu_set_ftrace_enabled(0); 285 } 286 #endif 287 288 /* 289 * Do not use nmi_enter() for pseries hash guest taking a real-mode 290 * NMI because not everything it touches is within the RMA limit. 291 */ 292 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || 293 !firmware_has_feature(FW_FEATURE_LPAR) || 294 radix_enabled() || (mfmsr() & MSR_DR)) 295 nmi_enter(); 296 } 297 298 static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 299 { 300 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || 301 !firmware_has_feature(FW_FEATURE_LPAR) || 302 radix_enabled() || (mfmsr() & MSR_DR)) 303 nmi_exit(); 304 305 /* 306 * nmi does not call nap_adjust_return because nmi should not create 307 * new work to do (must use irq_work for that). 308 */ 309 310 #ifdef CONFIG_PPC64 311 #ifdef CONFIG_PPC_BOOK3S 312 if (arch_irq_disabled_regs(regs)) { 313 unsigned long rst = search_kernel_restart_table(regs->nip); 314 if (rst) 315 regs_set_return_ip(regs, rst); 316 } 317 #endif 318 319 if (nmi_disables_ftrace(regs)) 320 this_cpu_set_ftrace_enabled(state->ftrace_enabled); 321 322 /* Check we didn't change the pending interrupt mask. */ 323 WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) != local_paca->irq_happened); 324 regs->softe = state->softe; 325 local_paca->irq_happened = state->irq_happened; 326 local_paca->irq_soft_mask = state->irq_soft_mask; 327 #endif 328 } 329 330 /* 331 * Don't use noinstr here like x86, but rather add NOKPROBE_SYMBOL to each 332 * function definition. The reason for this is the noinstr section is placed 333 * after the main text section, i.e., very far away from the interrupt entry 334 * asm. That creates problems with fitting linker stubs when building large 335 * kernels. 336 */ 337 #define interrupt_handler __visible noinline notrace __no_kcsan __no_sanitize_address 338 339 /** 340 * DECLARE_INTERRUPT_HANDLER_RAW - Declare raw interrupt handler function 341 * @func: Function name of the entry point 342 * @returns: Returns a value back to asm caller 343 */ 344 #define DECLARE_INTERRUPT_HANDLER_RAW(func) \ 345 __visible long func(struct pt_regs *regs) 346 347 /** 348 * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function 349 * @func: Function name of the entry point 350 * @returns: Returns a value back to asm caller 351 * 352 * @func is called from ASM entry code. 353 * 354 * This is a plain function which does no tracing, reconciling, etc. 355 * The macro is written so it acts as function definition. Append the 356 * body with a pair of curly brackets. 357 * 358 * raw interrupt handlers must not enable or disable interrupts, or 359 * schedule, tracing and instrumentation (ftrace, lockdep, etc) would 360 * not be advisable either, although may be possible in a pinch, the 361 * trace will look odd at least. 362 * 363 * A raw handler may call one of the other interrupt handler functions 364 * to be converted into that interrupt context without these restrictions. 365 * 366 * On PPC64, _RAW handlers may return with fast_interrupt_return. 367 * 368 * Specific handlers may have additional restrictions. 369 */ 370 #define DEFINE_INTERRUPT_HANDLER_RAW(func) \ 371 static __always_inline long ____##func(struct pt_regs *regs); \ 372 \ 373 interrupt_handler long func(struct pt_regs *regs) \ 374 { \ 375 long ret; \ 376 \ 377 ret = ____##func (regs); \ 378 \ 379 return ret; \ 380 } \ 381 NOKPROBE_SYMBOL(func); \ 382 \ 383 static __always_inline long ____##func(struct pt_regs *regs) 384 385 /** 386 * DECLARE_INTERRUPT_HANDLER - Declare synchronous interrupt handler function 387 * @func: Function name of the entry point 388 */ 389 #define DECLARE_INTERRUPT_HANDLER(func) \ 390 __visible void func(struct pt_regs *regs) 391 392 /** 393 * DEFINE_INTERRUPT_HANDLER - Define synchronous interrupt handler function 394 * @func: Function name of the entry point 395 * 396 * @func is called from ASM entry code. 397 * 398 * The macro is written so it acts as function definition. Append the 399 * body with a pair of curly brackets. 400 */ 401 #define DEFINE_INTERRUPT_HANDLER(func) \ 402 static __always_inline void ____##func(struct pt_regs *regs); \ 403 \ 404 interrupt_handler void func(struct pt_regs *regs) \ 405 { \ 406 struct interrupt_state state; \ 407 \ 408 interrupt_enter_prepare(regs, &state); \ 409 \ 410 ____##func (regs); \ 411 \ 412 interrupt_exit_prepare(regs, &state); \ 413 } \ 414 NOKPROBE_SYMBOL(func); \ 415 \ 416 static __always_inline void ____##func(struct pt_regs *regs) 417 418 /** 419 * DECLARE_INTERRUPT_HANDLER_RET - Declare synchronous interrupt handler function 420 * @func: Function name of the entry point 421 * @returns: Returns a value back to asm caller 422 */ 423 #define DECLARE_INTERRUPT_HANDLER_RET(func) \ 424 __visible long func(struct pt_regs *regs) 425 426 /** 427 * DEFINE_INTERRUPT_HANDLER_RET - Define synchronous interrupt handler function 428 * @func: Function name of the entry point 429 * @returns: Returns a value back to asm caller 430 * 431 * @func is called from ASM entry code. 432 * 433 * The macro is written so it acts as function definition. Append the 434 * body with a pair of curly brackets. 435 */ 436 #define DEFINE_INTERRUPT_HANDLER_RET(func) \ 437 static __always_inline long ____##func(struct pt_regs *regs); \ 438 \ 439 interrupt_handler long func(struct pt_regs *regs) \ 440 { \ 441 struct interrupt_state state; \ 442 long ret; \ 443 \ 444 interrupt_enter_prepare(regs, &state); \ 445 \ 446 ret = ____##func (regs); \ 447 \ 448 interrupt_exit_prepare(regs, &state); \ 449 \ 450 return ret; \ 451 } \ 452 NOKPROBE_SYMBOL(func); \ 453 \ 454 static __always_inline long ____##func(struct pt_regs *regs) 455 456 /** 457 * DECLARE_INTERRUPT_HANDLER_ASYNC - Declare asynchronous interrupt handler function 458 * @func: Function name of the entry point 459 */ 460 #define DECLARE_INTERRUPT_HANDLER_ASYNC(func) \ 461 __visible void func(struct pt_regs *regs) 462 463 /** 464 * DEFINE_INTERRUPT_HANDLER_ASYNC - Define asynchronous interrupt handler function 465 * @func: Function name of the entry point 466 * 467 * @func is called from ASM entry code. 468 * 469 * The macro is written so it acts as function definition. Append the 470 * body with a pair of curly brackets. 471 */ 472 #define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \ 473 static __always_inline void ____##func(struct pt_regs *regs); \ 474 \ 475 interrupt_handler void func(struct pt_regs *regs) \ 476 { \ 477 struct interrupt_state state; \ 478 \ 479 interrupt_async_enter_prepare(regs, &state); \ 480 \ 481 ____##func (regs); \ 482 \ 483 interrupt_async_exit_prepare(regs, &state); \ 484 } \ 485 NOKPROBE_SYMBOL(func); \ 486 \ 487 static __always_inline void ____##func(struct pt_regs *regs) 488 489 /** 490 * DECLARE_INTERRUPT_HANDLER_NMI - Declare NMI interrupt handler function 491 * @func: Function name of the entry point 492 * @returns: Returns a value back to asm caller 493 */ 494 #define DECLARE_INTERRUPT_HANDLER_NMI(func) \ 495 __visible long func(struct pt_regs *regs) 496 497 /** 498 * DEFINE_INTERRUPT_HANDLER_NMI - Define NMI interrupt handler function 499 * @func: Function name of the entry point 500 * @returns: Returns a value back to asm caller 501 * 502 * @func is called from ASM entry code. 503 * 504 * The macro is written so it acts as function definition. Append the 505 * body with a pair of curly brackets. 506 */ 507 #define DEFINE_INTERRUPT_HANDLER_NMI(func) \ 508 static __always_inline long ____##func(struct pt_regs *regs); \ 509 \ 510 interrupt_handler long func(struct pt_regs *regs) \ 511 { \ 512 struct interrupt_nmi_state state; \ 513 long ret; \ 514 \ 515 interrupt_nmi_enter_prepare(regs, &state); \ 516 \ 517 ret = ____##func (regs); \ 518 \ 519 interrupt_nmi_exit_prepare(regs, &state); \ 520 \ 521 return ret; \ 522 } \ 523 NOKPROBE_SYMBOL(func); \ 524 \ 525 static __always_inline long ____##func(struct pt_regs *regs) 526 527 528 /* Interrupt handlers */ 529 /* kernel/traps.c */ 530 DECLARE_INTERRUPT_HANDLER_NMI(system_reset_exception); 531 #ifdef CONFIG_PPC_BOOK3S_64 532 DECLARE_INTERRUPT_HANDLER_ASYNC(machine_check_exception_async); 533 #endif 534 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_exception); 535 DECLARE_INTERRUPT_HANDLER(SMIException); 536 DECLARE_INTERRUPT_HANDLER(handle_hmi_exception); 537 DECLARE_INTERRUPT_HANDLER(unknown_exception); 538 DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception); 539 DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception); 540 DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception); 541 DECLARE_INTERRUPT_HANDLER(RunModeException); 542 DECLARE_INTERRUPT_HANDLER(single_step_exception); 543 DECLARE_INTERRUPT_HANDLER(program_check_exception); 544 DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt); 545 DECLARE_INTERRUPT_HANDLER(alignment_exception); 546 DECLARE_INTERRUPT_HANDLER(StackOverflow); 547 DECLARE_INTERRUPT_HANDLER(stack_overflow_exception); 548 DECLARE_INTERRUPT_HANDLER(kernel_fp_unavailable_exception); 549 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_exception); 550 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_exception); 551 DECLARE_INTERRUPT_HANDLER(facility_unavailable_exception); 552 DECLARE_INTERRUPT_HANDLER(fp_unavailable_tm); 553 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_tm); 554 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_tm); 555 DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi); 556 DECLARE_INTERRUPT_HANDLER_ASYNC(performance_monitor_exception_async); 557 DECLARE_INTERRUPT_HANDLER_RAW(performance_monitor_exception); 558 DECLARE_INTERRUPT_HANDLER(DebugException); 559 DECLARE_INTERRUPT_HANDLER(altivec_assist_exception); 560 DECLARE_INTERRUPT_HANDLER(CacheLockingException); 561 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException); 562 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException); 563 DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException); 564 DECLARE_INTERRUPT_HANDLER(kernel_bad_stack); 565 566 /* slb.c */ 567 DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault); 568 DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt); 569 570 /* hash_utils.c */ 571 DECLARE_INTERRUPT_HANDLER_RAW(do_hash_fault); 572 573 /* fault.c */ 574 DECLARE_INTERRUPT_HANDLER(do_page_fault); 575 DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv); 576 577 /* process.c */ 578 DECLARE_INTERRUPT_HANDLER(do_break); 579 580 /* time.c */ 581 DECLARE_INTERRUPT_HANDLER_ASYNC(timer_interrupt); 582 583 /* mce.c */ 584 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_early); 585 DECLARE_INTERRUPT_HANDLER_NMI(hmi_exception_realmode); 586 587 DECLARE_INTERRUPT_HANDLER_ASYNC(TAUException); 588 589 /* irq.c */ 590 DECLARE_INTERRUPT_HANDLER_ASYNC(do_IRQ); 591 592 void __noreturn unrecoverable_exception(struct pt_regs *regs); 593 594 void replay_system_reset(void); 595 void replay_soft_interrupts(void); 596 597 static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs) 598 { 599 if (!arch_irq_disabled_regs(regs)) 600 local_irq_enable(); 601 } 602 603 #endif /* __ASSEMBLY__ */ 604 605 #endif /* _ASM_POWERPC_INTERRUPT_H */ 606