1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_POWERPC_INTERRUPT_H 3 #define _ASM_POWERPC_INTERRUPT_H 4 5 /* BookE/4xx */ 6 #define INTERRUPT_CRITICAL_INPUT 0x100 7 8 /* BookE */ 9 #define INTERRUPT_DEBUG 0xd00 10 #ifdef CONFIG_BOOKE 11 #define INTERRUPT_PERFMON 0x260 12 #define INTERRUPT_DOORBELL 0x280 13 #endif 14 15 /* BookS/4xx/8xx */ 16 #define INTERRUPT_MACHINE_CHECK 0x200 17 18 /* BookS/8xx */ 19 #define INTERRUPT_SYSTEM_RESET 0x100 20 21 /* BookS */ 22 #define INTERRUPT_DATA_SEGMENT 0x380 23 #define INTERRUPT_INST_SEGMENT 0x480 24 #define INTERRUPT_TRACE 0xd00 25 #define INTERRUPT_H_DATA_STORAGE 0xe00 26 #define INTERRUPT_HMI 0xe60 27 #define INTERRUPT_H_FAC_UNAVAIL 0xf80 28 #ifdef CONFIG_PPC_BOOK3S 29 #define INTERRUPT_DOORBELL 0xa00 30 #define INTERRUPT_PERFMON 0xf00 31 #define INTERRUPT_ALTIVEC_UNAVAIL 0xf20 32 #endif 33 34 /* BookE/BookS/4xx/8xx */ 35 #define INTERRUPT_DATA_STORAGE 0x300 36 #define INTERRUPT_INST_STORAGE 0x400 37 #define INTERRUPT_EXTERNAL 0x500 38 #define INTERRUPT_ALIGNMENT 0x600 39 #define INTERRUPT_PROGRAM 0x700 40 #define INTERRUPT_SYSCALL 0xc00 41 #define INTERRUPT_TRACE 0xd00 42 43 /* BookE/BookS/44x */ 44 #define INTERRUPT_FP_UNAVAIL 0x800 45 46 /* BookE/BookS/44x/8xx */ 47 #define INTERRUPT_DECREMENTER 0x900 48 49 #ifndef INTERRUPT_PERFMON 50 #define INTERRUPT_PERFMON 0x0 51 #endif 52 53 /* 8xx */ 54 #define INTERRUPT_SOFT_EMU_8xx 0x1000 55 #define INTERRUPT_INST_TLB_MISS_8xx 0x1100 56 #define INTERRUPT_DATA_TLB_MISS_8xx 0x1200 57 #define INTERRUPT_INST_TLB_ERROR_8xx 0x1300 58 #define INTERRUPT_DATA_TLB_ERROR_8xx 0x1400 59 #define INTERRUPT_DATA_BREAKPOINT_8xx 0x1c00 60 #define INTERRUPT_INST_BREAKPOINT_8xx 0x1d00 61 62 /* 603 */ 63 #define INTERRUPT_INST_TLB_MISS_603 0x1000 64 #define INTERRUPT_DATA_LOAD_TLB_MISS_603 0x1100 65 #define INTERRUPT_DATA_STORE_TLB_MISS_603 0x1200 66 67 #ifndef __ASSEMBLY__ 68 69 #include <linux/context_tracking.h> 70 #include <linux/hardirq.h> 71 #include <asm/cputime.h> 72 #include <asm/firmware.h> 73 #include <asm/ftrace.h> 74 #include <asm/kprobes.h> 75 #include <asm/runlatch.h> 76 77 #ifdef CONFIG_PPC_BOOK3S_64 78 extern char __end_soft_masked[]; 79 bool search_kernel_soft_mask_table(unsigned long addr); 80 unsigned long search_kernel_restart_table(unsigned long addr); 81 82 DECLARE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant); 83 84 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 85 { 86 if (regs->msr & MSR_PR) 87 return false; 88 89 if (regs->nip >= (unsigned long)__end_soft_masked) 90 return false; 91 92 return search_kernel_soft_mask_table(regs->nip); 93 } 94 95 static inline void srr_regs_clobbered(void) 96 { 97 local_paca->srr_valid = 0; 98 local_paca->hsrr_valid = 0; 99 } 100 #else 101 static inline unsigned long search_kernel_restart_table(unsigned long addr) 102 { 103 return 0; 104 } 105 106 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 107 { 108 return false; 109 } 110 111 static inline void srr_regs_clobbered(void) 112 { 113 } 114 #endif 115 116 static inline void nap_adjust_return(struct pt_regs *regs) 117 { 118 #ifdef CONFIG_PPC_970_NAP 119 if (unlikely(test_thread_local_flags(_TLF_NAPPING))) { 120 /* Can avoid a test-and-clear because NMIs do not call this */ 121 clear_thread_local_flags(_TLF_NAPPING); 122 regs_set_return_ip(regs, (unsigned long)power4_idle_nap_return); 123 } 124 #endif 125 } 126 127 static inline void booke_restore_dbcr0(void) 128 { 129 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 130 unsigned long dbcr0 = current->thread.debug.dbcr0; 131 132 if (IS_ENABLED(CONFIG_PPC32) && unlikely(dbcr0 & DBCR0_IDM)) { 133 mtspr(SPRN_DBSR, -1); 134 mtspr(SPRN_DBCR0, global_dbcr0[smp_processor_id()]); 135 } 136 #endif 137 } 138 139 static inline void interrupt_enter_prepare(struct pt_regs *regs) 140 { 141 #ifdef CONFIG_PPC32 142 if (!arch_irq_disabled_regs(regs)) 143 trace_hardirqs_off(); 144 145 if (user_mode(regs)) 146 kuap_lock(); 147 else 148 kuap_save_and_lock(regs); 149 150 if (user_mode(regs)) 151 account_cpu_user_entry(); 152 #endif 153 154 #ifdef CONFIG_PPC64 155 bool trace_enable = false; 156 157 if (IS_ENABLED(CONFIG_TRACE_IRQFLAGS)) { 158 if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED) 159 trace_enable = true; 160 } else { 161 irq_soft_mask_set(IRQS_ALL_DISABLED); 162 } 163 164 /* 165 * If the interrupt was taken with HARD_DIS clear, then enable MSR[EE]. 166 * Asynchronous interrupts get here with HARD_DIS set (see below), so 167 * this enables MSR[EE] for synchronous interrupts. IRQs remain 168 * soft-masked. The interrupt handler may later call 169 * interrupt_cond_local_irq_enable() to achieve a regular process 170 * context. 171 */ 172 if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) { 173 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 174 BUG_ON(!(regs->msr & MSR_EE)); 175 __hard_irq_enable(); 176 } else { 177 __hard_RI_enable(); 178 } 179 180 /* Do this when RI=1 because it can cause SLB faults */ 181 if (trace_enable) 182 trace_hardirqs_off(); 183 184 if (user_mode(regs)) { 185 kuap_lock(); 186 CT_WARN_ON(ct_state() != CONTEXT_USER); 187 user_exit_irqoff(); 188 189 account_cpu_user_entry(); 190 account_stolen_time(); 191 } else { 192 kuap_save_and_lock(regs); 193 /* 194 * CT_WARN_ON comes here via program_check_exception, 195 * so avoid recursion. 196 */ 197 if (TRAP(regs) != INTERRUPT_PROGRAM) { 198 CT_WARN_ON(ct_state() != CONTEXT_KERNEL && 199 ct_state() != CONTEXT_IDLE); 200 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 201 BUG_ON(is_implicit_soft_masked(regs)); 202 } 203 204 /* Move this under a debugging check */ 205 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG) && 206 arch_irq_disabled_regs(regs)) 207 BUG_ON(search_kernel_restart_table(regs->nip)); 208 } 209 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 210 BUG_ON(!arch_irq_disabled_regs(regs) && !(regs->msr & MSR_EE)); 211 #endif 212 213 booke_restore_dbcr0(); 214 } 215 216 /* 217 * Care should be taken to note that interrupt_exit_prepare and 218 * interrupt_async_exit_prepare do not necessarily return immediately to 219 * regs context (e.g., if regs is usermode, we don't necessarily return to 220 * user mode). Other interrupts might be taken between here and return, 221 * context switch / preemption may occur in the exit path after this, or a 222 * signal may be delivered, etc. 223 * 224 * The real interrupt exit code is platform specific, e.g., 225 * interrupt_exit_user_prepare / interrupt_exit_kernel_prepare for 64s. 226 * 227 * However interrupt_nmi_exit_prepare does return directly to regs, because 228 * NMIs do not do "exit work" or replay soft-masked interrupts. 229 */ 230 static inline void interrupt_exit_prepare(struct pt_regs *regs) 231 { 232 } 233 234 static inline void interrupt_async_enter_prepare(struct pt_regs *regs) 235 { 236 #ifdef CONFIG_PPC64 237 /* Ensure interrupt_enter_prepare does not enable MSR[EE] */ 238 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 239 #endif 240 interrupt_enter_prepare(regs); 241 #ifdef CONFIG_PPC_BOOK3S_64 242 /* 243 * RI=1 is set by interrupt_enter_prepare, so this thread flags access 244 * has to come afterward (it can cause SLB faults). 245 */ 246 if (cpu_has_feature(CPU_FTR_CTRL) && 247 !test_thread_local_flags(_TLF_RUNLATCH)) 248 __ppc64_runlatch_on(); 249 #endif 250 irq_enter(); 251 } 252 253 static inline void interrupt_async_exit_prepare(struct pt_regs *regs) 254 { 255 /* 256 * Adjust at exit so the main handler sees the true NIA. This must 257 * come before irq_exit() because irq_exit can enable interrupts, and 258 * if another interrupt is taken before nap_adjust_return has run 259 * here, then that interrupt would return directly to idle nap return. 260 */ 261 nap_adjust_return(regs); 262 263 irq_exit(); 264 interrupt_exit_prepare(regs); 265 } 266 267 struct interrupt_nmi_state { 268 #ifdef CONFIG_PPC64 269 u8 irq_soft_mask; 270 u8 irq_happened; 271 u8 ftrace_enabled; 272 u64 softe; 273 #endif 274 }; 275 276 static inline bool nmi_disables_ftrace(struct pt_regs *regs) 277 { 278 /* Allow DEC and PMI to be traced when they are soft-NMI */ 279 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) { 280 if (TRAP(regs) == INTERRUPT_DECREMENTER) 281 return false; 282 if (TRAP(regs) == INTERRUPT_PERFMON) 283 return false; 284 } 285 if (IS_ENABLED(CONFIG_PPC_BOOK3E_64)) { 286 if (TRAP(regs) == INTERRUPT_PERFMON) 287 return false; 288 } 289 290 return true; 291 } 292 293 static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 294 { 295 #ifdef CONFIG_PPC64 296 state->irq_soft_mask = local_paca->irq_soft_mask; 297 state->irq_happened = local_paca->irq_happened; 298 state->softe = regs->softe; 299 300 /* 301 * Set IRQS_ALL_DISABLED unconditionally so irqs_disabled() does 302 * the right thing, and set IRQ_HARD_DIS. We do not want to reconcile 303 * because that goes through irq tracing which we don't want in NMI. 304 */ 305 local_paca->irq_soft_mask = IRQS_ALL_DISABLED; 306 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 307 308 if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) { 309 /* 310 * Adjust regs->softe to be soft-masked if it had not been 311 * reconcied (e.g., interrupt entry with MSR[EE]=0 but softe 312 * not yet set disabled), or if it was in an implicit soft 313 * masked state. This makes arch_irq_disabled_regs(regs) 314 * behave as expected. 315 */ 316 regs->softe = IRQS_ALL_DISABLED; 317 } 318 319 __hard_RI_enable(); 320 321 /* Don't do any per-CPU operations until interrupt state is fixed */ 322 323 if (nmi_disables_ftrace(regs)) { 324 state->ftrace_enabled = this_cpu_get_ftrace_enabled(); 325 this_cpu_set_ftrace_enabled(0); 326 } 327 #endif 328 329 /* If data relocations are enabled, it's safe to use nmi_enter() */ 330 if (mfmsr() & MSR_DR) { 331 nmi_enter(); 332 return; 333 } 334 335 /* 336 * But do not use nmi_enter() for pseries hash guest taking a real-mode 337 * NMI because not everything it touches is within the RMA limit. 338 */ 339 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && 340 firmware_has_feature(FW_FEATURE_LPAR) && 341 !radix_enabled()) 342 return; 343 344 /* 345 * Likewise, don't use it if we have some form of instrumentation (like 346 * KASAN shadow) that is not safe to access in real mode (even on radix) 347 */ 348 if (IS_ENABLED(CONFIG_KASAN)) 349 return; 350 351 /* Otherwise, it should be safe to call it */ 352 nmi_enter(); 353 } 354 355 static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 356 { 357 if (mfmsr() & MSR_DR) { 358 // nmi_exit if relocations are on 359 nmi_exit(); 360 } else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && 361 firmware_has_feature(FW_FEATURE_LPAR) && 362 !radix_enabled()) { 363 // no nmi_exit for a pseries hash guest taking a real mode exception 364 } else if (IS_ENABLED(CONFIG_KASAN)) { 365 // no nmi_exit for KASAN in real mode 366 } else { 367 nmi_exit(); 368 } 369 370 /* 371 * nmi does not call nap_adjust_return because nmi should not create 372 * new work to do (must use irq_work for that). 373 */ 374 375 #ifdef CONFIG_PPC64 376 #ifdef CONFIG_PPC_BOOK3S 377 if (arch_irq_disabled_regs(regs)) { 378 unsigned long rst = search_kernel_restart_table(regs->nip); 379 if (rst) 380 regs_set_return_ip(regs, rst); 381 } 382 #endif 383 384 if (nmi_disables_ftrace(regs)) 385 this_cpu_set_ftrace_enabled(state->ftrace_enabled); 386 387 /* Check we didn't change the pending interrupt mask. */ 388 WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) != local_paca->irq_happened); 389 regs->softe = state->softe; 390 local_paca->irq_happened = state->irq_happened; 391 local_paca->irq_soft_mask = state->irq_soft_mask; 392 #endif 393 } 394 395 /* 396 * Don't use noinstr here like x86, but rather add NOKPROBE_SYMBOL to each 397 * function definition. The reason for this is the noinstr section is placed 398 * after the main text section, i.e., very far away from the interrupt entry 399 * asm. That creates problems with fitting linker stubs when building large 400 * kernels. 401 */ 402 #define interrupt_handler __visible noinline notrace __no_kcsan __no_sanitize_address 403 404 /** 405 * DECLARE_INTERRUPT_HANDLER_RAW - Declare raw interrupt handler function 406 * @func: Function name of the entry point 407 * @returns: Returns a value back to asm caller 408 */ 409 #define DECLARE_INTERRUPT_HANDLER_RAW(func) \ 410 __visible long func(struct pt_regs *regs) 411 412 /** 413 * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function 414 * @func: Function name of the entry point 415 * @returns: Returns a value back to asm caller 416 * 417 * @func is called from ASM entry code. 418 * 419 * This is a plain function which does no tracing, reconciling, etc. 420 * The macro is written so it acts as function definition. Append the 421 * body with a pair of curly brackets. 422 * 423 * raw interrupt handlers must not enable or disable interrupts, or 424 * schedule, tracing and instrumentation (ftrace, lockdep, etc) would 425 * not be advisable either, although may be possible in a pinch, the 426 * trace will look odd at least. 427 * 428 * A raw handler may call one of the other interrupt handler functions 429 * to be converted into that interrupt context without these restrictions. 430 * 431 * On PPC64, _RAW handlers may return with fast_interrupt_return. 432 * 433 * Specific handlers may have additional restrictions. 434 */ 435 #define DEFINE_INTERRUPT_HANDLER_RAW(func) \ 436 static __always_inline __no_sanitize_address __no_kcsan long \ 437 ____##func(struct pt_regs *regs); \ 438 \ 439 interrupt_handler long func(struct pt_regs *regs) \ 440 { \ 441 long ret; \ 442 \ 443 __hard_RI_enable(); \ 444 \ 445 ret = ____##func (regs); \ 446 \ 447 return ret; \ 448 } \ 449 NOKPROBE_SYMBOL(func); \ 450 \ 451 static __always_inline __no_sanitize_address __no_kcsan long \ 452 ____##func(struct pt_regs *regs) 453 454 /** 455 * DECLARE_INTERRUPT_HANDLER - Declare synchronous interrupt handler function 456 * @func: Function name of the entry point 457 */ 458 #define DECLARE_INTERRUPT_HANDLER(func) \ 459 __visible void func(struct pt_regs *regs) 460 461 /** 462 * DEFINE_INTERRUPT_HANDLER - Define synchronous interrupt handler function 463 * @func: Function name of the entry point 464 * 465 * @func is called from ASM entry code. 466 * 467 * The macro is written so it acts as function definition. Append the 468 * body with a pair of curly brackets. 469 */ 470 #define DEFINE_INTERRUPT_HANDLER(func) \ 471 static __always_inline void ____##func(struct pt_regs *regs); \ 472 \ 473 interrupt_handler void func(struct pt_regs *regs) \ 474 { \ 475 interrupt_enter_prepare(regs); \ 476 \ 477 ____##func (regs); \ 478 \ 479 interrupt_exit_prepare(regs); \ 480 } \ 481 NOKPROBE_SYMBOL(func); \ 482 \ 483 static __always_inline void ____##func(struct pt_regs *regs) 484 485 /** 486 * DECLARE_INTERRUPT_HANDLER_RET - Declare synchronous interrupt handler function 487 * @func: Function name of the entry point 488 * @returns: Returns a value back to asm caller 489 */ 490 #define DECLARE_INTERRUPT_HANDLER_RET(func) \ 491 __visible long func(struct pt_regs *regs) 492 493 /** 494 * DEFINE_INTERRUPT_HANDLER_RET - Define synchronous interrupt handler function 495 * @func: Function name of the entry point 496 * @returns: Returns a value back to asm caller 497 * 498 * @func is called from ASM entry code. 499 * 500 * The macro is written so it acts as function definition. Append the 501 * body with a pair of curly brackets. 502 */ 503 #define DEFINE_INTERRUPT_HANDLER_RET(func) \ 504 static __always_inline long ____##func(struct pt_regs *regs); \ 505 \ 506 interrupt_handler long func(struct pt_regs *regs) \ 507 { \ 508 long ret; \ 509 \ 510 interrupt_enter_prepare(regs); \ 511 \ 512 ret = ____##func (regs); \ 513 \ 514 interrupt_exit_prepare(regs); \ 515 \ 516 return ret; \ 517 } \ 518 NOKPROBE_SYMBOL(func); \ 519 \ 520 static __always_inline long ____##func(struct pt_regs *regs) 521 522 /** 523 * DECLARE_INTERRUPT_HANDLER_ASYNC - Declare asynchronous interrupt handler function 524 * @func: Function name of the entry point 525 */ 526 #define DECLARE_INTERRUPT_HANDLER_ASYNC(func) \ 527 __visible void func(struct pt_regs *regs) 528 529 /** 530 * DEFINE_INTERRUPT_HANDLER_ASYNC - Define asynchronous interrupt handler function 531 * @func: Function name of the entry point 532 * 533 * @func is called from ASM entry code. 534 * 535 * The macro is written so it acts as function definition. Append the 536 * body with a pair of curly brackets. 537 */ 538 #define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \ 539 static __always_inline void ____##func(struct pt_regs *regs); \ 540 \ 541 interrupt_handler void func(struct pt_regs *regs) \ 542 { \ 543 interrupt_async_enter_prepare(regs); \ 544 \ 545 ____##func (regs); \ 546 \ 547 interrupt_async_exit_prepare(regs); \ 548 } \ 549 NOKPROBE_SYMBOL(func); \ 550 \ 551 static __always_inline void ____##func(struct pt_regs *regs) 552 553 /** 554 * DECLARE_INTERRUPT_HANDLER_NMI - Declare NMI interrupt handler function 555 * @func: Function name of the entry point 556 * @returns: Returns a value back to asm caller 557 */ 558 #define DECLARE_INTERRUPT_HANDLER_NMI(func) \ 559 __visible long func(struct pt_regs *regs) 560 561 /** 562 * DEFINE_INTERRUPT_HANDLER_NMI - Define NMI interrupt handler function 563 * @func: Function name of the entry point 564 * @returns: Returns a value back to asm caller 565 * 566 * @func is called from ASM entry code. 567 * 568 * The macro is written so it acts as function definition. Append the 569 * body with a pair of curly brackets. 570 */ 571 #define DEFINE_INTERRUPT_HANDLER_NMI(func) \ 572 static __always_inline __no_sanitize_address __no_kcsan long \ 573 ____##func(struct pt_regs *regs); \ 574 \ 575 interrupt_handler long func(struct pt_regs *regs) \ 576 { \ 577 struct interrupt_nmi_state state; \ 578 long ret; \ 579 \ 580 interrupt_nmi_enter_prepare(regs, &state); \ 581 \ 582 ret = ____##func (regs); \ 583 \ 584 interrupt_nmi_exit_prepare(regs, &state); \ 585 \ 586 return ret; \ 587 } \ 588 NOKPROBE_SYMBOL(func); \ 589 \ 590 static __always_inline __no_sanitize_address __no_kcsan long \ 591 ____##func(struct pt_regs *regs) 592 593 594 /* Interrupt handlers */ 595 /* kernel/traps.c */ 596 DECLARE_INTERRUPT_HANDLER_NMI(system_reset_exception); 597 #ifdef CONFIG_PPC_BOOK3S_64 598 DECLARE_INTERRUPT_HANDLER_ASYNC(machine_check_exception_async); 599 #endif 600 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_exception); 601 DECLARE_INTERRUPT_HANDLER(SMIException); 602 DECLARE_INTERRUPT_HANDLER(handle_hmi_exception); 603 DECLARE_INTERRUPT_HANDLER(unknown_exception); 604 DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception); 605 DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception); 606 DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception); 607 DECLARE_INTERRUPT_HANDLER(RunModeException); 608 DECLARE_INTERRUPT_HANDLER(single_step_exception); 609 DECLARE_INTERRUPT_HANDLER(program_check_exception); 610 DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt); 611 DECLARE_INTERRUPT_HANDLER(alignment_exception); 612 DECLARE_INTERRUPT_HANDLER(StackOverflow); 613 DECLARE_INTERRUPT_HANDLER(stack_overflow_exception); 614 DECLARE_INTERRUPT_HANDLER(kernel_fp_unavailable_exception); 615 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_exception); 616 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_exception); 617 DECLARE_INTERRUPT_HANDLER(facility_unavailable_exception); 618 DECLARE_INTERRUPT_HANDLER(fp_unavailable_tm); 619 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_tm); 620 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_tm); 621 DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi); 622 DECLARE_INTERRUPT_HANDLER_ASYNC(performance_monitor_exception_async); 623 DECLARE_INTERRUPT_HANDLER_RAW(performance_monitor_exception); 624 DECLARE_INTERRUPT_HANDLER(DebugException); 625 DECLARE_INTERRUPT_HANDLER(altivec_assist_exception); 626 DECLARE_INTERRUPT_HANDLER(CacheLockingException); 627 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException); 628 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException); 629 DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException); 630 DECLARE_INTERRUPT_HANDLER(kernel_bad_stack); 631 632 /* slb.c */ 633 DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault); 634 DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt); 635 636 /* hash_utils.c */ 637 DECLARE_INTERRUPT_HANDLER(do_hash_fault); 638 639 /* fault.c */ 640 DECLARE_INTERRUPT_HANDLER(do_page_fault); 641 DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv); 642 643 /* process.c */ 644 DECLARE_INTERRUPT_HANDLER(do_break); 645 646 /* time.c */ 647 DECLARE_INTERRUPT_HANDLER_ASYNC(timer_interrupt); 648 649 /* mce.c */ 650 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_early); 651 DECLARE_INTERRUPT_HANDLER_NMI(hmi_exception_realmode); 652 653 DECLARE_INTERRUPT_HANDLER_ASYNC(TAUException); 654 655 /* irq.c */ 656 DECLARE_INTERRUPT_HANDLER_ASYNC(do_IRQ); 657 658 void __noreturn unrecoverable_exception(struct pt_regs *regs); 659 660 void replay_system_reset(void); 661 void replay_soft_interrupts(void); 662 663 static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs) 664 { 665 if (!arch_irq_disabled_regs(regs)) 666 local_irq_enable(); 667 } 668 669 long system_call_exception(struct pt_regs *regs, unsigned long r0); 670 notrace unsigned long syscall_exit_prepare(unsigned long r3, struct pt_regs *regs, long scv); 671 notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs); 672 notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs); 673 #ifdef CONFIG_PPC64 674 unsigned long syscall_exit_restart(unsigned long r3, struct pt_regs *regs); 675 unsigned long interrupt_exit_user_restart(struct pt_regs *regs); 676 unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs); 677 #endif 678 679 #endif /* __ASSEMBLY__ */ 680 681 #endif /* _ASM_POWERPC_INTERRUPT_H */ 682