1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_POWERPC_INTERRUPT_H 3 #define _ASM_POWERPC_INTERRUPT_H 4 5 /* BookE/4xx */ 6 #define INTERRUPT_CRITICAL_INPUT 0x100 7 8 /* BookE */ 9 #define INTERRUPT_DEBUG 0xd00 10 #ifdef CONFIG_BOOKE 11 #define INTERRUPT_PERFMON 0x260 12 #define INTERRUPT_DOORBELL 0x280 13 #endif 14 15 /* BookS/4xx/8xx */ 16 #define INTERRUPT_MACHINE_CHECK 0x200 17 18 /* BookS/8xx */ 19 #define INTERRUPT_SYSTEM_RESET 0x100 20 21 /* BookS */ 22 #define INTERRUPT_DATA_SEGMENT 0x380 23 #define INTERRUPT_INST_SEGMENT 0x480 24 #define INTERRUPT_TRACE 0xd00 25 #define INTERRUPT_H_DATA_STORAGE 0xe00 26 #define INTERRUPT_HMI 0xe60 27 #define INTERRUPT_H_FAC_UNAVAIL 0xf80 28 #ifdef CONFIG_PPC_BOOK3S 29 #define INTERRUPT_DOORBELL 0xa00 30 #define INTERRUPT_PERFMON 0xf00 31 #define INTERRUPT_ALTIVEC_UNAVAIL 0xf20 32 #endif 33 34 /* BookE/BookS/4xx/8xx */ 35 #define INTERRUPT_DATA_STORAGE 0x300 36 #define INTERRUPT_INST_STORAGE 0x400 37 #define INTERRUPT_EXTERNAL 0x500 38 #define INTERRUPT_ALIGNMENT 0x600 39 #define INTERRUPT_PROGRAM 0x700 40 #define INTERRUPT_SYSCALL 0xc00 41 #define INTERRUPT_TRACE 0xd00 42 43 /* BookE/BookS/44x */ 44 #define INTERRUPT_FP_UNAVAIL 0x800 45 46 /* BookE/BookS/44x/8xx */ 47 #define INTERRUPT_DECREMENTER 0x900 48 49 #ifndef INTERRUPT_PERFMON 50 #define INTERRUPT_PERFMON 0x0 51 #endif 52 53 /* 8xx */ 54 #define INTERRUPT_SOFT_EMU_8xx 0x1000 55 #define INTERRUPT_INST_TLB_MISS_8xx 0x1100 56 #define INTERRUPT_DATA_TLB_MISS_8xx 0x1200 57 #define INTERRUPT_INST_TLB_ERROR_8xx 0x1300 58 #define INTERRUPT_DATA_TLB_ERROR_8xx 0x1400 59 #define INTERRUPT_DATA_BREAKPOINT_8xx 0x1c00 60 #define INTERRUPT_INST_BREAKPOINT_8xx 0x1d00 61 62 /* 603 */ 63 #define INTERRUPT_INST_TLB_MISS_603 0x1000 64 #define INTERRUPT_DATA_LOAD_TLB_MISS_603 0x1100 65 #define INTERRUPT_DATA_STORE_TLB_MISS_603 0x1200 66 67 #ifndef __ASSEMBLY__ 68 69 #include <linux/context_tracking.h> 70 #include <linux/hardirq.h> 71 #include <asm/cputime.h> 72 #include <asm/ftrace.h> 73 #include <asm/kprobes.h> 74 #include <asm/runlatch.h> 75 76 #ifdef CONFIG_PPC_BOOK3S_64 77 extern char __end_soft_masked[]; 78 bool search_kernel_soft_mask_table(unsigned long addr); 79 unsigned long search_kernel_restart_table(unsigned long addr); 80 81 DECLARE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant); 82 83 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 84 { 85 if (regs->msr & MSR_PR) 86 return false; 87 88 if (regs->nip >= (unsigned long)__end_soft_masked) 89 return false; 90 91 return search_kernel_soft_mask_table(regs->nip); 92 } 93 94 static inline void srr_regs_clobbered(void) 95 { 96 local_paca->srr_valid = 0; 97 local_paca->hsrr_valid = 0; 98 } 99 #else 100 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 101 { 102 return false; 103 } 104 105 static inline void srr_regs_clobbered(void) 106 { 107 } 108 #endif 109 110 static inline void nap_adjust_return(struct pt_regs *regs) 111 { 112 #ifdef CONFIG_PPC_970_NAP 113 if (unlikely(test_thread_local_flags(_TLF_NAPPING))) { 114 /* Can avoid a test-and-clear because NMIs do not call this */ 115 clear_thread_local_flags(_TLF_NAPPING); 116 regs_set_return_ip(regs, (unsigned long)power4_idle_nap_return); 117 } 118 #endif 119 } 120 121 struct interrupt_state { 122 }; 123 124 static inline void booke_restore_dbcr0(void) 125 { 126 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 127 unsigned long dbcr0 = current->thread.debug.dbcr0; 128 129 if (IS_ENABLED(CONFIG_PPC32) && unlikely(dbcr0 & DBCR0_IDM)) { 130 mtspr(SPRN_DBSR, -1); 131 mtspr(SPRN_DBCR0, global_dbcr0[smp_processor_id()]); 132 } 133 #endif 134 } 135 136 static inline void interrupt_enter_prepare(struct pt_regs *regs, struct interrupt_state *state) 137 { 138 #ifdef CONFIG_PPC32 139 if (!arch_irq_disabled_regs(regs)) 140 trace_hardirqs_off(); 141 142 if (user_mode(regs)) 143 kuap_lock(); 144 else 145 kuap_save_and_lock(regs); 146 147 if (user_mode(regs)) 148 account_cpu_user_entry(); 149 #endif 150 151 #ifdef CONFIG_PPC64 152 if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED) 153 trace_hardirqs_off(); 154 155 /* 156 * If the interrupt was taken with HARD_DIS clear, then enable MSR[EE]. 157 * Asynchronous interrupts get here with HARD_DIS set (see below), so 158 * this enables MSR[EE] for synchronous interrupts. IRQs remain 159 * soft-masked. The interrupt handler may later call 160 * interrupt_cond_local_irq_enable() to achieve a regular process 161 * context. 162 */ 163 if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) { 164 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 165 BUG_ON(!(regs->msr & MSR_EE)); 166 __hard_irq_enable(); 167 } 168 169 if (user_mode(regs)) { 170 kuap_lock(); 171 CT_WARN_ON(ct_state() != CONTEXT_USER); 172 user_exit_irqoff(); 173 174 account_cpu_user_entry(); 175 account_stolen_time(); 176 } else { 177 kuap_save_and_lock(regs); 178 /* 179 * CT_WARN_ON comes here via program_check_exception, 180 * so avoid recursion. 181 */ 182 if (TRAP(regs) != INTERRUPT_PROGRAM) { 183 CT_WARN_ON(ct_state() != CONTEXT_KERNEL); 184 BUG_ON(is_implicit_soft_masked(regs)); 185 } 186 #ifdef CONFIG_PPC_BOOK3S 187 /* Move this under a debugging check */ 188 if (arch_irq_disabled_regs(regs)) 189 BUG_ON(search_kernel_restart_table(regs->nip)); 190 #endif 191 } 192 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 193 BUG_ON(!arch_irq_disabled_regs(regs) && !(regs->msr & MSR_EE)); 194 #endif 195 196 booke_restore_dbcr0(); 197 } 198 199 /* 200 * Care should be taken to note that interrupt_exit_prepare and 201 * interrupt_async_exit_prepare do not necessarily return immediately to 202 * regs context (e.g., if regs is usermode, we don't necessarily return to 203 * user mode). Other interrupts might be taken between here and return, 204 * context switch / preemption may occur in the exit path after this, or a 205 * signal may be delivered, etc. 206 * 207 * The real interrupt exit code is platform specific, e.g., 208 * interrupt_exit_user_prepare / interrupt_exit_kernel_prepare for 64s. 209 * 210 * However interrupt_nmi_exit_prepare does return directly to regs, because 211 * NMIs do not do "exit work" or replay soft-masked interrupts. 212 */ 213 static inline void interrupt_exit_prepare(struct pt_regs *regs, struct interrupt_state *state) 214 { 215 } 216 217 static inline void interrupt_async_enter_prepare(struct pt_regs *regs, struct interrupt_state *state) 218 { 219 #ifdef CONFIG_PPC64 220 /* Ensure interrupt_enter_prepare does not enable MSR[EE] */ 221 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 222 #endif 223 #ifdef CONFIG_PPC_BOOK3S_64 224 if (cpu_has_feature(CPU_FTR_CTRL) && 225 !test_thread_local_flags(_TLF_RUNLATCH)) 226 __ppc64_runlatch_on(); 227 #endif 228 229 interrupt_enter_prepare(regs, state); 230 irq_enter(); 231 } 232 233 static inline void interrupt_async_exit_prepare(struct pt_regs *regs, struct interrupt_state *state) 234 { 235 /* 236 * Adjust at exit so the main handler sees the true NIA. This must 237 * come before irq_exit() because irq_exit can enable interrupts, and 238 * if another interrupt is taken before nap_adjust_return has run 239 * here, then that interrupt would return directly to idle nap return. 240 */ 241 nap_adjust_return(regs); 242 243 irq_exit(); 244 interrupt_exit_prepare(regs, state); 245 } 246 247 struct interrupt_nmi_state { 248 #ifdef CONFIG_PPC64 249 u8 irq_soft_mask; 250 u8 irq_happened; 251 u8 ftrace_enabled; 252 u64 softe; 253 #endif 254 }; 255 256 static inline bool nmi_disables_ftrace(struct pt_regs *regs) 257 { 258 /* Allow DEC and PMI to be traced when they are soft-NMI */ 259 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) { 260 if (TRAP(regs) == INTERRUPT_DECREMENTER) 261 return false; 262 if (TRAP(regs) == INTERRUPT_PERFMON) 263 return false; 264 } 265 if (IS_ENABLED(CONFIG_PPC_BOOK3E)) { 266 if (TRAP(regs) == INTERRUPT_PERFMON) 267 return false; 268 } 269 270 return true; 271 } 272 273 static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 274 { 275 #ifdef CONFIG_PPC64 276 state->irq_soft_mask = local_paca->irq_soft_mask; 277 state->irq_happened = local_paca->irq_happened; 278 state->softe = regs->softe; 279 280 /* 281 * Set IRQS_ALL_DISABLED unconditionally so irqs_disabled() does 282 * the right thing, and set IRQ_HARD_DIS. We do not want to reconcile 283 * because that goes through irq tracing which we don't want in NMI. 284 */ 285 local_paca->irq_soft_mask = IRQS_ALL_DISABLED; 286 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 287 288 if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) { 289 /* 290 * Adjust regs->softe to be soft-masked if it had not been 291 * reconcied (e.g., interrupt entry with MSR[EE]=0 but softe 292 * not yet set disabled), or if it was in an implicit soft 293 * masked state. This makes arch_irq_disabled_regs(regs) 294 * behave as expected. 295 */ 296 regs->softe = IRQS_ALL_DISABLED; 297 } 298 299 /* Don't do any per-CPU operations until interrupt state is fixed */ 300 301 if (nmi_disables_ftrace(regs)) { 302 state->ftrace_enabled = this_cpu_get_ftrace_enabled(); 303 this_cpu_set_ftrace_enabled(0); 304 } 305 #endif 306 307 /* 308 * Do not use nmi_enter() for pseries hash guest taking a real-mode 309 * NMI because not everything it touches is within the RMA limit. 310 */ 311 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || 312 !firmware_has_feature(FW_FEATURE_LPAR) || 313 radix_enabled() || (mfmsr() & MSR_DR)) 314 nmi_enter(); 315 } 316 317 static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 318 { 319 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || 320 !firmware_has_feature(FW_FEATURE_LPAR) || 321 radix_enabled() || (mfmsr() & MSR_DR)) 322 nmi_exit(); 323 324 /* 325 * nmi does not call nap_adjust_return because nmi should not create 326 * new work to do (must use irq_work for that). 327 */ 328 329 #ifdef CONFIG_PPC64 330 #ifdef CONFIG_PPC_BOOK3S 331 if (arch_irq_disabled_regs(regs)) { 332 unsigned long rst = search_kernel_restart_table(regs->nip); 333 if (rst) 334 regs_set_return_ip(regs, rst); 335 } 336 #endif 337 338 if (nmi_disables_ftrace(regs)) 339 this_cpu_set_ftrace_enabled(state->ftrace_enabled); 340 341 /* Check we didn't change the pending interrupt mask. */ 342 WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) != local_paca->irq_happened); 343 regs->softe = state->softe; 344 local_paca->irq_happened = state->irq_happened; 345 local_paca->irq_soft_mask = state->irq_soft_mask; 346 #endif 347 } 348 349 /* 350 * Don't use noinstr here like x86, but rather add NOKPROBE_SYMBOL to each 351 * function definition. The reason for this is the noinstr section is placed 352 * after the main text section, i.e., very far away from the interrupt entry 353 * asm. That creates problems with fitting linker stubs when building large 354 * kernels. 355 */ 356 #define interrupt_handler __visible noinline notrace __no_kcsan __no_sanitize_address 357 358 /** 359 * DECLARE_INTERRUPT_HANDLER_RAW - Declare raw interrupt handler function 360 * @func: Function name of the entry point 361 * @returns: Returns a value back to asm caller 362 */ 363 #define DECLARE_INTERRUPT_HANDLER_RAW(func) \ 364 __visible long func(struct pt_regs *regs) 365 366 /** 367 * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function 368 * @func: Function name of the entry point 369 * @returns: Returns a value back to asm caller 370 * 371 * @func is called from ASM entry code. 372 * 373 * This is a plain function which does no tracing, reconciling, etc. 374 * The macro is written so it acts as function definition. Append the 375 * body with a pair of curly brackets. 376 * 377 * raw interrupt handlers must not enable or disable interrupts, or 378 * schedule, tracing and instrumentation (ftrace, lockdep, etc) would 379 * not be advisable either, although may be possible in a pinch, the 380 * trace will look odd at least. 381 * 382 * A raw handler may call one of the other interrupt handler functions 383 * to be converted into that interrupt context without these restrictions. 384 * 385 * On PPC64, _RAW handlers may return with fast_interrupt_return. 386 * 387 * Specific handlers may have additional restrictions. 388 */ 389 #define DEFINE_INTERRUPT_HANDLER_RAW(func) \ 390 static __always_inline long ____##func(struct pt_regs *regs); \ 391 \ 392 interrupt_handler long func(struct pt_regs *regs) \ 393 { \ 394 long ret; \ 395 \ 396 ret = ____##func (regs); \ 397 \ 398 return ret; \ 399 } \ 400 NOKPROBE_SYMBOL(func); \ 401 \ 402 static __always_inline long ____##func(struct pt_regs *regs) 403 404 /** 405 * DECLARE_INTERRUPT_HANDLER - Declare synchronous interrupt handler function 406 * @func: Function name of the entry point 407 */ 408 #define DECLARE_INTERRUPT_HANDLER(func) \ 409 __visible void func(struct pt_regs *regs) 410 411 /** 412 * DEFINE_INTERRUPT_HANDLER - Define synchronous interrupt handler function 413 * @func: Function name of the entry point 414 * 415 * @func is called from ASM entry code. 416 * 417 * The macro is written so it acts as function definition. Append the 418 * body with a pair of curly brackets. 419 */ 420 #define DEFINE_INTERRUPT_HANDLER(func) \ 421 static __always_inline void ____##func(struct pt_regs *regs); \ 422 \ 423 interrupt_handler void func(struct pt_regs *regs) \ 424 { \ 425 struct interrupt_state state; \ 426 \ 427 interrupt_enter_prepare(regs, &state); \ 428 \ 429 ____##func (regs); \ 430 \ 431 interrupt_exit_prepare(regs, &state); \ 432 } \ 433 NOKPROBE_SYMBOL(func); \ 434 \ 435 static __always_inline void ____##func(struct pt_regs *regs) 436 437 /** 438 * DECLARE_INTERRUPT_HANDLER_RET - Declare synchronous interrupt handler function 439 * @func: Function name of the entry point 440 * @returns: Returns a value back to asm caller 441 */ 442 #define DECLARE_INTERRUPT_HANDLER_RET(func) \ 443 __visible long func(struct pt_regs *regs) 444 445 /** 446 * DEFINE_INTERRUPT_HANDLER_RET - Define synchronous interrupt handler function 447 * @func: Function name of the entry point 448 * @returns: Returns a value back to asm caller 449 * 450 * @func is called from ASM entry code. 451 * 452 * The macro is written so it acts as function definition. Append the 453 * body with a pair of curly brackets. 454 */ 455 #define DEFINE_INTERRUPT_HANDLER_RET(func) \ 456 static __always_inline long ____##func(struct pt_regs *regs); \ 457 \ 458 interrupt_handler long func(struct pt_regs *regs) \ 459 { \ 460 struct interrupt_state state; \ 461 long ret; \ 462 \ 463 interrupt_enter_prepare(regs, &state); \ 464 \ 465 ret = ____##func (regs); \ 466 \ 467 interrupt_exit_prepare(regs, &state); \ 468 \ 469 return ret; \ 470 } \ 471 NOKPROBE_SYMBOL(func); \ 472 \ 473 static __always_inline long ____##func(struct pt_regs *regs) 474 475 /** 476 * DECLARE_INTERRUPT_HANDLER_ASYNC - Declare asynchronous interrupt handler function 477 * @func: Function name of the entry point 478 */ 479 #define DECLARE_INTERRUPT_HANDLER_ASYNC(func) \ 480 __visible void func(struct pt_regs *regs) 481 482 /** 483 * DEFINE_INTERRUPT_HANDLER_ASYNC - Define asynchronous interrupt handler function 484 * @func: Function name of the entry point 485 * 486 * @func is called from ASM entry code. 487 * 488 * The macro is written so it acts as function definition. Append the 489 * body with a pair of curly brackets. 490 */ 491 #define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \ 492 static __always_inline void ____##func(struct pt_regs *regs); \ 493 \ 494 interrupt_handler void func(struct pt_regs *regs) \ 495 { \ 496 struct interrupt_state state; \ 497 \ 498 interrupt_async_enter_prepare(regs, &state); \ 499 \ 500 ____##func (regs); \ 501 \ 502 interrupt_async_exit_prepare(regs, &state); \ 503 } \ 504 NOKPROBE_SYMBOL(func); \ 505 \ 506 static __always_inline void ____##func(struct pt_regs *regs) 507 508 /** 509 * DECLARE_INTERRUPT_HANDLER_NMI - Declare NMI interrupt handler function 510 * @func: Function name of the entry point 511 * @returns: Returns a value back to asm caller 512 */ 513 #define DECLARE_INTERRUPT_HANDLER_NMI(func) \ 514 __visible long func(struct pt_regs *regs) 515 516 /** 517 * DEFINE_INTERRUPT_HANDLER_NMI - Define NMI interrupt handler function 518 * @func: Function name of the entry point 519 * @returns: Returns a value back to asm caller 520 * 521 * @func is called from ASM entry code. 522 * 523 * The macro is written so it acts as function definition. Append the 524 * body with a pair of curly brackets. 525 */ 526 #define DEFINE_INTERRUPT_HANDLER_NMI(func) \ 527 static __always_inline long ____##func(struct pt_regs *regs); \ 528 \ 529 interrupt_handler long func(struct pt_regs *regs) \ 530 { \ 531 struct interrupt_nmi_state state; \ 532 long ret; \ 533 \ 534 interrupt_nmi_enter_prepare(regs, &state); \ 535 \ 536 ret = ____##func (regs); \ 537 \ 538 interrupt_nmi_exit_prepare(regs, &state); \ 539 \ 540 return ret; \ 541 } \ 542 NOKPROBE_SYMBOL(func); \ 543 \ 544 static __always_inline long ____##func(struct pt_regs *regs) 545 546 547 /* Interrupt handlers */ 548 /* kernel/traps.c */ 549 DECLARE_INTERRUPT_HANDLER_NMI(system_reset_exception); 550 #ifdef CONFIG_PPC_BOOK3S_64 551 DECLARE_INTERRUPT_HANDLER_ASYNC(machine_check_exception_async); 552 #endif 553 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_exception); 554 DECLARE_INTERRUPT_HANDLER(SMIException); 555 DECLARE_INTERRUPT_HANDLER(handle_hmi_exception); 556 DECLARE_INTERRUPT_HANDLER(unknown_exception); 557 DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception); 558 DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception); 559 DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception); 560 DECLARE_INTERRUPT_HANDLER(RunModeException); 561 DECLARE_INTERRUPT_HANDLER(single_step_exception); 562 DECLARE_INTERRUPT_HANDLER(program_check_exception); 563 DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt); 564 DECLARE_INTERRUPT_HANDLER(alignment_exception); 565 DECLARE_INTERRUPT_HANDLER(StackOverflow); 566 DECLARE_INTERRUPT_HANDLER(stack_overflow_exception); 567 DECLARE_INTERRUPT_HANDLER(kernel_fp_unavailable_exception); 568 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_exception); 569 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_exception); 570 DECLARE_INTERRUPT_HANDLER(facility_unavailable_exception); 571 DECLARE_INTERRUPT_HANDLER(fp_unavailable_tm); 572 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_tm); 573 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_tm); 574 DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi); 575 DECLARE_INTERRUPT_HANDLER_ASYNC(performance_monitor_exception_async); 576 DECLARE_INTERRUPT_HANDLER_RAW(performance_monitor_exception); 577 DECLARE_INTERRUPT_HANDLER(DebugException); 578 DECLARE_INTERRUPT_HANDLER(altivec_assist_exception); 579 DECLARE_INTERRUPT_HANDLER(CacheLockingException); 580 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException); 581 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException); 582 DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException); 583 DECLARE_INTERRUPT_HANDLER(kernel_bad_stack); 584 585 /* slb.c */ 586 DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault); 587 DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt); 588 589 /* hash_utils.c */ 590 DECLARE_INTERRUPT_HANDLER_RAW(do_hash_fault); 591 592 /* fault.c */ 593 DECLARE_INTERRUPT_HANDLER(do_page_fault); 594 DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv); 595 596 /* process.c */ 597 DECLARE_INTERRUPT_HANDLER(do_break); 598 599 /* time.c */ 600 DECLARE_INTERRUPT_HANDLER_ASYNC(timer_interrupt); 601 602 /* mce.c */ 603 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_early); 604 DECLARE_INTERRUPT_HANDLER_NMI(hmi_exception_realmode); 605 606 DECLARE_INTERRUPT_HANDLER_ASYNC(TAUException); 607 608 /* irq.c */ 609 DECLARE_INTERRUPT_HANDLER_ASYNC(do_IRQ); 610 611 void __noreturn unrecoverable_exception(struct pt_regs *regs); 612 613 void replay_system_reset(void); 614 void replay_soft_interrupts(void); 615 616 static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs) 617 { 618 if (!arch_irq_disabled_regs(regs)) 619 local_irq_enable(); 620 } 621 622 #endif /* __ASSEMBLY__ */ 623 624 #endif /* _ASM_POWERPC_INTERRUPT_H */ 625