1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_POWERPC_INTERRUPT_H 3 #define _ASM_POWERPC_INTERRUPT_H 4 5 /* BookE/4xx */ 6 #define INTERRUPT_CRITICAL_INPUT 0x100 7 8 /* BookE */ 9 #define INTERRUPT_DEBUG 0xd00 10 #ifdef CONFIG_BOOKE 11 #define INTERRUPT_PERFMON 0x260 12 #define INTERRUPT_DOORBELL 0x280 13 #endif 14 15 /* BookS/4xx/8xx */ 16 #define INTERRUPT_MACHINE_CHECK 0x200 17 18 /* BookS/8xx */ 19 #define INTERRUPT_SYSTEM_RESET 0x100 20 21 /* BookS */ 22 #define INTERRUPT_DATA_SEGMENT 0x380 23 #define INTERRUPT_INST_SEGMENT 0x480 24 #define INTERRUPT_TRACE 0xd00 25 #define INTERRUPT_H_DATA_STORAGE 0xe00 26 #define INTERRUPT_HMI 0xe60 27 #define INTERRUPT_H_FAC_UNAVAIL 0xf80 28 #ifdef CONFIG_PPC_BOOK3S 29 #define INTERRUPT_DOORBELL 0xa00 30 #define INTERRUPT_PERFMON 0xf00 31 #define INTERRUPT_ALTIVEC_UNAVAIL 0xf20 32 #endif 33 34 /* BookE/BookS/4xx/8xx */ 35 #define INTERRUPT_DATA_STORAGE 0x300 36 #define INTERRUPT_INST_STORAGE 0x400 37 #define INTERRUPT_EXTERNAL 0x500 38 #define INTERRUPT_ALIGNMENT 0x600 39 #define INTERRUPT_PROGRAM 0x700 40 #define INTERRUPT_SYSCALL 0xc00 41 #define INTERRUPT_TRACE 0xd00 42 43 /* BookE/BookS/44x */ 44 #define INTERRUPT_FP_UNAVAIL 0x800 45 46 /* BookE/BookS/44x/8xx */ 47 #define INTERRUPT_DECREMENTER 0x900 48 49 #ifndef INTERRUPT_PERFMON 50 #define INTERRUPT_PERFMON 0x0 51 #endif 52 53 /* 8xx */ 54 #define INTERRUPT_SOFT_EMU_8xx 0x1000 55 #define INTERRUPT_INST_TLB_MISS_8xx 0x1100 56 #define INTERRUPT_DATA_TLB_MISS_8xx 0x1200 57 #define INTERRUPT_INST_TLB_ERROR_8xx 0x1300 58 #define INTERRUPT_DATA_TLB_ERROR_8xx 0x1400 59 #define INTERRUPT_DATA_BREAKPOINT_8xx 0x1c00 60 #define INTERRUPT_INST_BREAKPOINT_8xx 0x1d00 61 62 /* 603 */ 63 #define INTERRUPT_INST_TLB_MISS_603 0x1000 64 #define INTERRUPT_DATA_LOAD_TLB_MISS_603 0x1100 65 #define INTERRUPT_DATA_STORE_TLB_MISS_603 0x1200 66 67 #ifndef __ASSEMBLY__ 68 69 #include <linux/context_tracking.h> 70 #include <linux/hardirq.h> 71 #include <asm/cputime.h> 72 #include <asm/ftrace.h> 73 #include <asm/kprobes.h> 74 #include <asm/runlatch.h> 75 76 #ifdef CONFIG_PPC_BOOK3S_64 77 extern char __end_soft_masked[]; 78 bool search_kernel_soft_mask_table(unsigned long addr); 79 unsigned long search_kernel_restart_table(unsigned long addr); 80 81 DECLARE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant); 82 83 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 84 { 85 if (regs->msr & MSR_PR) 86 return false; 87 88 if (regs->nip >= (unsigned long)__end_soft_masked) 89 return false; 90 91 return search_kernel_soft_mask_table(regs->nip); 92 } 93 94 static inline void srr_regs_clobbered(void) 95 { 96 local_paca->srr_valid = 0; 97 local_paca->hsrr_valid = 0; 98 } 99 #else 100 static inline bool is_implicit_soft_masked(struct pt_regs *regs) 101 { 102 return false; 103 } 104 105 static inline void srr_regs_clobbered(void) 106 { 107 } 108 #endif 109 110 static inline void nap_adjust_return(struct pt_regs *regs) 111 { 112 #ifdef CONFIG_PPC_970_NAP 113 if (unlikely(test_thread_local_flags(_TLF_NAPPING))) { 114 /* Can avoid a test-and-clear because NMIs do not call this */ 115 clear_thread_local_flags(_TLF_NAPPING); 116 regs_set_return_ip(regs, (unsigned long)power4_idle_nap_return); 117 } 118 #endif 119 } 120 121 struct interrupt_state { 122 }; 123 124 static inline void booke_restore_dbcr0(void) 125 { 126 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 127 unsigned long dbcr0 = current->thread.debug.dbcr0; 128 129 if (IS_ENABLED(CONFIG_PPC32) && unlikely(dbcr0 & DBCR0_IDM)) { 130 mtspr(SPRN_DBSR, -1); 131 mtspr(SPRN_DBCR0, global_dbcr0[smp_processor_id()]); 132 } 133 #endif 134 } 135 136 static inline void interrupt_enter_prepare(struct pt_regs *regs, struct interrupt_state *state) 137 { 138 #ifdef CONFIG_PPC32 139 if (!arch_irq_disabled_regs(regs)) 140 trace_hardirqs_off(); 141 142 if (user_mode(regs)) 143 kuap_lock(); 144 else 145 kuap_save_and_lock(regs); 146 147 if (user_mode(regs)) 148 account_cpu_user_entry(); 149 #endif 150 151 #ifdef CONFIG_PPC64 152 if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED) 153 trace_hardirqs_off(); 154 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 155 156 if (user_mode(regs)) { 157 kuap_lock(); 158 CT_WARN_ON(ct_state() != CONTEXT_USER); 159 user_exit_irqoff(); 160 161 account_cpu_user_entry(); 162 account_stolen_time(); 163 } else { 164 kuap_save_and_lock(regs); 165 /* 166 * CT_WARN_ON comes here via program_check_exception, 167 * so avoid recursion. 168 */ 169 if (TRAP(regs) != INTERRUPT_PROGRAM) { 170 CT_WARN_ON(ct_state() != CONTEXT_KERNEL); 171 BUG_ON(is_implicit_soft_masked(regs)); 172 } 173 #ifdef CONFIG_PPC_BOOK3S 174 /* Move this under a debugging check */ 175 if (arch_irq_disabled_regs(regs)) 176 BUG_ON(search_kernel_restart_table(regs->nip)); 177 #endif 178 } 179 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) 180 BUG_ON(!arch_irq_disabled_regs(regs) && !(regs->msr & MSR_EE)); 181 #endif 182 183 booke_restore_dbcr0(); 184 } 185 186 /* 187 * Care should be taken to note that interrupt_exit_prepare and 188 * interrupt_async_exit_prepare do not necessarily return immediately to 189 * regs context (e.g., if regs is usermode, we don't necessarily return to 190 * user mode). Other interrupts might be taken between here and return, 191 * context switch / preemption may occur in the exit path after this, or a 192 * signal may be delivered, etc. 193 * 194 * The real interrupt exit code is platform specific, e.g., 195 * interrupt_exit_user_prepare / interrupt_exit_kernel_prepare for 64s. 196 * 197 * However interrupt_nmi_exit_prepare does return directly to regs, because 198 * NMIs do not do "exit work" or replay soft-masked interrupts. 199 */ 200 static inline void interrupt_exit_prepare(struct pt_regs *regs, struct interrupt_state *state) 201 { 202 } 203 204 static inline void interrupt_async_enter_prepare(struct pt_regs *regs, struct interrupt_state *state) 205 { 206 #ifdef CONFIG_PPC_BOOK3S_64 207 if (cpu_has_feature(CPU_FTR_CTRL) && 208 !test_thread_local_flags(_TLF_RUNLATCH)) 209 __ppc64_runlatch_on(); 210 #endif 211 212 interrupt_enter_prepare(regs, state); 213 irq_enter(); 214 } 215 216 static inline void interrupt_async_exit_prepare(struct pt_regs *regs, struct interrupt_state *state) 217 { 218 /* 219 * Adjust at exit so the main handler sees the true NIA. This must 220 * come before irq_exit() because irq_exit can enable interrupts, and 221 * if another interrupt is taken before nap_adjust_return has run 222 * here, then that interrupt would return directly to idle nap return. 223 */ 224 nap_adjust_return(regs); 225 226 irq_exit(); 227 interrupt_exit_prepare(regs, state); 228 } 229 230 struct interrupt_nmi_state { 231 #ifdef CONFIG_PPC64 232 u8 irq_soft_mask; 233 u8 irq_happened; 234 u8 ftrace_enabled; 235 u64 softe; 236 #endif 237 }; 238 239 static inline bool nmi_disables_ftrace(struct pt_regs *regs) 240 { 241 /* Allow DEC and PMI to be traced when they are soft-NMI */ 242 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) { 243 if (TRAP(regs) == INTERRUPT_DECREMENTER) 244 return false; 245 if (TRAP(regs) == INTERRUPT_PERFMON) 246 return false; 247 } 248 if (IS_ENABLED(CONFIG_PPC_BOOK3E)) { 249 if (TRAP(regs) == INTERRUPT_PERFMON) 250 return false; 251 } 252 253 return true; 254 } 255 256 static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 257 { 258 #ifdef CONFIG_PPC64 259 state->irq_soft_mask = local_paca->irq_soft_mask; 260 state->irq_happened = local_paca->irq_happened; 261 state->softe = regs->softe; 262 263 /* 264 * Set IRQS_ALL_DISABLED unconditionally so irqs_disabled() does 265 * the right thing, and set IRQ_HARD_DIS. We do not want to reconcile 266 * because that goes through irq tracing which we don't want in NMI. 267 */ 268 local_paca->irq_soft_mask = IRQS_ALL_DISABLED; 269 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 270 271 if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) { 272 /* 273 * Adjust regs->softe to be soft-masked if it had not been 274 * reconcied (e.g., interrupt entry with MSR[EE]=0 but softe 275 * not yet set disabled), or if it was in an implicit soft 276 * masked state. This makes arch_irq_disabled_regs(regs) 277 * behave as expected. 278 */ 279 regs->softe = IRQS_ALL_DISABLED; 280 } 281 282 /* Don't do any per-CPU operations until interrupt state is fixed */ 283 284 if (nmi_disables_ftrace(regs)) { 285 state->ftrace_enabled = this_cpu_get_ftrace_enabled(); 286 this_cpu_set_ftrace_enabled(0); 287 } 288 #endif 289 290 /* 291 * Do not use nmi_enter() for pseries hash guest taking a real-mode 292 * NMI because not everything it touches is within the RMA limit. 293 */ 294 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || 295 !firmware_has_feature(FW_FEATURE_LPAR) || 296 radix_enabled() || (mfmsr() & MSR_DR)) 297 nmi_enter(); 298 } 299 300 static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state) 301 { 302 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || 303 !firmware_has_feature(FW_FEATURE_LPAR) || 304 radix_enabled() || (mfmsr() & MSR_DR)) 305 nmi_exit(); 306 307 /* 308 * nmi does not call nap_adjust_return because nmi should not create 309 * new work to do (must use irq_work for that). 310 */ 311 312 #ifdef CONFIG_PPC64 313 #ifdef CONFIG_PPC_BOOK3S 314 if (arch_irq_disabled_regs(regs)) { 315 unsigned long rst = search_kernel_restart_table(regs->nip); 316 if (rst) 317 regs_set_return_ip(regs, rst); 318 } 319 #endif 320 321 if (nmi_disables_ftrace(regs)) 322 this_cpu_set_ftrace_enabled(state->ftrace_enabled); 323 324 /* Check we didn't change the pending interrupt mask. */ 325 WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) != local_paca->irq_happened); 326 regs->softe = state->softe; 327 local_paca->irq_happened = state->irq_happened; 328 local_paca->irq_soft_mask = state->irq_soft_mask; 329 #endif 330 } 331 332 /* 333 * Don't use noinstr here like x86, but rather add NOKPROBE_SYMBOL to each 334 * function definition. The reason for this is the noinstr section is placed 335 * after the main text section, i.e., very far away from the interrupt entry 336 * asm. That creates problems with fitting linker stubs when building large 337 * kernels. 338 */ 339 #define interrupt_handler __visible noinline notrace __no_kcsan __no_sanitize_address 340 341 /** 342 * DECLARE_INTERRUPT_HANDLER_RAW - Declare raw interrupt handler function 343 * @func: Function name of the entry point 344 * @returns: Returns a value back to asm caller 345 */ 346 #define DECLARE_INTERRUPT_HANDLER_RAW(func) \ 347 __visible long func(struct pt_regs *regs) 348 349 /** 350 * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function 351 * @func: Function name of the entry point 352 * @returns: Returns a value back to asm caller 353 * 354 * @func is called from ASM entry code. 355 * 356 * This is a plain function which does no tracing, reconciling, etc. 357 * The macro is written so it acts as function definition. Append the 358 * body with a pair of curly brackets. 359 * 360 * raw interrupt handlers must not enable or disable interrupts, or 361 * schedule, tracing and instrumentation (ftrace, lockdep, etc) would 362 * not be advisable either, although may be possible in a pinch, the 363 * trace will look odd at least. 364 * 365 * A raw handler may call one of the other interrupt handler functions 366 * to be converted into that interrupt context without these restrictions. 367 * 368 * On PPC64, _RAW handlers may return with fast_interrupt_return. 369 * 370 * Specific handlers may have additional restrictions. 371 */ 372 #define DEFINE_INTERRUPT_HANDLER_RAW(func) \ 373 static __always_inline long ____##func(struct pt_regs *regs); \ 374 \ 375 interrupt_handler long func(struct pt_regs *regs) \ 376 { \ 377 long ret; \ 378 \ 379 ret = ____##func (regs); \ 380 \ 381 return ret; \ 382 } \ 383 NOKPROBE_SYMBOL(func); \ 384 \ 385 static __always_inline long ____##func(struct pt_regs *regs) 386 387 /** 388 * DECLARE_INTERRUPT_HANDLER - Declare synchronous interrupt handler function 389 * @func: Function name of the entry point 390 */ 391 #define DECLARE_INTERRUPT_HANDLER(func) \ 392 __visible void func(struct pt_regs *regs) 393 394 /** 395 * DEFINE_INTERRUPT_HANDLER - Define synchronous interrupt handler function 396 * @func: Function name of the entry point 397 * 398 * @func is called from ASM entry code. 399 * 400 * The macro is written so it acts as function definition. Append the 401 * body with a pair of curly brackets. 402 */ 403 #define DEFINE_INTERRUPT_HANDLER(func) \ 404 static __always_inline void ____##func(struct pt_regs *regs); \ 405 \ 406 interrupt_handler void func(struct pt_regs *regs) \ 407 { \ 408 struct interrupt_state state; \ 409 \ 410 interrupt_enter_prepare(regs, &state); \ 411 \ 412 ____##func (regs); \ 413 \ 414 interrupt_exit_prepare(regs, &state); \ 415 } \ 416 NOKPROBE_SYMBOL(func); \ 417 \ 418 static __always_inline void ____##func(struct pt_regs *regs) 419 420 /** 421 * DECLARE_INTERRUPT_HANDLER_RET - Declare synchronous interrupt handler function 422 * @func: Function name of the entry point 423 * @returns: Returns a value back to asm caller 424 */ 425 #define DECLARE_INTERRUPT_HANDLER_RET(func) \ 426 __visible long func(struct pt_regs *regs) 427 428 /** 429 * DEFINE_INTERRUPT_HANDLER_RET - Define synchronous interrupt handler function 430 * @func: Function name of the entry point 431 * @returns: Returns a value back to asm caller 432 * 433 * @func is called from ASM entry code. 434 * 435 * The macro is written so it acts as function definition. Append the 436 * body with a pair of curly brackets. 437 */ 438 #define DEFINE_INTERRUPT_HANDLER_RET(func) \ 439 static __always_inline long ____##func(struct pt_regs *regs); \ 440 \ 441 interrupt_handler long func(struct pt_regs *regs) \ 442 { \ 443 struct interrupt_state state; \ 444 long ret; \ 445 \ 446 interrupt_enter_prepare(regs, &state); \ 447 \ 448 ret = ____##func (regs); \ 449 \ 450 interrupt_exit_prepare(regs, &state); \ 451 \ 452 return ret; \ 453 } \ 454 NOKPROBE_SYMBOL(func); \ 455 \ 456 static __always_inline long ____##func(struct pt_regs *regs) 457 458 /** 459 * DECLARE_INTERRUPT_HANDLER_ASYNC - Declare asynchronous interrupt handler function 460 * @func: Function name of the entry point 461 */ 462 #define DECLARE_INTERRUPT_HANDLER_ASYNC(func) \ 463 __visible void func(struct pt_regs *regs) 464 465 /** 466 * DEFINE_INTERRUPT_HANDLER_ASYNC - Define asynchronous interrupt handler function 467 * @func: Function name of the entry point 468 * 469 * @func is called from ASM entry code. 470 * 471 * The macro is written so it acts as function definition. Append the 472 * body with a pair of curly brackets. 473 */ 474 #define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \ 475 static __always_inline void ____##func(struct pt_regs *regs); \ 476 \ 477 interrupt_handler void func(struct pt_regs *regs) \ 478 { \ 479 struct interrupt_state state; \ 480 \ 481 interrupt_async_enter_prepare(regs, &state); \ 482 \ 483 ____##func (regs); \ 484 \ 485 interrupt_async_exit_prepare(regs, &state); \ 486 } \ 487 NOKPROBE_SYMBOL(func); \ 488 \ 489 static __always_inline void ____##func(struct pt_regs *regs) 490 491 /** 492 * DECLARE_INTERRUPT_HANDLER_NMI - Declare NMI interrupt handler function 493 * @func: Function name of the entry point 494 * @returns: Returns a value back to asm caller 495 */ 496 #define DECLARE_INTERRUPT_HANDLER_NMI(func) \ 497 __visible long func(struct pt_regs *regs) 498 499 /** 500 * DEFINE_INTERRUPT_HANDLER_NMI - Define NMI interrupt handler function 501 * @func: Function name of the entry point 502 * @returns: Returns a value back to asm caller 503 * 504 * @func is called from ASM entry code. 505 * 506 * The macro is written so it acts as function definition. Append the 507 * body with a pair of curly brackets. 508 */ 509 #define DEFINE_INTERRUPT_HANDLER_NMI(func) \ 510 static __always_inline long ____##func(struct pt_regs *regs); \ 511 \ 512 interrupt_handler long func(struct pt_regs *regs) \ 513 { \ 514 struct interrupt_nmi_state state; \ 515 long ret; \ 516 \ 517 interrupt_nmi_enter_prepare(regs, &state); \ 518 \ 519 ret = ____##func (regs); \ 520 \ 521 interrupt_nmi_exit_prepare(regs, &state); \ 522 \ 523 return ret; \ 524 } \ 525 NOKPROBE_SYMBOL(func); \ 526 \ 527 static __always_inline long ____##func(struct pt_regs *regs) 528 529 530 /* Interrupt handlers */ 531 /* kernel/traps.c */ 532 DECLARE_INTERRUPT_HANDLER_NMI(system_reset_exception); 533 #ifdef CONFIG_PPC_BOOK3S_64 534 DECLARE_INTERRUPT_HANDLER_ASYNC(machine_check_exception_async); 535 #endif 536 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_exception); 537 DECLARE_INTERRUPT_HANDLER(SMIException); 538 DECLARE_INTERRUPT_HANDLER(handle_hmi_exception); 539 DECLARE_INTERRUPT_HANDLER(unknown_exception); 540 DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception); 541 DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception); 542 DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception); 543 DECLARE_INTERRUPT_HANDLER(RunModeException); 544 DECLARE_INTERRUPT_HANDLER(single_step_exception); 545 DECLARE_INTERRUPT_HANDLER(program_check_exception); 546 DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt); 547 DECLARE_INTERRUPT_HANDLER(alignment_exception); 548 DECLARE_INTERRUPT_HANDLER(StackOverflow); 549 DECLARE_INTERRUPT_HANDLER(stack_overflow_exception); 550 DECLARE_INTERRUPT_HANDLER(kernel_fp_unavailable_exception); 551 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_exception); 552 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_exception); 553 DECLARE_INTERRUPT_HANDLER(facility_unavailable_exception); 554 DECLARE_INTERRUPT_HANDLER(fp_unavailable_tm); 555 DECLARE_INTERRUPT_HANDLER(altivec_unavailable_tm); 556 DECLARE_INTERRUPT_HANDLER(vsx_unavailable_tm); 557 DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi); 558 DECLARE_INTERRUPT_HANDLER_ASYNC(performance_monitor_exception_async); 559 DECLARE_INTERRUPT_HANDLER_RAW(performance_monitor_exception); 560 DECLARE_INTERRUPT_HANDLER(DebugException); 561 DECLARE_INTERRUPT_HANDLER(altivec_assist_exception); 562 DECLARE_INTERRUPT_HANDLER(CacheLockingException); 563 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException); 564 DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException); 565 DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException); 566 DECLARE_INTERRUPT_HANDLER(kernel_bad_stack); 567 568 /* slb.c */ 569 DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault); 570 DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt); 571 572 /* hash_utils.c */ 573 DECLARE_INTERRUPT_HANDLER_RAW(do_hash_fault); 574 575 /* fault.c */ 576 DECLARE_INTERRUPT_HANDLER(do_page_fault); 577 DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv); 578 579 /* process.c */ 580 DECLARE_INTERRUPT_HANDLER(do_break); 581 582 /* time.c */ 583 DECLARE_INTERRUPT_HANDLER_ASYNC(timer_interrupt); 584 585 /* mce.c */ 586 DECLARE_INTERRUPT_HANDLER_NMI(machine_check_early); 587 DECLARE_INTERRUPT_HANDLER_NMI(hmi_exception_realmode); 588 589 DECLARE_INTERRUPT_HANDLER_ASYNC(TAUException); 590 591 /* irq.c */ 592 DECLARE_INTERRUPT_HANDLER_ASYNC(do_IRQ); 593 594 void __noreturn unrecoverable_exception(struct pt_regs *regs); 595 596 void replay_system_reset(void); 597 void replay_soft_interrupts(void); 598 599 static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs) 600 { 601 if (!arch_irq_disabled_regs(regs)) 602 local_irq_enable(); 603 } 604 605 #endif /* __ASSEMBLY__ */ 606 607 #endif /* _ASM_POWERPC_INTERRUPT_H */ 608