1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2008 Maxime Bizon <[email protected]> 7 */ 8 9 #include <linux/init.h> 10 #include <linux/kernel.h> 11 #include <linux/delay.h> 12 #include <linux/bootmem.h> 13 #include <linux/ioport.h> 14 #include <linux/pm.h> 15 #include <asm/bootinfo.h> 16 #include <asm/time.h> 17 #include <asm/reboot.h> 18 #include <asm/cacheflush.h> 19 #include <bcm63xx_board.h> 20 #include <bcm63xx_cpu.h> 21 #include <bcm63xx_regs.h> 22 #include <bcm63xx_io.h> 23 24 void bcm63xx_machine_halt(void) 25 { 26 printk(KERN_INFO "System halted\n"); 27 while (1) 28 ; 29 } 30 31 static void bcm6348_a1_reboot(void) 32 { 33 u32 reg; 34 35 /* soft reset all blocks */ 36 printk(KERN_INFO "soft-resetting all blocks ...\n"); 37 reg = bcm_perf_readl(PERF_SOFTRESET_REG); 38 reg &= ~SOFTRESET_6348_ALL; 39 bcm_perf_writel(reg, PERF_SOFTRESET_REG); 40 mdelay(10); 41 42 reg = bcm_perf_readl(PERF_SOFTRESET_REG); 43 reg |= SOFTRESET_6348_ALL; 44 bcm_perf_writel(reg, PERF_SOFTRESET_REG); 45 mdelay(10); 46 47 /* Jump to the power on address. */ 48 printk(KERN_INFO "jumping to reset vector.\n"); 49 /* set high vectors (base at 0xbfc00000 */ 50 set_c0_status(ST0_BEV | ST0_ERL); 51 /* run uncached in kseg0 */ 52 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); 53 __flush_cache_all(); 54 /* remove all wired TLB entries */ 55 write_c0_wired(0); 56 __asm__ __volatile__( 57 "jr\t%0" 58 : 59 : "r" (0xbfc00000)); 60 while (1) 61 ; 62 } 63 64 void bcm63xx_machine_reboot(void) 65 { 66 u32 reg, perf_regs[2] = { 0, 0 }; 67 unsigned int i; 68 69 /* mask and clear all external irq */ 70 switch (bcm63xx_get_cpu_id()) { 71 case BCM6328_CPU_ID: 72 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328; 73 break; 74 case BCM6338_CPU_ID: 75 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338; 76 break; 77 case BCM6345_CPU_ID: 78 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345; 79 break; 80 case BCM6348_CPU_ID: 81 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348; 82 break; 83 case BCM6358_CPU_ID: 84 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358; 85 break; 86 } 87 88 for (i = 0; i < 2; i++) { 89 reg = bcm_perf_readl(perf_regs[i]); 90 if (BCMCPU_IS_6348()) { 91 reg &= ~EXTIRQ_CFG_MASK_ALL_6348; 92 reg |= EXTIRQ_CFG_CLEAR_ALL_6348; 93 } else { 94 reg &= ~EXTIRQ_CFG_MASK_ALL; 95 reg |= EXTIRQ_CFG_CLEAR_ALL; 96 } 97 bcm_perf_writel(reg, perf_regs[i]); 98 } 99 100 if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1)) 101 bcm6348_a1_reboot(); 102 103 printk(KERN_INFO "triggering watchdog soft-reset...\n"); 104 if (BCMCPU_IS_6328()) { 105 bcm_wdt_writel(1, WDT_SOFTRESET_REG); 106 } else { 107 reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); 108 reg |= SYS_PLL_SOFT_RESET; 109 bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); 110 } 111 while (1) 112 ; 113 } 114 115 static void __bcm63xx_machine_reboot(char *p) 116 { 117 bcm63xx_machine_reboot(); 118 } 119 120 /* 121 * return system type in /proc/cpuinfo 122 */ 123 const char *get_system_type(void) 124 { 125 static char buf[128]; 126 snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)", 127 board_get_name(), 128 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); 129 return buf; 130 } 131 132 void __init plat_time_init(void) 133 { 134 mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2; 135 } 136 137 void __init plat_mem_setup(void) 138 { 139 add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM); 140 141 _machine_halt = bcm63xx_machine_halt; 142 _machine_restart = __bcm63xx_machine_reboot; 143 pm_power_off = bcm63xx_machine_halt; 144 145 set_io_port_base(0); 146 ioport_resource.start = 0; 147 ioport_resource.end = ~0; 148 149 board_setup(); 150 } 151 152 int __init bcm63xx_register_devices(void) 153 { 154 return board_register_devices(); 155 } 156 157 device_initcall(bcm63xx_register_devices); 158