1 /* 2 * Copyright (C) 2008-2009 Michal Simek <[email protected]> 3 * Copyright (C) 2008-2009 PetaLogix 4 * Copyright (C) 2006 Atmark Techno, Inc. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/export.h> 12 #include <linux/sched.h> 13 #include <linux/pm.h> 14 #include <linux/tick.h> 15 #include <linux/bitops.h> 16 #include <linux/ptrace.h> 17 #include <asm/pgalloc.h> 18 #include <linux/uaccess.h> /* for USER_DS macros */ 19 #include <asm/cacheflush.h> 20 21 void show_regs(struct pt_regs *regs) 22 { 23 pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode); 24 pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n", 25 regs->r1, regs->r2, regs->r3, regs->r4); 26 pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n", 27 regs->r5, regs->r6, regs->r7, regs->r8); 28 pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n", 29 regs->r9, regs->r10, regs->r11, regs->r12); 30 pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n", 31 regs->r13, regs->r14, regs->r15, regs->r16); 32 pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n", 33 regs->r17, regs->r18, regs->r19, regs->r20); 34 pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n", 35 regs->r21, regs->r22, regs->r23, regs->r24); 36 pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n", 37 regs->r25, regs->r26, regs->r27, regs->r28); 38 pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n", 39 regs->r29, regs->r30, regs->r31, regs->pc); 40 pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n", 41 regs->msr, regs->ear, regs->esr, regs->fsr); 42 } 43 44 void (*pm_power_off)(void) = NULL; 45 EXPORT_SYMBOL(pm_power_off); 46 47 void flush_thread(void) 48 { 49 } 50 51 int copy_thread(unsigned long clone_flags, unsigned long usp, 52 unsigned long arg, struct task_struct *p) 53 { 54 struct pt_regs *childregs = task_pt_regs(p); 55 struct thread_info *ti = task_thread_info(p); 56 57 if (unlikely(p->flags & PF_KTHREAD)) { 58 /* if we're creating a new kernel thread then just zeroing all 59 * the registers. That's OK for a brand new thread.*/ 60 memset(childregs, 0, sizeof(struct pt_regs)); 61 memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); 62 ti->cpu_context.r1 = (unsigned long)childregs; 63 ti->cpu_context.r20 = (unsigned long)usp; /* fn */ 64 ti->cpu_context.r19 = (unsigned long)arg; 65 childregs->pt_mode = 1; 66 local_save_flags(childregs->msr); 67 #ifdef CONFIG_MMU 68 ti->cpu_context.msr = childregs->msr & ~MSR_IE; 69 #endif 70 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8; 71 return 0; 72 } 73 *childregs = *current_pt_regs(); 74 if (usp) 75 childregs->r1 = usp; 76 77 memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); 78 ti->cpu_context.r1 = (unsigned long)childregs; 79 #ifndef CONFIG_MMU 80 ti->cpu_context.msr = (unsigned long)childregs->msr; 81 #else 82 childregs->msr |= MSR_UMS; 83 84 /* we should consider the fact that childregs is a copy of the parent 85 * regs which were saved immediately after entering the kernel state 86 * before enabling VM. This MSR will be restored in switch_to and 87 * RETURN() and we want to have the right machine state there 88 * specifically this state must have INTs disabled before and enabled 89 * after performing rtbd 90 * compose the right MSR for RETURN(). It will work for switch_to also 91 * excepting for VM and UMS 92 * don't touch UMS , CARRY and cache bits 93 * right now MSR is a copy of parent one */ 94 childregs->msr &= ~MSR_EIP; 95 childregs->msr |= MSR_IE; 96 childregs->msr &= ~MSR_VM; 97 childregs->msr |= MSR_VMS; 98 childregs->msr |= MSR_EE; /* exceptions will be enabled*/ 99 100 ti->cpu_context.msr = (childregs->msr|MSR_VM); 101 ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */ 102 ti->cpu_context.msr &= ~MSR_IE; 103 #endif 104 ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8; 105 106 /* 107 * r21 is the thread reg, r10 is 6th arg to clone 108 * which contains TLS area 109 */ 110 if (clone_flags & CLONE_SETTLS) 111 childregs->r21 = childregs->r10; 112 113 return 0; 114 } 115 116 #ifndef CONFIG_MMU 117 /* 118 * Return saved PC of a blocked thread. 119 */ 120 unsigned long thread_saved_pc(struct task_struct *tsk) 121 { 122 struct cpu_context *ctx = 123 &(((struct thread_info *)(tsk->stack))->cpu_context); 124 125 /* Check whether the thread is blocked in resume() */ 126 if (in_sched_functions(ctx->r15)) 127 return (unsigned long)ctx->r15; 128 else 129 return ctx->r14; 130 } 131 #endif 132 133 unsigned long get_wchan(struct task_struct *p) 134 { 135 /* TBD (used by procfs) */ 136 return 0; 137 } 138 139 /* Set up a thread for executing a new program */ 140 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp) 141 { 142 regs->pc = pc; 143 regs->r1 = usp; 144 regs->pt_mode = 0; 145 #ifdef CONFIG_MMU 146 regs->msr |= MSR_UMS; 147 regs->msr &= ~MSR_VM; 148 #endif 149 } 150 151 #ifdef CONFIG_MMU 152 #include <linux/elfcore.h> 153 /* 154 * Set up a thread for executing a new program 155 */ 156 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs) 157 { 158 return 0; /* MicroBlaze has no separate FPU registers */ 159 } 160 #endif /* CONFIG_MMU */ 161