1c7c3eac6SShawn Guo/* 2c7c3eac6SShawn Guo * Copyright 2013 Freescale Semiconductor, Inc. 3c7c3eac6SShawn Guo * 4c7c3eac6SShawn Guo * This program is free software; you can redistribute it and/or modify 5c7c3eac6SShawn Guo * it under the terms of the GNU General Public License version 2 as 6c7c3eac6SShawn Guo * published by the Free Software Foundation. 7c7c3eac6SShawn Guo * 8c7c3eac6SShawn Guo */ 9c7c3eac6SShawn Guo 10*cfdb7d56SStefan Agner#define VF_UART0_BASE_ADDR 0x40027000 11*cfdb7d56SStefan Agner#define VF_UART1_BASE_ADDR 0x40028000 12*cfdb7d56SStefan Agner#define VF_UART2_BASE_ADDR 0x40029000 13*cfdb7d56SStefan Agner#define VF_UART3_BASE_ADDR 0x4002a000 14*cfdb7d56SStefan Agner#define VF_UART_BASE_ADDR(n) VF_UART##n##_BASE_ADDR 15*cfdb7d56SStefan Agner#define VF_UART_BASE(n) VF_UART_BASE_ADDR(n) 16*cfdb7d56SStefan Agner#define VF_UART_PHYSICAL_BASE VF_UART_BASE(CONFIG_DEBUG_VF_UART_PORT) 17*cfdb7d56SStefan Agner 18*cfdb7d56SStefan Agner#define VF_UART_VIRTUAL_BASE 0xfe000000 19*cfdb7d56SStefan Agner 20c7c3eac6SShawn Guo .macro addruart, rp, rv, tmp 21*cfdb7d56SStefan Agner ldr \rp, =VF_UART_PHYSICAL_BASE @ physical 22*cfdb7d56SStefan Agner and \rv, \rp, #0xffffff @ offset within 16MB section 23*cfdb7d56SStefan Agner add \rv, \rv, #VF_UART_VIRTUAL_BASE 24c7c3eac6SShawn Guo .endm 25c7c3eac6SShawn Guo 26c7c3eac6SShawn Guo .macro senduart, rd, rx 27c7c3eac6SShawn Guo strb \rd, [\rx, #0x7] @ Data Register 28c7c3eac6SShawn Guo .endm 29c7c3eac6SShawn Guo 30c7c3eac6SShawn Guo .macro busyuart, rd, rx 31c7c3eac6SShawn Guo1001: ldrb \rd, [\rx, #0x4] @ Status Register 1 32c7c3eac6SShawn Guo tst \rd, #1 << 6 @ TC 33c7c3eac6SShawn Guo beq 1001b @ wait until transmit done 34c7c3eac6SShawn Guo .endm 35c7c3eac6SShawn Guo 36c7c3eac6SShawn Guo .macro waituart,rd,rx 37c7c3eac6SShawn Guo .endm 38