1/* 2 * Debugging macro include header 3 * 4 * Copyright (C) 1994-1999 Russell King 5 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11*/ 12 13#include <linux/serial_reg.h> 14 15/* OMAP2 serial ports */ 16#define OMAP2_UART1_BASE 0x4806a000 17#define OMAP2_UART2_BASE 0x4806c000 18#define OMAP2_UART3_BASE 0x4806e000 19 20/* OMAP3 serial ports */ 21#define OMAP3_UART1_BASE OMAP2_UART1_BASE 22#define OMAP3_UART2_BASE OMAP2_UART2_BASE 23#define OMAP3_UART3_BASE 0x49020000 24#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 25#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */ 26 27/* OMAP4 serial ports */ 28#define OMAP4_UART1_BASE OMAP2_UART1_BASE 29#define OMAP4_UART2_BASE OMAP2_UART2_BASE 30#define OMAP4_UART3_BASE 0x48020000 31#define OMAP4_UART4_BASE 0x4806e000 32 33/* TI81XX serial ports */ 34#define TI81XX_UART1_BASE 0x48020000 35#define TI81XX_UART2_BASE 0x48022000 36#define TI81XX_UART3_BASE 0x48024000 37 38/* AM3505/3517 UART4 */ 39#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ 40 41/* AM33XX serial port */ 42#define AM33XX_UART1_BASE 0x44E09000 43 44/* OMAP5 serial ports */ 45#define OMAP5_UART1_BASE OMAP2_UART1_BASE 46#define OMAP5_UART2_BASE OMAP2_UART2_BASE 47#define OMAP5_UART3_BASE OMAP4_UART3_BASE 48#define OMAP5_UART4_BASE OMAP4_UART4_BASE 49#define OMAP5_UART5_BASE 0x48066000 50#define OMAP5_UART6_BASE 0x48068000 51 52/* External port on Zoom2/3 */ 53#define ZOOM_UART_BASE 0x10000000 54#define ZOOM_UART_VIRT 0xfa400000 55 56#define OMAP_PORT_SHIFT 2 57#define ZOOM_PORT_SHIFT 1 58 59#define UART_OFFSET(addr) ((addr) & 0x00ffffff) 60 61 .pushsection .data 62 .align 2 63omap_uart_phys: .word 0 64omap_uart_virt: .word 0 65omap_uart_lsr: .word 0 66 .popsection 67 68 .macro addruart, rp, rv, tmp 69 70 /* Use omap_uart_phys/virt if already configured */ 7110: adr \rp, 99f @ get effective addr of 99f 72 ldr \rv, [\rp] @ get absolute addr of 99f 73 sub \rv, \rv, \rp @ offset between the two 74 ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 75 sub \tmp, \rp, \rv @ make it effective 76 ldr \rp, [\tmp, #0] @ omap_uart_phys 77 ldr \rv, [\tmp, #4] @ omap_uart_virt 78 cmp \rp, #0 @ is port configured? 79 cmpne \rv, #0 80 bne 100f @ already configured 81 82 /* Configure the UART offset from the phys/virt base */ 83#ifdef CONFIG_DEBUG_OMAP2UART1 84 mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 85 b 98f 86#endif 87#ifdef CONFIG_DEBUG_OMAP2UART2 88 mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 89 b 98f 90#endif 91#ifdef CONFIG_DEBUG_OMAP2UART3 92 mov \rp, #UART_OFFSET(OMAP2_UART3_BASE) 93 b 98f 94#endif 95#ifdef CONFIG_DEBUG_OMAP3UART3 96 mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 97 add \rp, \rp, #0x00fb0000 98 add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE 99 b 98f 100#endif 101#ifdef CONFIG_DEBUG_OMAP4UART3 102 mov \rp, #UART_OFFSET(OMAP4_UART3_BASE) 103 b 98f 104#endif 105#ifdef CONFIG_DEBUG_OMAP3UART4 106 mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 107 add \rp, \rp, #0x00fb0000 108 add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE 109 b 98f 110#endif 111#ifdef CONFIG_DEBUG_OMAP4UART4 112 mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 113 b 98f 114#endif 115#ifdef CONFIG_DEBUG_TI81XXUART1 116 mov \rp, #UART_OFFSET(TI81XX_UART1_BASE) 117 b 98f 118#endif 119#ifdef CONFIG_DEBUG_TI81XXUART2 120 mov \rp, #UART_OFFSET(TI81XX_UART2_BASE) 121 b 98f 122#endif 123#ifdef CONFIG_DEBUG_TI81XXUART3 124 mov \rp, #UART_OFFSET(TI81XX_UART3_BASE) 125 b 98f 126#endif 127#ifdef CONFIG_DEBUG_AM33XXUART1 128 ldr \rp, =AM33XX_UART1_BASE 129 and \rp, \rp, #0x00ffffff 130 b 97f 131#endif 132#ifdef CONFIG_DEBUG_ZOOM_UART 133 ldr \rp, =ZOOM_UART_BASE 134 str \rp, [\tmp, #0] @ omap_uart_phys 135 ldr \rp, =ZOOM_UART_VIRT 136 str \rp, [\tmp, #4] @ omap_uart_virt 137 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) 138 str \rp, [\tmp, #8] @ omap_uart_lsr 139#endif 140 b 10b 141 142 /* AM33XX: Store both phys and virt address for the uart */ 14397: add \rp, \rp, #0x44000000 @ phys base 144 str \rp, [\tmp, #0] @ omap_uart_phys 145 sub \rp, \rp, #0x44000000 @ phys base 146 add \rp, \rp, #0xf9000000 @ virt base 147 str \rp, [\tmp, #4] @ omap_uart_virt 148 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) 149 str \rp, [\tmp, #8] @ omap_uart_lsr 150 151 b 10b 152 153 /* Store both phys and virt address for the uart */ 15498: add \rp, \rp, #0x48000000 @ phys base 155 str \rp, [\tmp, #0] @ omap_uart_phys 156 sub \rp, \rp, #0x48000000 @ phys base 157 add \rp, \rp, #0xfa000000 @ virt base 158 str \rp, [\tmp, #4] @ omap_uart_virt 159 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) 160 str \rp, [\tmp, #8] @ omap_uart_lsr 161 162 b 10b 163 164 .align 16599: .word . 166 .word omap_uart_phys 167 .ltorg 168 169100: /* Pass the UART_LSR reg address */ 170 ldr \tmp, [\tmp, #8] @ omap_uart_lsr 171 add \rp, \rp, \tmp 172 add \rv, \rv, \tmp 173 .endm 174 175 .macro senduart,rd,rx 176 orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset 177 bic \rx, \rx, #0xff @ get base (THR) reg address 178 strb \rd, [\rx] @ send lower byte of rd 179 orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) 180 bic \rd, \rd, #(0xff << 24) @ restore original rd 181 .endm 182 183 .macro busyuart,rd,rx 1841001: ldrb \rd, [\rx] @ rx contains UART_LSR address 185 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 186 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 187 bne 1001b 188 .endm 189 190 .macro waituart,rd,rx 191 .endm 192