1*91a9fec0SRob Herring/* 2*91a9fec0SRob Herring * arch/arm/include/debug/icedcc.S 3*91a9fec0SRob Herring * 4*91a9fec0SRob Herring * Copyright (C) 1994-1999 Russell King 5*91a9fec0SRob Herring * 6*91a9fec0SRob Herring * This program is free software; you can redistribute it and/or modify 7*91a9fec0SRob Herring * it under the terms of the GNU General Public License version 2 as 8*91a9fec0SRob Herring * published by the Free Software Foundation. 9*91a9fec0SRob Herring * 10*91a9fec0SRob Herring */ 11*91a9fec0SRob Herring 12*91a9fec0SRob Herring @@ debug using ARM EmbeddedICE DCC channel 13*91a9fec0SRob Herring 14*91a9fec0SRob Herring .macro addruart, rp, rv, tmp 15*91a9fec0SRob Herring .endm 16*91a9fec0SRob Herring 17*91a9fec0SRob Herring#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 18*91a9fec0SRob Herring 19*91a9fec0SRob Herring .macro senduart, rd, rx 20*91a9fec0SRob Herring mcr p14, 0, \rd, c0, c5, 0 21*91a9fec0SRob Herring .endm 22*91a9fec0SRob Herring 23*91a9fec0SRob Herring .macro busyuart, rd, rx 24*91a9fec0SRob Herring1001: 25*91a9fec0SRob Herring mrc p14, 0, \rx, c0, c1, 0 26*91a9fec0SRob Herring tst \rx, #0x20000000 27*91a9fec0SRob Herring beq 1001b 28*91a9fec0SRob Herring .endm 29*91a9fec0SRob Herring 30*91a9fec0SRob Herring .macro waituart, rd, rx 31*91a9fec0SRob Herring mov \rd, #0x2000000 32*91a9fec0SRob Herring1001: 33*91a9fec0SRob Herring subs \rd, \rd, #1 34*91a9fec0SRob Herring bmi 1002f 35*91a9fec0SRob Herring mrc p14, 0, \rx, c0, c1, 0 36*91a9fec0SRob Herring tst \rx, #0x20000000 37*91a9fec0SRob Herring bne 1001b 38*91a9fec0SRob Herring1002: 39*91a9fec0SRob Herring .endm 40*91a9fec0SRob Herring 41*91a9fec0SRob Herring#elif defined(CONFIG_CPU_XSCALE) 42*91a9fec0SRob Herring 43*91a9fec0SRob Herring .macro senduart, rd, rx 44*91a9fec0SRob Herring mcr p14, 0, \rd, c8, c0, 0 45*91a9fec0SRob Herring .endm 46*91a9fec0SRob Herring 47*91a9fec0SRob Herring .macro busyuart, rd, rx 48*91a9fec0SRob Herring1001: 49*91a9fec0SRob Herring mrc p14, 0, \rx, c14, c0, 0 50*91a9fec0SRob Herring tst \rx, #0x10000000 51*91a9fec0SRob Herring beq 1001b 52*91a9fec0SRob Herring .endm 53*91a9fec0SRob Herring 54*91a9fec0SRob Herring .macro waituart, rd, rx 55*91a9fec0SRob Herring mov \rd, #0x10000000 56*91a9fec0SRob Herring1001: 57*91a9fec0SRob Herring subs \rd, \rd, #1 58*91a9fec0SRob Herring bmi 1002f 59*91a9fec0SRob Herring mrc p14, 0, \rx, c14, c0, 0 60*91a9fec0SRob Herring tst \rx, #0x10000000 61*91a9fec0SRob Herring bne 1001b 62*91a9fec0SRob Herring1002: 63*91a9fec0SRob Herring .endm 64*91a9fec0SRob Herring 65*91a9fec0SRob Herring#else 66*91a9fec0SRob Herring 67*91a9fec0SRob Herring .macro senduart, rd, rx 68*91a9fec0SRob Herring mcr p14, 0, \rd, c1, c0, 0 69*91a9fec0SRob Herring .endm 70*91a9fec0SRob Herring 71*91a9fec0SRob Herring .macro busyuart, rd, rx 72*91a9fec0SRob Herring1001: 73*91a9fec0SRob Herring mrc p14, 0, \rx, c0, c0, 0 74*91a9fec0SRob Herring tst \rx, #2 75*91a9fec0SRob Herring beq 1001b 76*91a9fec0SRob Herring 77*91a9fec0SRob Herring .endm 78*91a9fec0SRob Herring 79*91a9fec0SRob Herring .macro waituart, rd, rx 80*91a9fec0SRob Herring mov \rd, #0x2000000 81*91a9fec0SRob Herring1001: 82*91a9fec0SRob Herring subs \rd, \rd, #1 83*91a9fec0SRob Herring bmi 1002f 84*91a9fec0SRob Herring mrc p14, 0, \rx, c0, c0, 0 85*91a9fec0SRob Herring tst \rx, #2 86*91a9fec0SRob Herring bne 1001b 87*91a9fec0SRob Herring1002: 88*91a9fec0SRob Herring .endm 89*91a9fec0SRob Herring 90*91a9fec0SRob Herring#endif /* CONFIG_CPU_V6 */ 91