1*45051539SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
233f663ffSCatalin Marinas /*
333f663ffSCatalin Marinas * arch/arm/include/asm/outercache.h
433f663ffSCatalin Marinas *
533f663ffSCatalin Marinas * Copyright (C) 2010 ARM Ltd.
633f663ffSCatalin Marinas * Written by Catalin Marinas <[email protected]>
733f663ffSCatalin Marinas */
833f663ffSCatalin Marinas
933f663ffSCatalin Marinas #ifndef __ASM_OUTERCACHE_H
1033f663ffSCatalin Marinas #define __ASM_OUTERCACHE_H
1133f663ffSCatalin Marinas
12ad6b9c9dSWill Deacon #include <linux/types.h>
13ad6b9c9dSWill Deacon
14c6d1a2d0STomasz Figa struct l2x0_regs;
15c6d1a2d0STomasz Figa
1633f663ffSCatalin Marinas struct outer_cache_fns {
1733f663ffSCatalin Marinas void (*inv_range)(unsigned long, unsigned long);
1833f663ffSCatalin Marinas void (*clean_range)(unsigned long, unsigned long);
1933f663ffSCatalin Marinas void (*flush_range)(unsigned long, unsigned long);
20ae360a78SThomas Gleixner void (*flush_all)(void);
21ae360a78SThomas Gleixner void (*disable)(void);
22319f551aSCatalin Marinas #ifdef CONFIG_OUTER_CACHE_SYNC
23319f551aSCatalin Marinas void (*sync)(void);
24319f551aSCatalin Marinas #endif
2591c2ebb9SBarry Song void (*resume)(void);
268abd259fSRussell King
278abd259fSRussell King /* This is an ARM L2C thing */
288abd259fSRussell King void (*write_sec)(unsigned long, unsigned);
29c6d1a2d0STomasz Figa void (*configure)(const struct l2x0_regs *);
3033f663ffSCatalin Marinas };
3133f663ffSCatalin Marinas
3233f663ffSCatalin Marinas extern struct outer_cache_fns outer_cache;
3333f663ffSCatalin Marinas
340b53c11dSRob Herring #ifdef CONFIG_OUTER_CACHE
35bc4f94d8SRussell King /**
36bc4f94d8SRussell King * outer_inv_range - invalidate range of outer cache lines
37bc4f94d8SRussell King * @start: starting physical address, inclusive
38bc4f94d8SRussell King * @end: end physical address, exclusive
39bc4f94d8SRussell King */
outer_inv_range(phys_addr_t start,phys_addr_t end)40ad6b9c9dSWill Deacon static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
4133f663ffSCatalin Marinas {
4233f663ffSCatalin Marinas if (outer_cache.inv_range)
4333f663ffSCatalin Marinas outer_cache.inv_range(start, end);
4433f663ffSCatalin Marinas }
45bc4f94d8SRussell King
46bc4f94d8SRussell King /**
47bc4f94d8SRussell King * outer_clean_range - clean dirty outer cache lines
48bc4f94d8SRussell King * @start: starting physical address, inclusive
49bc4f94d8SRussell King * @end: end physical address, exclusive
50bc4f94d8SRussell King */
outer_clean_range(phys_addr_t start,phys_addr_t end)51ad6b9c9dSWill Deacon static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
5233f663ffSCatalin Marinas {
5333f663ffSCatalin Marinas if (outer_cache.clean_range)
5433f663ffSCatalin Marinas outer_cache.clean_range(start, end);
5533f663ffSCatalin Marinas }
56bc4f94d8SRussell King
57bc4f94d8SRussell King /**
58bc4f94d8SRussell King * outer_flush_range - clean and invalidate outer cache lines
59bc4f94d8SRussell King * @start: starting physical address, inclusive
60bc4f94d8SRussell King * @end: end physical address, exclusive
61bc4f94d8SRussell King */
outer_flush_range(phys_addr_t start,phys_addr_t end)62ad6b9c9dSWill Deacon static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
6333f663ffSCatalin Marinas {
6433f663ffSCatalin Marinas if (outer_cache.flush_range)
6533f663ffSCatalin Marinas outer_cache.flush_range(start, end);
6633f663ffSCatalin Marinas }
6733f663ffSCatalin Marinas
68bc4f94d8SRussell King /**
69bc4f94d8SRussell King * outer_flush_all - clean and invalidate all cache lines in the outer cache
70bc4f94d8SRussell King *
71bc4f94d8SRussell King * Note: depending on implementation, this may not be atomic - it must
72bc4f94d8SRussell King * only be called with interrupts disabled and no other active outer
73bc4f94d8SRussell King * cache masters.
74bc4f94d8SRussell King *
75bc4f94d8SRussell King * It is intended that this function is only used by implementations
76bc4f94d8SRussell King * needing to override the outer_cache.disable() method due to security.
77bc4f94d8SRussell King * (Some implementations perform this as a clean followed by an invalidate.)
78bc4f94d8SRussell King */
outer_flush_all(void)79ae360a78SThomas Gleixner static inline void outer_flush_all(void)
80ae360a78SThomas Gleixner {
81ae360a78SThomas Gleixner if (outer_cache.flush_all)
82ae360a78SThomas Gleixner outer_cache.flush_all();
83ae360a78SThomas Gleixner }
84ae360a78SThomas Gleixner
85bc4f94d8SRussell King /**
86bc4f94d8SRussell King * outer_disable - clean, invalidate and disable the outer cache
87bc4f94d8SRussell King *
88bc4f94d8SRussell King * Disable the outer cache, ensuring that any data contained in the outer
89bc4f94d8SRussell King * cache is pushed out to lower levels of system memory. The note and
90bc4f94d8SRussell King * conditions above concerning outer_flush_all() applies here.
91bc4f94d8SRussell King */
921f1d5b74SRussell King extern void outer_disable(void);
93ae360a78SThomas Gleixner
94bc4f94d8SRussell King /**
95bc4f94d8SRussell King * outer_resume - restore the cache configuration and re-enable outer cache
96bc4f94d8SRussell King *
97bc4f94d8SRussell King * Restore any configuration that the cache had when previously enabled,
98bc4f94d8SRussell King * and re-enable the outer cache.
99bc4f94d8SRussell King */
outer_resume(void)10091c2ebb9SBarry Song static inline void outer_resume(void)
10191c2ebb9SBarry Song {
10291c2ebb9SBarry Song if (outer_cache.resume)
10391c2ebb9SBarry Song outer_cache.resume();
10491c2ebb9SBarry Song }
10591c2ebb9SBarry Song
10633f663ffSCatalin Marinas #else
10733f663ffSCatalin Marinas
outer_inv_range(phys_addr_t start,phys_addr_t end)108ad6b9c9dSWill Deacon static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
10933f663ffSCatalin Marinas { }
outer_clean_range(phys_addr_t start,phys_addr_t end)110ad6b9c9dSWill Deacon static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
11133f663ffSCatalin Marinas { }
outer_flush_range(phys_addr_t start,phys_addr_t end)112ad6b9c9dSWill Deacon static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
11333f663ffSCatalin Marinas { }
outer_flush_all(void)114ae360a78SThomas Gleixner static inline void outer_flush_all(void) { }
outer_disable(void)115ae360a78SThomas Gleixner static inline void outer_disable(void) { }
outer_resume(void)1164e79a62dSBarry Song static inline void outer_resume(void) { }
11733f663ffSCatalin Marinas
11833f663ffSCatalin Marinas #endif
11933f663ffSCatalin Marinas
12033f663ffSCatalin Marinas #endif /* __ASM_OUTERCACHE_H */
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