1*849ed9d4SLuca Weiss# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*849ed9d4SLuca Weiss%YAML 1.2 3*849ed9d4SLuca Weiss--- 4*849ed9d4SLuca Weiss$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml# 5*849ed9d4SLuca Weiss$schema: http://devicetree.org/meta-schemas/core.yaml# 6*849ed9d4SLuca Weiss 7*849ed9d4SLuca Weisstitle: Qualcomm High-Frequency PLL 8*849ed9d4SLuca Weiss 9*849ed9d4SLuca Weissmaintainers: 10*849ed9d4SLuca Weiss - Bjorn Andersson <[email protected]> 11*849ed9d4SLuca Weiss 12*849ed9d4SLuca Weissdescription: 13*849ed9d4SLuca Weiss The HFPLL is used as CPU PLL on various Qualcomm SoCs. 14*849ed9d4SLuca Weiss 15*849ed9d4SLuca Weissproperties: 16*849ed9d4SLuca Weiss compatible: 17*849ed9d4SLuca Weiss oneOf: 18*849ed9d4SLuca Weiss - enum: 19*849ed9d4SLuca Weiss - qcom,msm8974-hfpll 20*849ed9d4SLuca Weiss - qcom,msm8976-hfpll-a53 21*849ed9d4SLuca Weiss - qcom,msm8976-hfpll-a72 22*849ed9d4SLuca Weiss - qcom,msm8976-hfpll-cci 23*849ed9d4SLuca Weiss - qcom,qcs404-hfpll 24*849ed9d4SLuca Weiss - const: qcom,hfpll 25*849ed9d4SLuca Weiss deprecated: true 26*849ed9d4SLuca Weiss 27*849ed9d4SLuca Weiss reg: 28*849ed9d4SLuca Weiss items: 29*849ed9d4SLuca Weiss - description: HFPLL registers 30*849ed9d4SLuca Weiss - description: Alias register region 31*849ed9d4SLuca Weiss minItems: 1 32*849ed9d4SLuca Weiss 33*849ed9d4SLuca Weiss '#clock-cells': 34*849ed9d4SLuca Weiss const: 0 35*849ed9d4SLuca Weiss 36*849ed9d4SLuca Weiss clocks: 37*849ed9d4SLuca Weiss items: 38*849ed9d4SLuca Weiss - description: board XO clock 39*849ed9d4SLuca Weiss 40*849ed9d4SLuca Weiss clock-names: 41*849ed9d4SLuca Weiss items: 42*849ed9d4SLuca Weiss - const: xo 43*849ed9d4SLuca Weiss 44*849ed9d4SLuca Weiss clock-output-names: 45*849ed9d4SLuca Weiss description: 46*849ed9d4SLuca Weiss Name of the PLL. Typically hfpllX where X is a CPU number starting at 0. 47*849ed9d4SLuca Weiss Otherwise hfpll_Y where Y is more specific such as "l2". 48*849ed9d4SLuca Weiss maxItems: 1 49*849ed9d4SLuca Weiss 50*849ed9d4SLuca Weissrequired: 51*849ed9d4SLuca Weiss - compatible 52*849ed9d4SLuca Weiss - reg 53*849ed9d4SLuca Weiss - '#clock-cells' 54*849ed9d4SLuca Weiss - clocks 55*849ed9d4SLuca Weiss - clock-names 56*849ed9d4SLuca Weiss - clock-output-names 57*849ed9d4SLuca Weiss 58*849ed9d4SLuca WeissadditionalProperties: false 59*849ed9d4SLuca Weiss 60*849ed9d4SLuca Weissexamples: 61*849ed9d4SLuca Weiss - | 62*849ed9d4SLuca Weiss clock-controller@f908a000 { 63*849ed9d4SLuca Weiss compatible = "qcom,msm8974-hfpll"; 64*849ed9d4SLuca Weiss reg = <0xf908a000 0x30>, <0xf900a000 0x30>; 65*849ed9d4SLuca Weiss #clock-cells = <0>; 66*849ed9d4SLuca Weiss clock-output-names = "hfpll0"; 67*849ed9d4SLuca Weiss clocks = <&xo_board>; 68*849ed9d4SLuca Weiss clock-names = "xo"; 69*849ed9d4SLuca Weiss }; 70