1 /* 2 * (C) Copyright IBM Corporation 2006 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 */ 24 25 /** 26 * \file common_interface.c 27 * Platform independent interface glue. 28 * 29 * \author Ian Romanick <[email protected]> 30 */ 31 32 #include <stdlib.h> 33 #include <string.h> 34 #include <errno.h> 35 36 #include "pciaccess.h" 37 #include "pciaccess_private.h" 38 39 #if defined(__linux__) || defined(__GLIBC__) 40 #include <byteswap.h> 41 42 #if __BYTE_ORDER == __BIG_ENDIAN 43 # define LETOH_16(x) bswap_16(x) 44 # define HTOLE_16(x) bswap_16(x) 45 # define LETOH_32(x) bswap_32(x) 46 # define HTOLE_32(x) bswap_32(x) 47 #else 48 # define LETOH_16(x) (x) 49 # define HTOLE_16(x) (x) 50 # define LETOH_32(x) (x) 51 # define HTOLE_32(x) (x) 52 #endif /* linux */ 53 54 #elif defined(__sun) 55 #define LETOH_16(x) (x) 56 #define HTOLE_16(x) (x) 57 #define LETOH_32(x) (x) 58 #define HTOLE_32(x) (x) 59 60 #else 61 62 #include <sys/endian.h> 63 64 #define HTOLE_16(x) htole16(x) 65 #define HTOLE_32(x) htole32(x) 66 67 #ifdef __FreeBSD__ 68 #define LETOH_16(x) le16toh(x) 69 #define LETOH_32(x) le32toh(x) 70 #else 71 #define LETOH_16(x) letoh16(x) 72 #define LETOH_32(x) letoh32(x) 73 #endif 74 75 #endif /* others */ 76 77 /** 78 * Read a device's expansion ROM. 79 * 80 * Reads the device's expansion ROM and stores the data in the memory pointed 81 * to by \c buffer. The buffer must be at least \c pci_device::rom_size 82 * bytes. 83 * 84 * \param dev Device whose expansion ROM is to be read. 85 * \param buffer Memory in which to store the ROM. 86 * 87 * \return 88 * Zero on success or an \c errno value on failure. 89 */ 90 int 91 pci_device_read_rom( struct pci_device * dev, void * buffer ) 92 { 93 if ( (dev == NULL) || (buffer == NULL) ) { 94 return EFAULT; 95 } 96 97 98 return (pci_sys->methods->read_rom)( dev, buffer ); 99 } 100 101 102 /** 103 * Probe a PCI device to learn information about the device. 104 * 105 * Probes a PCI device to learn various information about the device. Before 106 * calling this function, the only public fields in the \c pci_device 107 * structure that have valid values are \c pci_device::domain, 108 * \c pci_device::bus, \c pci_device::dev, and \c pci_device::func. 109 * 110 * \param dev Device to be probed. 111 * 112 * \return 113 * Zero on succes or an \c errno value on failure. 114 */ 115 int 116 pci_device_probe( struct pci_device * dev ) 117 { 118 if ( dev == NULL ) { 119 return EFAULT; 120 } 121 122 123 return (pci_sys->methods->probe)( dev ); 124 } 125 126 127 /** 128 * Map the specified BAR so that it can be accessed by the CPU. 129 * 130 * Maps the specified BAR for acces by the processor. The pointer to the 131 * mapped region is stored in the \c pci_mem_region::memory pointer for the 132 * BAR. 133 * 134 * \param dev Device whose memory region is to be mapped. 135 * \param region Region, on the range [0, 5], that is to be mapped. 136 * \param write_enable Map for writing (non-zero). 137 * 138 * \return 139 * Zero on success or an \c errno value on failure. 140 * 141 * \sa pci_device_map_range, pci_device_unmap_range 142 * \deprecated 143 */ 144 int 145 pci_device_map_region(struct pci_device * dev, unsigned region, 146 int write_enable) 147 { 148 const unsigned map_flags = 149 (write_enable) ? PCI_DEV_MAP_FLAG_WRITABLE : 0; 150 151 if ((region > 5) || (dev->regions[region].size == 0)) { 152 return ENOENT; 153 } 154 155 if (dev->regions[region].memory != NULL) { 156 return 0; 157 } 158 159 return pci_device_map_range(dev, dev->regions[region].base_addr, 160 dev->regions[region].size, map_flags, 161 &dev->regions[region].memory); 162 } 163 164 165 /** 166 * Map the specified memory range so that it can be accessed by the CPU. 167 * 168 * Maps the specified memory range for access by the processor. The pointer 169 * to the mapped region is stored in \c addr. In addtion, the 170 * \c pci_mem_region::memory pointer for the BAR will be updated. 171 * 172 * \param dev Device whose memory region is to be mapped. 173 * \param base Base address of the range to be mapped. 174 * \param size Size of the range to be mapped. 175 * \param write_enable Map for writing (non-zero). 176 * \param addr Location to store the mapped address. 177 * 178 * \return 179 * Zero on success or an \c errno value on failure. 180 * 181 * \sa pci_device_map_range 182 */ 183 int pci_device_map_memory_range(struct pci_device *dev, 184 pciaddr_t base, pciaddr_t size, 185 int write_enable, void **addr) 186 { 187 return pci_device_map_range(dev, base, size, 188 (write_enable) ? PCI_DEV_MAP_FLAG_WRITABLE : 0, 189 addr); 190 } 191 192 193 /** 194 * Map the specified memory range so that it can be accessed by the CPU. 195 * 196 * Maps the specified memory range for access by the processor. The pointer 197 * to the mapped region is stored in \c addr. In addtion, the 198 * \c pci_mem_region::memory pointer for the BAR will be updated. 199 * 200 * \param dev Device whose memory region is to be mapped. 201 * \param base Base address of the range to be mapped. 202 * \param size Size of the range to be mapped. 203 * \param map_flags Flag bits controlling how the mapping is accessed. 204 * \param addr Location to store the mapped address. 205 * 206 * \return 207 * Zero on success or an \c errno value on failure. 208 * 209 * \sa pci_device_unmap_range 210 */ 211 int 212 pci_device_map_range(struct pci_device *dev, pciaddr_t base, 213 pciaddr_t size, unsigned map_flags, 214 void **addr) 215 { 216 struct pci_device_private *const devp = 217 (struct pci_device_private *) dev; 218 struct pci_device_mapping *mappings; 219 unsigned region; 220 unsigned i; 221 int err = 0; 222 223 224 *addr = NULL; 225 226 if (dev == NULL) { 227 return EFAULT; 228 } 229 230 231 for (region = 0; region < 6; region++) { 232 const struct pci_mem_region const* r = &dev->regions[region]; 233 234 if (r->size != 0) { 235 if ((r->base_addr <= base) && ((r->base_addr + r->size) > base)) { 236 if ((base + size) > (r->base_addr + r->size)) { 237 return E2BIG; 238 } 239 240 break; 241 } 242 } 243 } 244 245 if (region > 5) { 246 return ENOENT; 247 } 248 249 /* Make sure that there isn't already a mapping with the same base and 250 * size. 251 */ 252 for (i = 0; i < devp->num_mappings; i++) { 253 if ((devp->mappings[i].base == base) 254 && (devp->mappings[i].size == size)) { 255 return EINVAL; 256 } 257 } 258 259 260 mappings = realloc(devp->mappings, 261 (sizeof(devp->mappings[0]) * (devp->num_mappings + 1))); 262 if (mappings == NULL) { 263 return ENOMEM; 264 } 265 266 mappings[devp->num_mappings].base = base; 267 mappings[devp->num_mappings].size = size; 268 mappings[devp->num_mappings].region = region; 269 mappings[devp->num_mappings].flags = map_flags; 270 mappings[devp->num_mappings].memory = NULL; 271 272 if (dev->regions[region].memory == NULL) { 273 err = (*pci_sys->methods->map_range)(dev, 274 &mappings[devp->num_mappings]); 275 } 276 277 if (err == 0) { 278 *addr = mappings[devp->num_mappings].memory; 279 devp->num_mappings++; 280 } else { 281 mappings = realloc(devp->mappings, 282 (sizeof(devp->mappings[0]) * devp->num_mappings)); 283 } 284 285 devp->mappings = mappings; 286 287 return err; 288 } 289 290 291 /** 292 * Unmap the specified BAR so that it can no longer be accessed by the CPU. 293 * 294 * Unmaps the specified BAR that was previously mapped via 295 * \c pci_device_map_region. 296 * 297 * \param dev Device whose memory region is to be mapped. 298 * \param region Region, on the range [0, 5], that is to be mapped. 299 * 300 * \return 301 * Zero on success or an \c errno value on failure. 302 * 303 * \sa pci_device_map_range, pci_device_unmap_range 304 * \deprecated 305 */ 306 int 307 pci_device_unmap_region( struct pci_device * dev, unsigned region ) 308 { 309 int err; 310 311 if (dev == NULL) { 312 return EFAULT; 313 } 314 315 if ((region > 5) || (dev->regions[region].size == 0)) { 316 return ENOENT; 317 } 318 319 err = pci_device_unmap_range(dev, dev->regions[region].memory, 320 dev->regions[region].size); 321 if (!err) { 322 dev->regions[region].memory = NULL; 323 } 324 325 return err; 326 } 327 328 329 /** 330 * Unmap the specified memory range so that it can no longer be accessed by the CPU. 331 * 332 * Unmaps the specified memory range that was previously mapped via 333 * \c pci_device_map_memory_range. 334 * 335 * \param dev Device whose memory is to be unmapped. 336 * \param memory Pointer to the base of the mapped range. 337 * \param size Size, in bytes, of the range to be unmapped. 338 * 339 * \return 340 * Zero on success or an \c errno value on failure. 341 * 342 * \sa pci_device_map_range, pci_device_unmap_range 343 * \deprecated 344 */ 345 int 346 pci_device_unmap_memory_range(struct pci_device *dev, void *memory, 347 pciaddr_t size) 348 { 349 return pci_device_unmap_range(dev, memory, size); 350 } 351 352 353 /** 354 * Unmap the specified memory range so that it can no longer be accessed by the CPU. 355 * 356 * Unmaps the specified memory range that was previously mapped via 357 * \c pci_device_map_memory_range. 358 * 359 * \param dev Device whose memory is to be unmapped. 360 * \param memory Pointer to the base of the mapped range. 361 * \param size Size, in bytes, of the range to be unmapped. 362 * 363 * \return 364 * Zero on success or an \c errno value on failure. 365 * 366 * \sa pci_device_map_range 367 */ 368 int 369 pci_device_unmap_range(struct pci_device *dev, void *memory, 370 pciaddr_t size) 371 { 372 struct pci_device_private *const devp = 373 (struct pci_device_private *) dev; 374 unsigned i; 375 int err; 376 377 378 if (dev == NULL) { 379 return EFAULT; 380 } 381 382 for (i = 0; i < devp->num_mappings; i++) { 383 if ((devp->mappings[i].memory == memory) 384 && (devp->mappings[i].size == size)) { 385 break; 386 } 387 } 388 389 if (i == devp->num_mappings) { 390 return ENOENT; 391 } 392 393 394 err = (*pci_sys->methods->unmap_range)(dev, &devp->mappings[i]); 395 if (!err) { 396 const unsigned entries_to_move = (devp->num_mappings - i) - 1; 397 398 if (entries_to_move > 0) { 399 (void) memmove(&devp->mappings[i], 400 &devp->mappings[i + 1], 401 entries_to_move * sizeof(devp->mappings[0])); 402 } 403 404 devp->num_mappings--; 405 devp->mappings = realloc(devp->mappings, 406 (sizeof(devp->mappings[0]) * devp->num_mappings)); 407 } 408 409 return err; 410 } 411 412 413 /** 414 * Read arbitrary bytes from device's PCI config space 415 * 416 * Reads data from the device's PCI configuration space. As with the system 417 * read command, less data may be returned, without an error, than was 418 * requested. This is particuarly the case if a non-root user tries to read 419 * beyond the first 64-bytes of configuration space. 420 * 421 * \param dev Device whose PCI configuration data is to be read. 422 * \param data Location to store the data 423 * \param offset Initial byte offset to read 424 * \param size Total number of bytes to read 425 * \param bytes_read Location to store the actual number of bytes read. This 426 * pointer may be \c NULL. 427 * 428 * \returns 429 * Zero on success or an errno value on failure. 430 * 431 * \note 432 * Data read from PCI configuartion space using this routine is \b not 433 * byte-swapped to the host's byte order. PCI configuration data is always 434 * stored in little-endian order, and that is what this routine returns. 435 */ 436 int 437 pci_device_cfg_read( struct pci_device * dev, void * data, 438 pciaddr_t offset, pciaddr_t size, 439 pciaddr_t * bytes_read ) 440 { 441 pciaddr_t scratch; 442 443 if ( (dev == NULL) || (data == NULL) ) { 444 return EFAULT; 445 } 446 447 return pci_sys->methods->read( dev, data, offset, size, 448 (bytes_read == NULL) 449 ? & scratch : bytes_read ); 450 } 451 452 453 int 454 pci_device_cfg_read_u8( struct pci_device * dev, uint8_t * data, 455 pciaddr_t offset ) 456 { 457 pciaddr_t bytes; 458 int err = pci_device_cfg_read( dev, data, offset, 1, & bytes ); 459 460 if ( (err == 0) && (bytes != 1) ) { 461 err = ENXIO; 462 } 463 464 return err; 465 } 466 467 468 int 469 pci_device_cfg_read_u16( struct pci_device * dev, uint16_t * data, 470 pciaddr_t offset ) 471 { 472 pciaddr_t bytes; 473 int err = pci_device_cfg_read( dev, data, offset, 2, & bytes ); 474 475 if ( (err == 0) && (bytes != 2) ) { 476 err = ENXIO; 477 } 478 479 *data = LETOH_16( *data ); 480 return err; 481 } 482 483 484 int 485 pci_device_cfg_read_u32( struct pci_device * dev, uint32_t * data, 486 pciaddr_t offset ) 487 { 488 pciaddr_t bytes; 489 int err = pci_device_cfg_read( dev, data, offset, 4, & bytes ); 490 491 if ( (err == 0) && (bytes != 4) ) { 492 err = ENXIO; 493 } 494 495 *data = LETOH_32( *data ); 496 return err; 497 } 498 499 500 /** 501 * Write arbitrary bytes to device's PCI config space 502 * 503 * Writess data to the device's PCI configuration space. As with the system 504 * write command, less data may be written, without an error, than was 505 * requested. 506 * 507 * \param dev Device whose PCI configuration data is to be written. 508 * \param data Location of the source data 509 * \param offset Initial byte offset to write 510 * \param size Total number of bytes to write 511 * \param bytes_read Location to store the actual number of bytes written. 512 * This pointer may be \c NULL. 513 * 514 * \returns 515 * Zero on success or an errno value on failure. 516 * 517 * \note 518 * Data written to PCI configuartion space using this routine is \b not 519 * byte-swapped from the host's byte order. PCI configuration data is always 520 * stored in little-endian order, so data written with this routine should be 521 * put in that order in advance. 522 */ 523 int 524 pci_device_cfg_write( struct pci_device * dev, const void * data, 525 pciaddr_t offset, pciaddr_t size, 526 pciaddr_t * bytes_written ) 527 { 528 pciaddr_t scratch; 529 530 if ( (dev == NULL) || (data == NULL) ) { 531 return EFAULT; 532 } 533 534 return pci_sys->methods->write( dev, data, offset, size, 535 (bytes_written == NULL) 536 ? & scratch : bytes_written ); 537 } 538 539 540 int 541 pci_device_cfg_write_u8(struct pci_device *dev, uint8_t data, 542 pciaddr_t offset) 543 { 544 pciaddr_t bytes; 545 int err = pci_device_cfg_write(dev, & data, offset, 1, & bytes); 546 547 if ( (err == 0) && (bytes != 1) ) { 548 err = ENOSPC; 549 } 550 551 552 return err; 553 } 554 555 556 int 557 pci_device_cfg_write_u16(struct pci_device *dev, uint16_t data, 558 pciaddr_t offset) 559 { 560 pciaddr_t bytes; 561 const uint16_t temp = HTOLE_16(data); 562 int err = pci_device_cfg_write( dev, & temp, offset, 2, & bytes ); 563 564 if ( (err == 0) && (bytes != 2) ) { 565 err = ENOSPC; 566 } 567 568 569 return err; 570 } 571 572 573 int 574 pci_device_cfg_write_u32(struct pci_device *dev, uint32_t data, 575 pciaddr_t offset) 576 { 577 pciaddr_t bytes; 578 const uint32_t temp = HTOLE_32(data); 579 int err = pci_device_cfg_write( dev, & temp, offset, 4, & bytes ); 580 581 if ( (err == 0) && (bytes != 4) ) { 582 err = ENOSPC; 583 } 584 585 586 return err; 587 } 588 589 590 int 591 pci_device_cfg_write_bits( struct pci_device * dev, uint32_t mask, 592 uint32_t data, pciaddr_t offset ) 593 { 594 uint32_t temp; 595 int err; 596 597 err = pci_device_cfg_read_u32( dev, & temp, offset ); 598 if ( ! err ) { 599 temp &= ~mask; 600 temp |= data; 601 602 err = pci_device_cfg_write_u32(dev, temp, offset); 603 } 604 605 return err; 606 } 607