1 /* 2 * (C) Copyright IBM Corporation 2006 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 */ 24 25 /** 26 * \file common_interface.c 27 * Platform independent interface glue. 28 * 29 * \author Ian Romanick <[email protected]> 30 */ 31 32 #include <stdlib.h> 33 #include <string.h> 34 #include <errno.h> 35 36 #include "pciaccess.h" 37 #include "pciaccess_private.h" 38 39 #ifdef __linux__ 40 #include <byteswap.h> 41 42 #if __BYTE_ORDER == __BIG_ENDIAN 43 # define LETOH_16(x) bswap_16(x) 44 # define HTOLE_16(x) bswap_16(x) 45 # define LETOH_32(x) bswap_32(x) 46 # define HTOLE_32(x) bswap_32(x) 47 #else 48 # define LETOH_16(x) (x) 49 # define HTOLE_16(x) (x) 50 # define LETOH_32(x) (x) 51 # define HTOLE_32(x) (x) 52 #endif /* linux */ 53 54 #elif defined(__sun) 55 #define LETOH_16(x) (x) 56 #define HTOLE_16(x) (x) 57 #define LETOH_32(x) (x) 58 #define HTOLE_32(x) (x) 59 60 #else 61 62 #include <sys/endian.h> 63 64 #define LETOH_16(x) le16toh(x) 65 #define HTOLE_16(x) htole16(x) 66 #define LETOH_32(x) le32toh(x) 67 #define HTOLE_32(x) htole32(x) 68 69 #endif /* others */ 70 71 /** 72 * Read a device's expansion ROM. 73 * 74 * Reads the device's expansion ROM and stores the data in the memory pointed 75 * to by \c buffer. The buffer must be at least \c pci_device::rom_size 76 * bytes. 77 * 78 * \param dev Device whose expansion ROM is to be read. 79 * \param buffer Memory in which to store the ROM. 80 * 81 * \return 82 * Zero on success or an \c errno value on failure. 83 */ 84 int 85 pci_device_read_rom( struct pci_device * dev, void * buffer ) 86 { 87 if ( (dev == NULL) || (buffer == NULL) ) { 88 return EFAULT; 89 } 90 91 92 return (pci_sys->methods->read_rom)( dev, buffer ); 93 } 94 95 96 /** 97 * Probe a PCI device to learn information about the device. 98 * 99 * Probes a PCI device to learn various information about the device. Before 100 * calling this function, the only public fields in the \c pci_device 101 * structure that have valid values are \c pci_device::domain, 102 * \c pci_device::bus, \c pci_device::dev, and \c pci_device::func. 103 * 104 * \param dev Device to be probed. 105 * 106 * \return 107 * Zero on succes or an \c errno value on failure. 108 */ 109 int 110 pci_device_probe( struct pci_device * dev ) 111 { 112 if ( dev == NULL ) { 113 return EFAULT; 114 } 115 116 117 return (pci_sys->methods->probe)( dev ); 118 } 119 120 121 /** 122 * Map the specified BAR so that it can be accessed by the CPU. 123 * 124 * Maps the specified BAR for acces by the processor. The pointer to the 125 * mapped region is stored in the \c pci_mem_region::memory pointer for the 126 * BAR. 127 * 128 * \param dev Device whose memory region is to be mapped. 129 * \param region Region, on the range [0, 5], that is to be mapped. 130 * \param write_enable Map for writing (non-zero). 131 * 132 * \return 133 * Zero on success or an \c errno value on failure. 134 * 135 * \sa pci_device_map_range, pci_device_unmap_range 136 * \deprecated 137 */ 138 int 139 pci_device_map_region(struct pci_device * dev, unsigned region, 140 int write_enable) 141 { 142 const unsigned map_flags = 143 (write_enable) ? PCI_DEV_MAP_FLAG_WRITABLE : 0; 144 145 if ((region > 5) || (dev->regions[region].size == 0)) { 146 return ENOENT; 147 } 148 149 if (dev->regions[region].memory != NULL) { 150 return 0; 151 } 152 153 return pci_device_map_range(dev, dev->regions[region].base_addr, 154 dev->regions[region].size, map_flags, 155 &dev->regions[region].memory); 156 } 157 158 159 /** 160 * Map the specified memory range so that it can be accessed by the CPU. 161 * 162 * Maps the specified memory range for access by the processor. The pointer 163 * to the mapped region is stored in \c addr. In addtion, the 164 * \c pci_mem_region::memory pointer for the BAR will be updated. 165 * 166 * \param dev Device whose memory region is to be mapped. 167 * \param base Base address of the range to be mapped. 168 * \param size Size of the range to be mapped. 169 * \param write_enable Map for writing (non-zero). 170 * \param addr Location to store the mapped address. 171 * 172 * \return 173 * Zero on success or an \c errno value on failure. 174 * 175 * \sa pci_device_map_range 176 */ 177 int pci_device_map_memory_range(struct pci_device *dev, 178 pciaddr_t base, pciaddr_t size, 179 int write_enable, void **addr) 180 { 181 return pci_device_map_range(dev, base, size, 182 (write_enable) ? PCI_DEV_MAP_FLAG_WRITABLE : 0, 183 addr); 184 } 185 186 187 /** 188 * Map the specified memory range so that it can be accessed by the CPU. 189 * 190 * Maps the specified memory range for access by the processor. The pointer 191 * to the mapped region is stored in \c addr. In addtion, the 192 * \c pci_mem_region::memory pointer for the BAR will be updated. 193 * 194 * \param dev Device whose memory region is to be mapped. 195 * \param base Base address of the range to be mapped. 196 * \param size Size of the range to be mapped. 197 * \param map_flags Flag bits controlling how the mapping is accessed. 198 * \param addr Location to store the mapped address. 199 * 200 * \return 201 * Zero on success or an \c errno value on failure. 202 * 203 * \sa pci_device_unmap_range 204 */ 205 int 206 pci_device_map_range(struct pci_device *dev, pciaddr_t base, 207 pciaddr_t size, unsigned map_flags, 208 void **addr) 209 { 210 struct pci_device_private *const devp = 211 (struct pci_device_private *) dev; 212 struct pci_device_mapping *mappings; 213 unsigned region; 214 unsigned i; 215 int err = 0; 216 217 218 *addr = NULL; 219 220 if (dev == NULL) { 221 return EFAULT; 222 } 223 224 225 for (region = 0; region < 6; region++) { 226 const struct pci_mem_region const* r = &dev->regions[region]; 227 228 if (r->size != 0) { 229 if ((r->base_addr <= base) && ((r->base_addr + r->size) > base)) { 230 if ((base + size) > (r->base_addr + r->size)) { 231 return E2BIG; 232 } 233 234 break; 235 } 236 } 237 } 238 239 if (region > 5) { 240 return ENOENT; 241 } 242 243 /* Make sure that there isn't already a mapping with the same base and 244 * size. 245 */ 246 for (i = 0; i < devp->num_mappings; i++) { 247 if ((devp->mappings[i].base == base) 248 && (devp->mappings[i].size == size)) { 249 return EINVAL; 250 } 251 } 252 253 254 mappings = realloc(devp->mappings, 255 (sizeof(devp->mappings[0]) * (devp->num_mappings + 1))); 256 if (mappings == NULL) { 257 return ENOMEM; 258 } 259 260 mappings[devp->num_mappings].base = base; 261 mappings[devp->num_mappings].size = size; 262 mappings[devp->num_mappings].region = region; 263 mappings[devp->num_mappings].flags = map_flags; 264 mappings[devp->num_mappings].memory = NULL; 265 266 if (dev->regions[region].memory == NULL) { 267 err = (*pci_sys->methods->map_range)(dev, 268 &mappings[devp->num_mappings]); 269 } 270 271 if (err == 0) { 272 *addr = mappings[devp->num_mappings].memory; 273 devp->num_mappings++; 274 } else { 275 mappings = realloc(devp->mappings, 276 (sizeof(devp->mappings[0]) * devp->num_mappings)); 277 } 278 279 devp->mappings = mappings; 280 281 return err; 282 } 283 284 285 /** 286 * Unmap the specified BAR so that it can no longer be accessed by the CPU. 287 * 288 * Unmaps the specified BAR that was previously mapped via 289 * \c pci_device_map_region. 290 * 291 * \param dev Device whose memory region is to be mapped. 292 * \param region Region, on the range [0, 5], that is to be mapped. 293 * 294 * \return 295 * Zero on success or an \c errno value on failure. 296 * 297 * \sa pci_device_map_range, pci_device_unmap_range 298 * \deprecated 299 */ 300 int 301 pci_device_unmap_region( struct pci_device * dev, unsigned region ) 302 { 303 int err; 304 305 if (dev == NULL) { 306 return EFAULT; 307 } 308 309 if ((region > 5) || (dev->regions[region].size == 0)) { 310 return ENOENT; 311 } 312 313 err = pci_device_unmap_range(dev, dev->regions[region].memory, 314 dev->regions[region].size); 315 if (!err) { 316 dev->regions[region].memory = NULL; 317 } 318 319 return err; 320 } 321 322 323 /** 324 * Unmap the specified memory range so that it can no longer be accessed by the CPU. 325 * 326 * Unmaps the specified memory range that was previously mapped via 327 * \c pci_device_map_memory_range. 328 * 329 * \param dev Device whose memory is to be unmapped. 330 * \param memory Pointer to the base of the mapped range. 331 * \param size Size, in bytes, of the range to be unmapped. 332 * 333 * \return 334 * Zero on success or an \c errno value on failure. 335 * 336 * \sa pci_device_map_range, pci_device_unmap_range 337 * \deprecated 338 */ 339 int 340 pci_device_unmap_memory_range(struct pci_device *dev, void *memory, 341 pciaddr_t size) 342 { 343 return pci_device_unmap_range(dev, memory, size); 344 } 345 346 347 /** 348 * Unmap the specified memory range so that it can no longer be accessed by the CPU. 349 * 350 * Unmaps the specified memory range that was previously mapped via 351 * \c pci_device_map_memory_range. 352 * 353 * \param dev Device whose memory is to be unmapped. 354 * \param memory Pointer to the base of the mapped range. 355 * \param size Size, in bytes, of the range to be unmapped. 356 * 357 * \return 358 * Zero on success or an \c errno value on failure. 359 * 360 * \sa pci_device_map_range 361 */ 362 int 363 pci_device_unmap_range(struct pci_device *dev, void *memory, 364 pciaddr_t size) 365 { 366 struct pci_device_private *const devp = 367 (struct pci_device_private *) dev; 368 unsigned i; 369 int err; 370 371 372 if (dev == NULL) { 373 return EFAULT; 374 } 375 376 for (i = 0; i < devp->num_mappings; i++) { 377 if ((devp->mappings[i].memory == memory) 378 && (devp->mappings[i].size == size)) { 379 break; 380 } 381 } 382 383 if (i == devp->num_mappings) { 384 return ENOENT; 385 } 386 387 388 err = (*pci_sys->methods->unmap_range)(dev, &devp->mappings[i]); 389 if (!err) { 390 const unsigned entries_to_move = (devp->num_mappings - i) - 1; 391 392 if (entries_to_move > 0) { 393 (void) memmove(&devp->mappings[i], 394 &devp->mappings[i + 1], 395 entries_to_move * sizeof(devp->mappings[0])); 396 } 397 398 devp->num_mappings--; 399 devp->mappings = realloc(devp->mappings, 400 (sizeof(devp->mappings[0]) * devp->num_mappings)); 401 } 402 403 return err; 404 } 405 406 407 /** 408 * Read arbitrary bytes from device's PCI config space 409 * 410 * Reads data from the device's PCI configuration space. As with the system 411 * read command, less data may be returned, without an error, than was 412 * requested. This is particuarly the case if a non-root user tries to read 413 * beyond the first 64-bytes of configuration space. 414 * 415 * \param dev Device whose PCI configuration data is to be read. 416 * \param data Location to store the data 417 * \param offset Initial byte offset to read 418 * \param size Total number of bytes to read 419 * \param bytes_read Location to store the actual number of bytes read. This 420 * pointer may be \c NULL. 421 * 422 * \returns 423 * Zero on success or an errno value on failure. 424 * 425 * \note 426 * Data read from PCI configuartion space using this routine is \b not 427 * byte-swapped to the host's byte order. PCI configuration data is always 428 * stored in little-endian order, and that is what this routine returns. 429 */ 430 int 431 pci_device_cfg_read( struct pci_device * dev, void * data, 432 pciaddr_t offset, pciaddr_t size, 433 pciaddr_t * bytes_read ) 434 { 435 pciaddr_t scratch; 436 437 if ( (dev == NULL) || (data == NULL) ) { 438 return EFAULT; 439 } 440 441 return pci_sys->methods->read( dev, data, offset, size, 442 (bytes_read == NULL) 443 ? & scratch : bytes_read ); 444 } 445 446 447 int 448 pci_device_cfg_read_u8( struct pci_device * dev, uint8_t * data, 449 pciaddr_t offset ) 450 { 451 pciaddr_t bytes; 452 int err = pci_device_cfg_read( dev, data, offset, 1, & bytes ); 453 454 if ( (err == 0) && (bytes != 1) ) { 455 err = ENXIO; 456 } 457 458 return err; 459 } 460 461 462 int 463 pci_device_cfg_read_u16( struct pci_device * dev, uint16_t * data, 464 pciaddr_t offset ) 465 { 466 pciaddr_t bytes; 467 int err = pci_device_cfg_read( dev, data, offset, 2, & bytes ); 468 469 if ( (err == 0) && (bytes != 2) ) { 470 err = ENXIO; 471 } 472 473 *data = LETOH_16( *data ); 474 return err; 475 } 476 477 478 int 479 pci_device_cfg_read_u32( struct pci_device * dev, uint32_t * data, 480 pciaddr_t offset ) 481 { 482 pciaddr_t bytes; 483 int err = pci_device_cfg_read( dev, data, offset, 4, & bytes ); 484 485 if ( (err == 0) && (bytes != 4) ) { 486 err = ENXIO; 487 } 488 489 *data = LETOH_32( *data ); 490 return err; 491 } 492 493 494 /** 495 * Write arbitrary bytes to device's PCI config space 496 * 497 * Writess data to the device's PCI configuration space. As with the system 498 * write command, less data may be written, without an error, than was 499 * requested. 500 * 501 * \param dev Device whose PCI configuration data is to be written. 502 * \param data Location of the source data 503 * \param offset Initial byte offset to write 504 * \param size Total number of bytes to write 505 * \param bytes_read Location to store the actual number of bytes written. 506 * This pointer may be \c NULL. 507 * 508 * \returns 509 * Zero on success or an errno value on failure. 510 * 511 * \note 512 * Data written to PCI configuartion space using this routine is \b not 513 * byte-swapped from the host's byte order. PCI configuration data is always 514 * stored in little-endian order, so data written with this routine should be 515 * put in that order in advance. 516 */ 517 int 518 pci_device_cfg_write( struct pci_device * dev, const void * data, 519 pciaddr_t offset, pciaddr_t size, 520 pciaddr_t * bytes_written ) 521 { 522 pciaddr_t scratch; 523 524 if ( (dev == NULL) || (data == NULL) ) { 525 return EFAULT; 526 } 527 528 return pci_sys->methods->write( dev, data, offset, size, 529 (bytes_written == NULL) 530 ? & scratch : bytes_written ); 531 } 532 533 534 int 535 pci_device_cfg_write_u8(struct pci_device *dev, uint8_t data, 536 pciaddr_t offset) 537 { 538 pciaddr_t bytes; 539 int err = pci_device_cfg_write(dev, & data, offset, 1, & bytes); 540 541 if ( (err == 0) && (bytes != 1) ) { 542 err = ENOSPC; 543 } 544 545 546 return err; 547 } 548 549 550 int 551 pci_device_cfg_write_u16(struct pci_device *dev, uint16_t data, 552 pciaddr_t offset) 553 { 554 pciaddr_t bytes; 555 const uint16_t temp = HTOLE_16(data); 556 int err = pci_device_cfg_write( dev, & temp, offset, 2, & bytes ); 557 558 if ( (err == 0) && (bytes != 2) ) { 559 err = ENOSPC; 560 } 561 562 563 return err; 564 } 565 566 567 int 568 pci_device_cfg_write_u32(struct pci_device *dev, uint32_t data, 569 pciaddr_t offset) 570 { 571 pciaddr_t bytes; 572 const uint32_t temp = HTOLE_32(data); 573 int err = pci_device_cfg_write( dev, & temp, offset, 4, & bytes ); 574 575 if ( (err == 0) && (bytes != 4) ) { 576 err = ENOSPC; 577 } 578 579 580 return err; 581 } 582 583 584 int 585 pci_device_cfg_write_bits( struct pci_device * dev, uint32_t mask, 586 uint32_t data, pciaddr_t offset ) 587 { 588 uint32_t temp; 589 int err; 590 591 err = pci_device_cfg_read_u32( dev, & temp, offset ); 592 if ( ! err ) { 593 temp &= ~mask; 594 temp |= data; 595 596 err = pci_device_cfg_write_u32(dev, temp, offset); 597 } 598 599 return err; 600 } 601