1a82ab411SLuigi Rizzo /* 2a82ab411SLuigi Rizzo * Copyright (C) 2013-2016 Luigi Rizzo 3a82ab411SLuigi Rizzo * Copyright (C) 2013-2016 Giuseppe Lettieri 4a82ab411SLuigi Rizzo * Copyright (C) 2013-2016 Vincenzo Maffione 5a82ab411SLuigi Rizzo * Copyright (C) 2015 Stefano Garzarella 6a82ab411SLuigi Rizzo * All rights reserved. 7a82ab411SLuigi Rizzo * 8a82ab411SLuigi Rizzo * Redistribution and use in source and binary forms, with or without 9a82ab411SLuigi Rizzo * modification, are permitted provided that the following conditions 10a82ab411SLuigi Rizzo * are met: 11a82ab411SLuigi Rizzo * 1. Redistributions of source code must retain the above copyright 12a82ab411SLuigi Rizzo * notice, this list of conditions and the following disclaimer. 13a82ab411SLuigi Rizzo * 2. Redistributions in binary form must reproduce the above copyright 14a82ab411SLuigi Rizzo * notice, this list of conditions and the following disclaimer in the 15a82ab411SLuigi Rizzo * documentation and/or other materials provided with the distribution. 16a82ab411SLuigi Rizzo * 17a82ab411SLuigi Rizzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18a82ab411SLuigi Rizzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19a82ab411SLuigi Rizzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20a82ab411SLuigi Rizzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21a82ab411SLuigi Rizzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22a82ab411SLuigi Rizzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23a82ab411SLuigi Rizzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24a82ab411SLuigi Rizzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25a82ab411SLuigi Rizzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26a82ab411SLuigi Rizzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27a82ab411SLuigi Rizzo * SUCH DAMAGE. 28a82ab411SLuigi Rizzo * 29a82ab411SLuigi Rizzo * $FreeBSD$ 30a82ab411SLuigi Rizzo */ 31a82ab411SLuigi Rizzo 32a82ab411SLuigi Rizzo #ifndef NETMAP_VIRT_H 33a82ab411SLuigi Rizzo #define NETMAP_VIRT_H 34a82ab411SLuigi Rizzo 35a82ab411SLuigi Rizzo /* 36a82ab411SLuigi Rizzo * ptnetmap_memdev: device used to expose memory into the guest VM 37a82ab411SLuigi Rizzo * 38a82ab411SLuigi Rizzo * These macros are used in the hypervisor frontend (QEMU, bhyve) and in the 39a82ab411SLuigi Rizzo * guest device driver. 40a82ab411SLuigi Rizzo */ 41a82ab411SLuigi Rizzo 42a82ab411SLuigi Rizzo /* PCI identifiers and PCI BARs for the ptnetmap memdev 43a82ab411SLuigi Rizzo * and ptnetmap network interface. */ 44a82ab411SLuigi Rizzo #define PTNETMAP_MEMDEV_NAME "ptnetmap-memdev" 45844a6f0cSLuigi Rizzo #define PTNETMAP_PCI_VENDOR_ID 0x1b36 /* QEMU virtual devices */ 46844a6f0cSLuigi Rizzo #define PTNETMAP_PCI_DEVICE_ID 0x000c /* memory device */ 47844a6f0cSLuigi Rizzo #define PTNETMAP_PCI_NETIF_ID 0x000d /* ptnet network interface */ 48a82ab411SLuigi Rizzo #define PTNETMAP_IO_PCI_BAR 0 49a82ab411SLuigi Rizzo #define PTNETMAP_MEM_PCI_BAR 1 50a82ab411SLuigi Rizzo #define PTNETMAP_MSIX_PCI_BAR 2 51a82ab411SLuigi Rizzo 52a82ab411SLuigi Rizzo /* Registers for the ptnetmap memdev */ 53844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_MEMSIZE_LO 0 /* netmap memory size (low) */ 54844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_MEMSIZE_HI 4 /* netmap_memory_size (high) */ 55844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_MEMID 8 /* memory allocator ID in the host */ 56844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_IF_POOL_OFS 64 57844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_IF_POOL_OBJNUM 68 58844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_IF_POOL_OBJSZ 72 59844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_RING_POOL_OFS 76 60844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_RING_POOL_OBJNUM 80 61844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_RING_POOL_OBJSZ 84 62844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_BUF_POOL_OFS 88 63844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_BUF_POOL_OBJNUM 92 64844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_BUF_POOL_OBJSZ 96 65844a6f0cSLuigi Rizzo #define PTNET_MDEV_IO_END 100 66a82ab411SLuigi Rizzo 67a82ab411SLuigi Rizzo /* 68a82ab411SLuigi Rizzo * ptnetmap configuration 69a82ab411SLuigi Rizzo * 70844a6f0cSLuigi Rizzo * The ptnet kthreads (running in host kernel-space) need to be configured 71844a6f0cSLuigi Rizzo * in order to know how to intercept guest kicks (I/O register writes) and 72844a6f0cSLuigi Rizzo * how to inject MSI-X interrupts to the guest. The configuration may vary 73844a6f0cSLuigi Rizzo * depending on the hypervisor. Currently, we support QEMU/KVM on Linux and 74844a6f0cSLuigi Rizzo * and bhyve on FreeBSD. 75844a6f0cSLuigi Rizzo * The configuration is passed by the hypervisor to the host netmap module 76844a6f0cSLuigi Rizzo * by means of an ioctl() with nr_cmd=NETMAP_PT_HOST_CREATE, and it is 77844a6f0cSLuigi Rizzo * specified by the ptnetmap_cfg struct. This struct contains an header 78844a6f0cSLuigi Rizzo * with general informations and an array of entries whose size depends 79844a6f0cSLuigi Rizzo * on the hypervisor. The NETMAP_PT_HOST_CREATE command is issued every 80844a6f0cSLuigi Rizzo * time the kthreads are started. 81a82ab411SLuigi Rizzo */ 82a82ab411SLuigi Rizzo struct ptnetmap_cfg { 83844a6f0cSLuigi Rizzo #define PTNETMAP_CFGTYPE_QEMU 0x1 84844a6f0cSLuigi Rizzo #define PTNETMAP_CFGTYPE_BHYVE 0x2 85844a6f0cSLuigi Rizzo uint16_t cfgtype; /* how to interpret the cfg entries */ 86844a6f0cSLuigi Rizzo uint16_t entry_size; /* size of a config entry */ 87844a6f0cSLuigi Rizzo uint32_t num_rings; /* number of config entries */ 88*46023447SVincenzo Maffione void *csb_gh; /* CSB for guest --> host communication */ 89*46023447SVincenzo Maffione void *csb_hg; /* CSB for host --> guest communication */ 90844a6f0cSLuigi Rizzo /* Configuration entries are allocated right after the struct. */ 91844a6f0cSLuigi Rizzo }; 92844a6f0cSLuigi Rizzo 93844a6f0cSLuigi Rizzo /* Configuration of a ptnetmap ring for QEMU. */ 94844a6f0cSLuigi Rizzo struct ptnetmap_cfgentry_qemu { 95844a6f0cSLuigi Rizzo uint32_t ioeventfd; /* to intercept guest register access */ 96844a6f0cSLuigi Rizzo uint32_t irqfd; /* to inject guest interrupts */ 97844a6f0cSLuigi Rizzo }; 98844a6f0cSLuigi Rizzo 99844a6f0cSLuigi Rizzo /* Configuration of a ptnetmap ring for bhyve. */ 100844a6f0cSLuigi Rizzo struct ptnetmap_cfgentry_bhyve { 101844a6f0cSLuigi Rizzo uint64_t wchan; /* tsleep() parameter, to wake up kthread */ 102844a6f0cSLuigi Rizzo uint32_t ioctl_fd; /* ioctl fd */ 103844a6f0cSLuigi Rizzo /* ioctl parameters to send irq */ 104844a6f0cSLuigi Rizzo uint32_t ioctl_cmd; 105844a6f0cSLuigi Rizzo /* vmm.ko MSIX parameters for IOCTL */ 106844a6f0cSLuigi Rizzo struct { 107844a6f0cSLuigi Rizzo uint64_t msg_data; 108844a6f0cSLuigi Rizzo uint64_t addr; 109844a6f0cSLuigi Rizzo } ioctl_data; 110a82ab411SLuigi Rizzo }; 111a82ab411SLuigi Rizzo 112a82ab411SLuigi Rizzo /* 113844a6f0cSLuigi Rizzo * Structure filled-in by the kernel when asked for allocator info 114844a6f0cSLuigi Rizzo * through NETMAP_POOLS_INFO_GET. Used by hypervisors supporting 115844a6f0cSLuigi Rizzo * ptnetmap. 116844a6f0cSLuigi Rizzo */ 117844a6f0cSLuigi Rizzo struct netmap_pools_info { 118844a6f0cSLuigi Rizzo uint64_t memsize; /* same as nmr->nr_memsize */ 119844a6f0cSLuigi Rizzo uint32_t memid; /* same as nmr->nr_arg2 */ 120844a6f0cSLuigi Rizzo uint32_t if_pool_offset; 121844a6f0cSLuigi Rizzo uint32_t if_pool_objtotal; 122844a6f0cSLuigi Rizzo uint32_t if_pool_objsize; 123844a6f0cSLuigi Rizzo uint32_t ring_pool_offset; 124844a6f0cSLuigi Rizzo uint32_t ring_pool_objtotal; 125844a6f0cSLuigi Rizzo uint32_t ring_pool_objsize; 126844a6f0cSLuigi Rizzo uint32_t buf_pool_offset; 127844a6f0cSLuigi Rizzo uint32_t buf_pool_objtotal; 128844a6f0cSLuigi Rizzo uint32_t buf_pool_objsize; 129844a6f0cSLuigi Rizzo }; 130844a6f0cSLuigi Rizzo 131844a6f0cSLuigi Rizzo /* 132844a6f0cSLuigi Rizzo * Pass a pointer to a userspace buffer to be passed to kernelspace for write 133844a6f0cSLuigi Rizzo * or read. Used by NETMAP_PT_HOST_CREATE and NETMAP_POOLS_INFO_GET. 134a82ab411SLuigi Rizzo */ 135a82ab411SLuigi Rizzo static inline void 136844a6f0cSLuigi Rizzo nmreq_pointer_put(struct nmreq *nmr, void *userptr) 137a82ab411SLuigi Rizzo { 138844a6f0cSLuigi Rizzo uintptr_t *pp = (uintptr_t *)&nmr->nr_arg1; 139844a6f0cSLuigi Rizzo *pp = (uintptr_t)userptr; 140a82ab411SLuigi Rizzo } 141a82ab411SLuigi Rizzo 142844a6f0cSLuigi Rizzo /* ptnetmap features */ 143844a6f0cSLuigi Rizzo #define PTNETMAP_F_VNET_HDR 1 144a82ab411SLuigi Rizzo 145a82ab411SLuigi Rizzo /* I/O registers for the ptnet device. */ 146a82ab411SLuigi Rizzo #define PTNET_IO_PTFEAT 0 147a82ab411SLuigi Rizzo #define PTNET_IO_PTCTL 4 148844a6f0cSLuigi Rizzo #define PTNET_IO_MAC_LO 8 149844a6f0cSLuigi Rizzo #define PTNET_IO_MAC_HI 12 150*46023447SVincenzo Maffione #define PTNET_IO_CSBBAH 16 /* deprecated */ 151*46023447SVincenzo Maffione #define PTNET_IO_CSBBAL 20 /* deprecated */ 152844a6f0cSLuigi Rizzo #define PTNET_IO_NIFP_OFS 24 153844a6f0cSLuigi Rizzo #define PTNET_IO_NUM_TX_RINGS 28 154844a6f0cSLuigi Rizzo #define PTNET_IO_NUM_RX_RINGS 32 155844a6f0cSLuigi Rizzo #define PTNET_IO_NUM_TX_SLOTS 36 156844a6f0cSLuigi Rizzo #define PTNET_IO_NUM_RX_SLOTS 40 157844a6f0cSLuigi Rizzo #define PTNET_IO_VNET_HDR_LEN 44 158844a6f0cSLuigi Rizzo #define PTNET_IO_HOSTMEMID 48 159*46023447SVincenzo Maffione #define PTNET_IO_CSB_GH_BAH 52 160*46023447SVincenzo Maffione #define PTNET_IO_CSB_GH_BAL 56 161*46023447SVincenzo Maffione #define PTNET_IO_CSB_HG_BAH 60 162*46023447SVincenzo Maffione #define PTNET_IO_CSB_HG_BAL 64 163*46023447SVincenzo Maffione #define PTNET_IO_END 68 164a82ab411SLuigi Rizzo #define PTNET_IO_KICK_BASE 128 165a82ab411SLuigi Rizzo #define PTNET_IO_MASK 0xff 166a82ab411SLuigi Rizzo 167844a6f0cSLuigi Rizzo /* ptnetmap control commands (values for PTCTL register) */ 168844a6f0cSLuigi Rizzo #define PTNETMAP_PTCTL_CREATE 1 169844a6f0cSLuigi Rizzo #define PTNETMAP_PTCTL_DELETE 2 170844a6f0cSLuigi Rizzo 171*46023447SVincenzo Maffione /* ptnetmap synchronization variables shared between guest and host */ 172*46023447SVincenzo Maffione struct ptnet_csb_gh { 173a82ab411SLuigi Rizzo uint32_t head; /* GW+ HR+ the head of the guest netmap_ring */ 174a82ab411SLuigi Rizzo uint32_t cur; /* GW+ HR+ the cur of the guest netmap_ring */ 175a82ab411SLuigi Rizzo uint32_t guest_need_kick; /* GW+ HR+ host-->guest notification enable */ 176a2a74091SLuigi Rizzo uint32_t sync_flags; /* GW+ HR+ the flags of the guest [tx|rx]sync() */ 177*46023447SVincenzo Maffione char pad[48]; /* pad to a 64 bytes cacheline */ 178*46023447SVincenzo Maffione }; 179*46023447SVincenzo Maffione struct ptnet_csb_hg { 180a82ab411SLuigi Rizzo uint32_t hwcur; /* GR+ HW+ the hwcur of the host netmap_kring */ 181a82ab411SLuigi Rizzo uint32_t hwtail; /* GR+ HW+ the hwtail of the host netmap_kring */ 182a82ab411SLuigi Rizzo uint32_t host_need_kick; /* GR+ HW+ guest-->host notification enable */ 183*46023447SVincenzo Maffione char pad[4+48]; 184a82ab411SLuigi Rizzo }; 185a82ab411SLuigi Rizzo 186a2a74091SLuigi Rizzo #ifdef WITH_PTNETMAP_GUEST 187a2a74091SLuigi Rizzo 188a2a74091SLuigi Rizzo /* ptnetmap_memdev routines used to talk with ptnetmap_memdev device driver */ 189a2a74091SLuigi Rizzo struct ptnetmap_memdev; 190844a6f0cSLuigi Rizzo int nm_os_pt_memdev_iomap(struct ptnetmap_memdev *, vm_paddr_t *, void **, 191844a6f0cSLuigi Rizzo uint64_t *); 192a2a74091SLuigi Rizzo void nm_os_pt_memdev_iounmap(struct ptnetmap_memdev *); 193844a6f0cSLuigi Rizzo uint32_t nm_os_pt_memdev_ioread(struct ptnetmap_memdev *, unsigned int); 194a2a74091SLuigi Rizzo 195a2a74091SLuigi Rizzo /* Guest driver: Write kring pointers (cur, head) to the CSB. 196a2a74091SLuigi Rizzo * This routine is coupled with ptnetmap_host_read_kring_csb(). */ 197a2a74091SLuigi Rizzo static inline void 198*46023447SVincenzo Maffione ptnetmap_guest_write_kring_csb(struct ptnet_csb_gh *ptr, uint32_t cur, 199a2a74091SLuigi Rizzo uint32_t head) 200a2a74091SLuigi Rizzo { 201a2a74091SLuigi Rizzo /* 202a2a74091SLuigi Rizzo * We need to write cur and head to the CSB but we cannot do it atomically. 203a2a74091SLuigi Rizzo * There is no way we can prevent the host from reading the updated value 204a2a74091SLuigi Rizzo * of one of the two and the old value of the other. However, if we make 205a2a74091SLuigi Rizzo * sure that the host never reads a value of head more recent than the 206a2a74091SLuigi Rizzo * value of cur we are safe. We can allow the host to read a value of cur 207a2a74091SLuigi Rizzo * more recent than the value of head, since in the netmap ring cur can be 208a2a74091SLuigi Rizzo * ahead of head and cur cannot wrap around head because it must be behind 209a2a74091SLuigi Rizzo * tail. Inverting the order of writes below could instead result into the 210a2a74091SLuigi Rizzo * host to think head went ahead of cur, which would cause the sync 211a2a74091SLuigi Rizzo * prologue to fail. 212a2a74091SLuigi Rizzo * 213a2a74091SLuigi Rizzo * The following memory barrier scheme is used to make this happen: 214a2a74091SLuigi Rizzo * 215a2a74091SLuigi Rizzo * Guest Host 216a2a74091SLuigi Rizzo * 217a2a74091SLuigi Rizzo * STORE(cur) LOAD(head) 218a2a74091SLuigi Rizzo * mb() <-----------> mb() 219a2a74091SLuigi Rizzo * STORE(head) LOAD(cur) 220a2a74091SLuigi Rizzo */ 221a2a74091SLuigi Rizzo ptr->cur = cur; 222a2a74091SLuigi Rizzo mb(); 223a2a74091SLuigi Rizzo ptr->head = head; 224a2a74091SLuigi Rizzo } 225a2a74091SLuigi Rizzo 226a2a74091SLuigi Rizzo /* Guest driver: Read kring pointers (hwcur, hwtail) from the CSB. 227a2a74091SLuigi Rizzo * This routine is coupled with ptnetmap_host_write_kring_csb(). */ 228a2a74091SLuigi Rizzo static inline void 229*46023447SVincenzo Maffione ptnetmap_guest_read_kring_csb(struct ptnet_csb_hg *pthg, struct netmap_kring *kring) 230a2a74091SLuigi Rizzo { 231a2a74091SLuigi Rizzo /* 232a2a74091SLuigi Rizzo * We place a memory barrier to make sure that the update of hwtail never 233a2a74091SLuigi Rizzo * overtakes the update of hwcur. 234a2a74091SLuigi Rizzo * (see explanation in ptnetmap_host_write_kring_csb). 235a2a74091SLuigi Rizzo */ 236*46023447SVincenzo Maffione kring->nr_hwtail = pthg->hwtail; 237a2a74091SLuigi Rizzo mb(); 238*46023447SVincenzo Maffione kring->nr_hwcur = pthg->hwcur; 239a2a74091SLuigi Rizzo } 240a2a74091SLuigi Rizzo 241a2a74091SLuigi Rizzo #endif /* WITH_PTNETMAP_GUEST */ 242a2a74091SLuigi Rizzo 243a82ab411SLuigi Rizzo #ifdef WITH_PTNETMAP_HOST 244a82ab411SLuigi Rizzo /* 245a82ab411SLuigi Rizzo * ptnetmap kernel thread routines 246a82ab411SLuigi Rizzo * */ 247a82ab411SLuigi Rizzo 248a82ab411SLuigi Rizzo /* Functions to read and write CSB fields in the host */ 249a82ab411SLuigi Rizzo #if defined (linux) 250a82ab411SLuigi Rizzo #define CSB_READ(csb, field, r) (get_user(r, &csb->field)) 251a82ab411SLuigi Rizzo #define CSB_WRITE(csb, field, v) (put_user(v, &csb->field)) 252a82ab411SLuigi Rizzo #else /* ! linux */ 253a82ab411SLuigi Rizzo #define CSB_READ(csb, field, r) (r = fuword32(&csb->field)) 254a82ab411SLuigi Rizzo #define CSB_WRITE(csb, field, v) (suword32(&csb->field, v)) 255a82ab411SLuigi Rizzo #endif /* ! linux */ 256a82ab411SLuigi Rizzo 257a2a74091SLuigi Rizzo /* Host netmap: Write kring pointers (hwcur, hwtail) to the CSB. 258a2a74091SLuigi Rizzo * This routine is coupled with ptnetmap_guest_read_kring_csb(). */ 259a82ab411SLuigi Rizzo static inline void 260*46023447SVincenzo Maffione ptnetmap_host_write_kring_csb(struct ptnet_csb_hg __user *ptr, uint32_t hwcur, 261a82ab411SLuigi Rizzo uint32_t hwtail) 262a82ab411SLuigi Rizzo { 263a2a74091SLuigi Rizzo /* 264a2a74091SLuigi Rizzo * The same scheme used in ptnetmap_guest_write_kring_csb() applies here. 265a2a74091SLuigi Rizzo * We allow the guest to read a value of hwcur more recent than the value 266a2a74091SLuigi Rizzo * of hwtail, since this would anyway result in a consistent view of the 267a2a74091SLuigi Rizzo * ring state (and hwcur can never wraparound hwtail, since hwcur must be 268a2a74091SLuigi Rizzo * behind head). 269a2a74091SLuigi Rizzo * 270a2a74091SLuigi Rizzo * The following memory barrier scheme is used to make this happen: 271a2a74091SLuigi Rizzo * 272a2a74091SLuigi Rizzo * Guest Host 273a2a74091SLuigi Rizzo * 274a2a74091SLuigi Rizzo * STORE(hwcur) LOAD(hwtail) 275a2a74091SLuigi Rizzo * mb() <-------------> mb() 276a2a74091SLuigi Rizzo * STORE(hwtail) LOAD(hwcur) 277a2a74091SLuigi Rizzo */ 278a82ab411SLuigi Rizzo CSB_WRITE(ptr, hwcur, hwcur); 279a2a74091SLuigi Rizzo mb(); 280a2a74091SLuigi Rizzo CSB_WRITE(ptr, hwtail, hwtail); 281a2a74091SLuigi Rizzo } 282a82ab411SLuigi Rizzo 283a2a74091SLuigi Rizzo /* Host netmap: Read kring pointers (head, cur, sync_flags) from the CSB. 284a2a74091SLuigi Rizzo * This routine is coupled with ptnetmap_guest_write_kring_csb(). */ 285a2a74091SLuigi Rizzo static inline void 286*46023447SVincenzo Maffione ptnetmap_host_read_kring_csb(struct ptnet_csb_gh __user *ptr, 287a2a74091SLuigi Rizzo struct netmap_ring *shadow_ring, 288a2a74091SLuigi Rizzo uint32_t num_slots) 289a2a74091SLuigi Rizzo { 290a2a74091SLuigi Rizzo /* 291a2a74091SLuigi Rizzo * We place a memory barrier to make sure that the update of head never 292a2a74091SLuigi Rizzo * overtakes the update of cur. 293a2a74091SLuigi Rizzo * (see explanation in ptnetmap_guest_write_kring_csb). 294a2a74091SLuigi Rizzo */ 295a2a74091SLuigi Rizzo CSB_READ(ptr, head, shadow_ring->head); 296a2a74091SLuigi Rizzo mb(); 297a2a74091SLuigi Rizzo CSB_READ(ptr, cur, shadow_ring->cur); 298a2a74091SLuigi Rizzo CSB_READ(ptr, sync_flags, shadow_ring->flags); 299a82ab411SLuigi Rizzo } 300a82ab411SLuigi Rizzo 301a82ab411SLuigi Rizzo #endif /* WITH_PTNETMAP_HOST */ 302a82ab411SLuigi Rizzo 303a82ab411SLuigi Rizzo #endif /* NETMAP_VIRT_H */ 304