xref: /freebsd-14.2/sys/dev/usb/controller/dwc3.h (revision c19fc5cd)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2019 Emmanuel Vadot <[email protected]>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  *
29  */
30 
31 #ifndef _DWC3_H_
32 #define	_DWC3_H_
33 
34 #define	DWC3_IP_ID		0x5533
35 #define	DWC3_1_IP_ID		0x3331
36 #define	DWC3_2_IP_ID		0x3332
37 
38 #define	DWC3_VERSION_MASK	0xFFFF0000
39 #define	DWC3_REVISION_MASK	0xFFFF
40 #define	DWC3_VERSION(x)		(((x) & DWC3_VERSION_MASK) >> 16)
41 #define	DWC3_REVISION(x)	((x) & DWC3_REVISION_MASK)
42 
43 #define	DWC3_GSBUSCFG0		0xc100
44 #define	DWC3_GSBUSCFG1		0xc104
45 #define	DWC3_GTXTHRCFG		0xc108
46 #define	DWC3_GRXTHRCFG		0xc10C
47 
48 /* Global Core Control Register */
49 #define	DWC3_GCTL			0xc110
50 #define	 DWC3_GCTL_PRTCAPDIR_MASK	(0x3 << 12)
51 #define	 DWC3_GCTL_PRTCAPDIR_HOST	(0x1 << 12)
52 #define	 DWC3_GCTL_PRTCAPDIR_DEVICE	(0x2 << 12)
53 #define	 DWC3_GCTL_CORESOFTRESET	(1 << 11)
54 #define	 DWC3_GCTL_DSBLCLKGTNG		(1 << 0)
55 
56 #define	DWC3_GPMSTS		0xc114
57 #define	DWC3_GSTS		0xc118
58 
59 #define	DWC3_GUCTL1		0xc11c
60 #define	 DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS	(1 << 28)
61 #define	 DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK (1 << 26)
62 
63 #define	DWC3_GSNPSID		0xc120
64 #define	DWC3_GGPIO		0xc124
65 #define	DWC3_GUID		0xc128
66 #define	DWC3_GUCTL		0xc12C
67 #define	DWC3_GUCTL_HOST_AUTO_RETRY		(1 << 14)
68 #define	DWC3_GBUSERRADDRLO	0xc130
69 #define	DWC3_GBUSERRADDRHI	0xc134
70 #define	DWC3_GPRTBIMAPLO	0xc138
71 #define	DWC3_GHWPARAMS0		0xc140
72 #define	DWC3_GHWPARAMS0_MODE_DUALROLEDEVICE	0x2
73 #define	DWC3_GHWPARAMS0_MODE_MASK		0x3
74 #define	DWC3_GHWPARAMS1		0xc144
75 #define	DWC3_GHWPARAMS2		0xc148
76 #define	DWC3_GHWPARAMS3		0xc14C
77 #define	DWC3_GHWPARAMS4		0xc150
78 #define	DWC3_GHWPARAMS5		0xc154
79 #define	DWC3_GHWPARAMS6		0xc158
80 #define	DWC3_GHWPARAMS7		0xc15C
81 #define	DWC3_GDBGFIFOSPACE	0xc160
82 #define	DWC3_GDBGLTSSM		0xc164
83 #define	DWC3_GDBGLNMCC		0xc168
84 #define	DWC3_GDBGBMU		0xc16C
85 #define	DWC3_GDBGLSPMUX		0xc170
86 #define	DWC3_GDBGLSP		0xc174
87 #define	DWC3_GDBGEPINFO0	0xc178
88 #define	DWC3_GDBGEPINFO1	0xc17C
89 #define	DWC3_GPRTBIMAP_HSLO	0xc180
90 #define	DWC3_GPRTBIMAP_FSLO	0xc188
91 
92 #define	DWC3_1_VER_NUMBER	0xc1a0
93 #define	DWC3_1_VER_TYPE		0xc1a4
94 
95 #define	DWC3_GUSB2PHYCFG0	0xc200
96 #define	 DWC3_GUSB2PHYCFG0_PHYSOFTRST		(1 << 31)
97 #define	 DWC3_GUSB2PHYCFG0_U2_FREECLK_EXISTS	(1 << 30)
98 #define	 DWC3_GUSB2PHYCFG0_USBTRDTIM(n)		((n) << 10)
99 #define	 DWC3_GUSB2PHYCFG0_USBTRDTIM_8BITS	9
100 #define	 DWC3_GUSB2PHYCFG0_USBTRDTIM_16BITS	5
101 #define	 DWC3_GUSB2PHYCFG0_ENBLSLPM		(1 << 8)
102 #define	 DWC3_GUSB2PHYCFG0_PHYSEL(x)		(((x) >> 7) & 0x1)	/* 0 = USB2.0, 1 = USB1.1 */
103 #define	 DWC3_GUSB2PHYCFG0_SUSPENDUSB20		(1 << 6)
104 #define	 DWC3_GUSB2PHYCFG0_ULPI_UTMI_SEL	(1 << 4)
105 #define	 DWC3_GUSB2PHYCFG0_PHYIF		(1 << 3)
106 
107 #define	DWC3_GUSB3PIPECTL0			0xc2c0
108 #define	 DWC3_GUSB3PIPECTL0_PHYSOFTRST		(1 << 31)
109 #define	 DWC3_GUSB3PIPECTL0_DISRXDETINP3	(1 << 28)
110 #define	 DWC3_GUSB3PIPECTL0_DELAYP1TRANS	(1 << 18)
111 #define	 DWC3_GUSB3PIPECTL0_SUSPENDUSB3		(1 << 17)
112 
113 #define	DWC3_HWPARAMS3_SSPHY(x)			((x) & 0x3)
114 #define	 DWC3_HWPARAMS3_SSPHY_DISABLE		0
115 #define	 DWC3_HWPARAMS3_SSPHY_GEN1		1
116 #define	 DWC3_HWPARAMS3_SSPHY_GEN2		2
117 
118 #define	DWC3_GTXFIFOSIZ(x)	(0xc300 + 0x4 * (x))
119 #define	DWC3_GRXFIFOSIZ(x)	(0xc380 + 0x4 * (x))
120 #define	DWC3_GEVNTADRLO0		0xc400
121 #define	DWC3_GEVNTADRHI0		0xc404
122 #define	DWC3_GEVNTSIZ0		0xc408
123 #define	DWC3_GEVNTCOUNT0		0xc40C
124 #define	DWC3_GHWPARAMS8		0xc600
125 #define	DWC3_GTXFIFOPRIDEV	0xc610
126 #define	DWC3_GTXFIFOPRIHST	0xc618
127 #define	DWC3_GRXFIFOPRIHST	0xc61c
128 #define	DWC3_GFIFOPRIDBC	0xc620
129 #define	DWC3_GDMAHLRATIO	0xc624
130 #define	DWC3_GFLADJ		0xc630
131 #define	DWC3_DCFG		0xc700
132 #define	DWC3_DCTL		0xc704
133 #define	DWC3_DEVTEN		0xc708
134 #define	DWC3_DSTS		0xc70C
135 #define	DWC3_DGCMDPAR		0xc710
136 #define	DWC3_DGCMD		0xc714
137 #define	DWC3_DALEPENA		0xc720
138 
139 #endif /* _DWC3_H_ */
140