1*053ec050SRuslan Bukin /*- 2*053ec050SRuslan Bukin * SPDX-License-Identifier: BSD-2-Clause 3*053ec050SRuslan Bukin * 4*053ec050SRuslan Bukin * Copyright (c) 2018 Ruslan Bukin <[email protected]> 5*053ec050SRuslan Bukin * All rights reserved. 6*053ec050SRuslan Bukin * 7*053ec050SRuslan Bukin * This software was developed by SRI International and the University of 8*053ec050SRuslan Bukin * Cambridge Computer Laboratory (Department of Computer Science and 9*053ec050SRuslan Bukin * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the 10*053ec050SRuslan Bukin * DARPA SSITH research programme. 11*053ec050SRuslan Bukin * 12*053ec050SRuslan Bukin * Redistribution and use in source and binary forms, with or without 13*053ec050SRuslan Bukin * modification, are permitted provided that the following conditions 14*053ec050SRuslan Bukin * are met: 15*053ec050SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 16*053ec050SRuslan Bukin * notice, this list of conditions and the following disclaimer. 17*053ec050SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 18*053ec050SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 19*053ec050SRuslan Bukin * documentation and/or other materials provided with the distribution. 20*053ec050SRuslan Bukin * 21*053ec050SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22*053ec050SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23*053ec050SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24*053ec050SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 25*053ec050SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26*053ec050SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27*053ec050SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28*053ec050SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29*053ec050SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30*053ec050SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31*053ec050SRuslan Bukin * SUCH DAMAGE. 32*053ec050SRuslan Bukin */ 33*053ec050SRuslan Bukin 34*053ec050SRuslan Bukin #ifndef _UART_DEV_LOWRISC_H_ 35*053ec050SRuslan Bukin #define _UART_DEV_LOWRISC_H_ 36*053ec050SRuslan Bukin 37*053ec050SRuslan Bukin #define UART_DR 0x0000 38*053ec050SRuslan Bukin #define DR_DATA_S 0 39*053ec050SRuslan Bukin #define DR_DATA_M 0xff 40*053ec050SRuslan Bukin #define DR_RX_ERR (1 << 8) 41*053ec050SRuslan Bukin #define DR_RX_FIFO_EMPTY (1 << 9) 42*053ec050SRuslan Bukin #define DR_TX_FIFO_FULL (1 << 10) 43*053ec050SRuslan Bukin #define DR_RX_FIFO_FULL (1 << 11) 44*053ec050SRuslan Bukin #define UART_INT_STATUS 0x1000 45*053ec050SRuslan Bukin #define INT_STATUS_ACK 1 46*053ec050SRuslan Bukin #define UART_BAUD 0x2000 /* write-only */ 47*053ec050SRuslan Bukin #define BAUD_115200 108 48*053ec050SRuslan Bukin #define UART_STAT_RX 0x2000 /* read-only */ 49*053ec050SRuslan Bukin #define STAT_RX_FIFO_RD_COUNT_S 0 50*053ec050SRuslan Bukin #define STAT_RX_FIFO_RD_COUNT_M (0xffff << STAT_RX_FIFO_RD_COUNT_S) 51*053ec050SRuslan Bukin #define STAT_RX_FIFO_WR_COUNT_S 16 52*053ec050SRuslan Bukin #define STAT_RX_FIFO_WR_COUNT_M (0xffff << STAT_RX_FIFO_WR_COUNT_S) 53*053ec050SRuslan Bukin #define UART_STAT_TX 0x2004 54*053ec050SRuslan Bukin #define STAT_TX_FIFO_RD_COUNT_S 0 55*053ec050SRuslan Bukin #define STAT_TX_FIFO_RD_COUNT_M (0xffff << STAT_TX_FIFO_RD_COUNT_S) 56*053ec050SRuslan Bukin #define STAT_TX_FIFO_WR_COUNT_S 16 57*053ec050SRuslan Bukin #define STAT_TX_FIFO_WR_COUNT_M (0xffff << STAT_TX_FIFO_WR_COUNT_S) 58*053ec050SRuslan Bukin 59*053ec050SRuslan Bukin #define GETREG(bas, reg) \ 60*053ec050SRuslan Bukin bus_space_read_2((bas)->bst, (bas)->bsh, (reg)) 61*053ec050SRuslan Bukin #define SETREG(bas, reg, value) \ 62*053ec050SRuslan Bukin bus_space_write_2((bas)->bst, (bas)->bsh, (reg), (value)) 63*053ec050SRuslan Bukin 64*053ec050SRuslan Bukin #endif /* _UART_DEV_LOWRISC_H_ */ 65