1 //===--- InfoByHwMode.cpp -------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // Classes that implement data parameterized by HW modes for instruction
9 // selection. Currently it is ValueTypeByHwMode (parameterized ValueType),
10 // and RegSizeInfoByHwMode (parameterized register/spill size and alignment
11 // data).
12 //===----------------------------------------------------------------------===//
13 
14 #include "CodeGenTarget.h"
15 #include "InfoByHwMode.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/ADT/Twine.h"
18 #include "llvm/Support/Debug.h"
19 #include "llvm/Support/raw_ostream.h"
20 #include "llvm/TableGen/Record.h"
21 #include <string>
22 
23 using namespace llvm;
24 
25 std::string llvm::getModeName(unsigned Mode) {
26   if (Mode == DefaultMode)
27     return "*";
28   return (Twine('m') + Twine(Mode)).str();
29 }
30 
31 ValueTypeByHwMode::ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH) {
32   const HwModeSelect &MS = CGH.getHwModeSelect(R);
33   for (const HwModeSelect::PairType &P : MS.Items) {
34     auto I = Map.insert({P.first, MVT(llvm::getValueType(P.second))});
35     assert(I.second && "Duplicate entry?");
36     (void)I;
37   }
38   if (R->isSubClassOf("PtrValueType"))
39     PtrAddrSpace = R->getValueAsInt("AddrSpace");
40 }
41 
42 ValueTypeByHwMode::ValueTypeByHwMode(Record *R, MVT T) : ValueTypeByHwMode(T) {
43   if (R->isSubClassOf("PtrValueType"))
44     PtrAddrSpace = R->getValueAsInt("AddrSpace");
45 }
46 
47 bool ValueTypeByHwMode::operator== (const ValueTypeByHwMode &T) const {
48   assert(isValid() && T.isValid() && "Invalid type in assignment");
49   bool Simple = isSimple();
50   if (Simple != T.isSimple())
51     return false;
52   if (Simple)
53     return getSimple() == T.getSimple();
54 
55   return Map == T.Map;
56 }
57 
58 bool ValueTypeByHwMode::operator< (const ValueTypeByHwMode &T) const {
59   assert(isValid() && T.isValid() && "Invalid type in comparison");
60   // Default order for maps.
61   return Map < T.Map;
62 }
63 
64 MVT &ValueTypeByHwMode::getOrCreateTypeForMode(unsigned Mode, MVT Type) {
65   auto F = Map.find(Mode);
66   if (F != Map.end())
67     return F->second;
68   // If Mode is not in the map, look up the default mode. If it exists,
69   // make a copy of it for Mode and return it.
70   auto D = Map.begin();
71   if (D != Map.end() && D->first == DefaultMode)
72     return Map.insert(std::make_pair(Mode, D->second)).first->second;
73   // If default mode is not present either, use provided Type.
74   return Map.insert(std::make_pair(Mode, Type)).first->second;
75 }
76 
77 StringRef ValueTypeByHwMode::getMVTName(MVT T) {
78   StringRef N = llvm::getEnumName(T.SimpleTy);
79   N.consume_front("MVT::");
80   return N;
81 }
82 
83 void ValueTypeByHwMode::writeToStream(raw_ostream &OS) const {
84   if (isSimple()) {
85     OS << getMVTName(getSimple());
86     return;
87   }
88 
89   std::vector<const PairType*> Pairs;
90   for (const auto &P : Map)
91     Pairs.push_back(&P);
92   llvm::sort(Pairs, deref<std::less<PairType>>());
93 
94   OS << '{';
95   ListSeparator LS(",");
96   for (const PairType *P : Pairs)
97     OS << LS << '(' << getModeName(P->first) << ':'
98        << getMVTName(P->second).str() << ')';
99   OS << '}';
100 }
101 
102 LLVM_DUMP_METHOD
103 void ValueTypeByHwMode::dump() const {
104   dbgs() << *this << '\n';
105 }
106 
107 ValueTypeByHwMode llvm::getValueTypeByHwMode(Record *Rec,
108                                              const CodeGenHwModes &CGH) {
109 #ifndef NDEBUG
110   if (!Rec->isSubClassOf("ValueType"))
111     Rec->dump();
112 #endif
113   assert(Rec->isSubClassOf("ValueType") &&
114          "Record must be derived from ValueType");
115   if (Rec->isSubClassOf("HwModeSelect"))
116     return ValueTypeByHwMode(Rec, CGH);
117   return ValueTypeByHwMode(Rec, llvm::getValueType(Rec));
118 }
119 
120 RegSizeInfo::RegSizeInfo(Record *R, const CodeGenHwModes &CGH) {
121   RegSize = R->getValueAsInt("RegSize");
122   SpillSize = R->getValueAsInt("SpillSize");
123   SpillAlignment = R->getValueAsInt("SpillAlignment");
124 }
125 
126 bool RegSizeInfo::operator< (const RegSizeInfo &I) const {
127   return std::tie(RegSize, SpillSize, SpillAlignment) <
128          std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
129 }
130 
131 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const {
132   return RegSize <= I.RegSize &&
133          SpillAlignment && I.SpillAlignment % SpillAlignment == 0 &&
134          SpillSize <= I.SpillSize;
135 }
136 
137 void RegSizeInfo::writeToStream(raw_ostream &OS) const {
138   OS << "[R=" << RegSize << ",S=" << SpillSize
139      << ",A=" << SpillAlignment << ']';
140 }
141 
142 RegSizeInfoByHwMode::RegSizeInfoByHwMode(Record *R,
143       const CodeGenHwModes &CGH) {
144   const HwModeSelect &MS = CGH.getHwModeSelect(R);
145   for (const HwModeSelect::PairType &P : MS.Items) {
146     auto I = Map.insert({P.first, RegSizeInfo(P.second, CGH)});
147     assert(I.second && "Duplicate entry?");
148     (void)I;
149   }
150 }
151 
152 bool RegSizeInfoByHwMode::operator< (const RegSizeInfoByHwMode &I) const {
153   unsigned M0 = Map.begin()->first;
154   return get(M0) < I.get(M0);
155 }
156 
157 bool RegSizeInfoByHwMode::operator== (const RegSizeInfoByHwMode &I) const {
158   unsigned M0 = Map.begin()->first;
159   return get(M0) == I.get(M0);
160 }
161 
162 bool RegSizeInfoByHwMode::isSubClassOf(const RegSizeInfoByHwMode &I) const {
163   unsigned M0 = Map.begin()->first;
164   return get(M0).isSubClassOf(I.get(M0));
165 }
166 
167 bool RegSizeInfoByHwMode::hasStricterSpillThan(const RegSizeInfoByHwMode &I)
168       const {
169   unsigned M0 = Map.begin()->first;
170   const RegSizeInfo &A0 = get(M0);
171   const RegSizeInfo &B0 = I.get(M0);
172   return std::tie(A0.SpillSize, A0.SpillAlignment) >
173          std::tie(B0.SpillSize, B0.SpillAlignment);
174 }
175 
176 void RegSizeInfoByHwMode::writeToStream(raw_ostream &OS) const {
177   typedef typename decltype(Map)::value_type PairType;
178   std::vector<const PairType*> Pairs;
179   for (const auto &P : Map)
180     Pairs.push_back(&P);
181   llvm::sort(Pairs, deref<std::less<PairType>>());
182 
183   OS << '{';
184   ListSeparator LS(",");
185   for (const PairType *P : Pairs)
186     OS << LS << '(' << getModeName(P->first) << ':' << P->second << ')';
187   OS << '}';
188 }
189 
190 EncodingInfoByHwMode::EncodingInfoByHwMode(Record *R, const CodeGenHwModes &CGH) {
191   const HwModeSelect &MS = CGH.getHwModeSelect(R);
192   for (const HwModeSelect::PairType &P : MS.Items) {
193     assert(P.second && P.second->isSubClassOf("InstructionEncoding") &&
194            "Encoding must subclass InstructionEncoding");
195     auto I = Map.insert({P.first, P.second});
196     assert(I.second && "Duplicate entry?");
197     (void)I;
198   }
199 }
200 
201 namespace llvm {
202   raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
203     T.writeToStream(OS);
204     return OS;
205   }
206 
207   raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) {
208     T.writeToStream(OS);
209     return OS;
210   }
211 
212   raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
213     T.writeToStream(OS);
214     return OS;
215   }
216 }
217