1fe013be4SDimitry Andric//===-- RISCVCallingConv.td - Calling Conventions RISC-V ---*- tablegen -*-===//
20b57cec5SDimitry Andric//
30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric//
70b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric//
9fe013be4SDimitry Andric// This describes the calling conventions for the RISC-V architecture.
100b57cec5SDimitry Andric//
110b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
120b57cec5SDimitry Andric
130b57cec5SDimitry Andric// The RISC-V calling convention is handled with custom code in
140b57cec5SDimitry Andric// RISCVISelLowering.cpp (CC_RISCV).
150b57cec5SDimitry Andric
16*a58f00eaSDimitry Andricdef CSR_ILP32E_LP64E : CalleeSavedRegs<(add X1, X8, X9)>;
17*a58f00eaSDimitry Andric
180b57cec5SDimitry Andricdef CSR_ILP32_LP64
19*a58f00eaSDimitry Andric    : CalleeSavedRegs<(add CSR_ILP32E_LP64E, (sequence "X%u", 18, 27))>;
200b57cec5SDimitry Andric
210b57cec5SDimitry Andricdef CSR_ILP32F_LP64F
220b57cec5SDimitry Andric    : CalleeSavedRegs<(add CSR_ILP32_LP64,
238bcb0991SDimitry Andric                       F8_F, F9_F, (sequence "F%u_F", 18, 27))>;
240b57cec5SDimitry Andric
250b57cec5SDimitry Andricdef CSR_ILP32D_LP64D
260b57cec5SDimitry Andric    : CalleeSavedRegs<(add CSR_ILP32_LP64,
278bcb0991SDimitry Andric                       F8_D, F9_D, (sequence "F%u_D", 18, 27))>;
280b57cec5SDimitry Andric
290b57cec5SDimitry Andric// Needed for implementation of RISCVRegisterInfo::getNoPreservedMask()
300b57cec5SDimitry Andricdef CSR_NoRegs : CalleeSavedRegs<(add)>;
310b57cec5SDimitry Andric
320b57cec5SDimitry Andric// Interrupt handler needs to save/restore all registers that are used,
330b57cec5SDimitry Andric// both Caller and Callee saved registers.
34de8261c4SDimitry Andricdef CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 5, 31))>;
350b57cec5SDimitry Andric
360b57cec5SDimitry Andric// Same as CSR_Interrupt, but including all 32-bit FP registers.
37fe013be4SDimitry Andricdef CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
38fe013be4SDimitry Andric                                             (sequence "F%u_F", 0, 31))>;
390b57cec5SDimitry Andric
400b57cec5SDimitry Andric// Same as CSR_Interrupt, but including all 64-bit FP registers.
41fe013be4SDimitry Andricdef CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
42fe013be4SDimitry Andric                                             (sequence "F%u_D", 0, 31))>;
43*a58f00eaSDimitry Andric
44*a58f00eaSDimitry Andric// Same as CSR_Interrupt, but excluding X16-X31.
45*a58f00eaSDimitry Andricdef CSR_Interrupt_RVE : CalleeSavedRegs<(sub CSR_Interrupt,
46*a58f00eaSDimitry Andric                                        (sequence "X%u", 16, 31))>;
47*a58f00eaSDimitry Andric
48*a58f00eaSDimitry Andric// Same as CSR_XLEN_F32_Interrupt, but excluding X16-X31.
49*a58f00eaSDimitry Andricdef CSR_XLEN_F32_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F32_Interrupt,
50*a58f00eaSDimitry Andric                                                (sequence "X%u", 16, 31))>;
51*a58f00eaSDimitry Andric
52*a58f00eaSDimitry Andric// Same as CSR_XLEN_F64_Interrupt, but excluding X16-X31.
53*a58f00eaSDimitry Andricdef CSR_XLEN_F64_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F64_Interrupt,
54*a58f00eaSDimitry Andric                                                (sequence "X%u", 16, 31))>;
55