10eae32dcSDimitry Andric //===- MachineSSAContext.cpp ------------------------------------*- C++ -*-===// 20eae32dcSDimitry Andric // 30eae32dcSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40eae32dcSDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50eae32dcSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60eae32dcSDimitry Andric // 70eae32dcSDimitry Andric //===----------------------------------------------------------------------===// 80eae32dcSDimitry Andric /// \file 90eae32dcSDimitry Andric /// 100eae32dcSDimitry Andric /// This file defines a specialization of the GenericSSAContext<X> 110eae32dcSDimitry Andric /// template class for Machine IR. 120eae32dcSDimitry Andric /// 130eae32dcSDimitry Andric //===----------------------------------------------------------------------===// 140eae32dcSDimitry Andric 150eae32dcSDimitry Andric #include "llvm/CodeGen/MachineSSAContext.h" 160eae32dcSDimitry Andric #include "llvm/CodeGen/MachineBasicBlock.h" 1781ad6265SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 180eae32dcSDimitry Andric #include "llvm/CodeGen/MachineInstr.h" 1981ad6265SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h" 200eae32dcSDimitry Andric #include "llvm/Support/raw_ostream.h" 210eae32dcSDimitry Andric 220eae32dcSDimitry Andric using namespace llvm; 230eae32dcSDimitry Andric 240eae32dcSDimitry Andric MachineBasicBlock *MachineSSAContext::getEntryBlock(MachineFunction &F) { 250eae32dcSDimitry Andric return &F.front(); 260eae32dcSDimitry Andric } 270eae32dcSDimitry Andric 280eae32dcSDimitry Andric void MachineSSAContext::setFunction(MachineFunction &Fn) { 290eae32dcSDimitry Andric MF = &Fn; 300eae32dcSDimitry Andric RegInfo = &MF->getRegInfo(); 310eae32dcSDimitry Andric } 320eae32dcSDimitry Andric 330eae32dcSDimitry Andric Printable MachineSSAContext::print(MachineBasicBlock *Block) const { 340eae32dcSDimitry Andric return Printable([Block](raw_ostream &Out) { Block->printName(Out); }); 350eae32dcSDimitry Andric } 360eae32dcSDimitry Andric 370eae32dcSDimitry Andric Printable MachineSSAContext::print(MachineInstr *I) const { 380eae32dcSDimitry Andric return Printable([I](raw_ostream &Out) { I->print(Out); }); 390eae32dcSDimitry Andric } 400eae32dcSDimitry Andric 410eae32dcSDimitry Andric Printable MachineSSAContext::print(Register Value) const { 420eae32dcSDimitry Andric auto *MRI = RegInfo; 430eae32dcSDimitry Andric return Printable([MRI, Value](raw_ostream &Out) { 440eae32dcSDimitry Andric Out << printReg(Value, MRI->getTargetRegisterInfo(), 0, MRI); 450eae32dcSDimitry Andric 460eae32dcSDimitry Andric if (Value) { 470eae32dcSDimitry Andric // Try to print the definition. 480eae32dcSDimitry Andric if (auto *Instr = MRI->getUniqueVRegDef(Value)) { 490eae32dcSDimitry Andric Out << ": "; 500eae32dcSDimitry Andric Instr->print(Out); 510eae32dcSDimitry Andric } 520eae32dcSDimitry Andric } 530eae32dcSDimitry Andric }); 540eae32dcSDimitry Andric } 55