1*0b57cec5SDimitry Andric //===-- CodeGen.cpp -------------------------------------------------------===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // This file implements the common initialization routines for the 10*0b57cec5SDimitry Andric // CodeGen library. 11*0b57cec5SDimitry Andric // 12*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 13*0b57cec5SDimitry Andric 14*0b57cec5SDimitry Andric #include "llvm-c/Initialization.h" 15*0b57cec5SDimitry Andric #include "llvm/InitializePasses.h" 16*0b57cec5SDimitry Andric #include "llvm/PassRegistry.h" 17*0b57cec5SDimitry Andric 18*0b57cec5SDimitry Andric using namespace llvm; 19*0b57cec5SDimitry Andric 20*0b57cec5SDimitry Andric /// initializeCodeGen - Initialize all passes linked into the CodeGen library. 21*0b57cec5SDimitry Andric void llvm::initializeCodeGen(PassRegistry &Registry) { 22*0b57cec5SDimitry Andric initializeAtomicExpandPass(Registry); 235ffd83dbSDimitry Andric initializeBBSectionsPreparePass(Registry); 24*0b57cec5SDimitry Andric initializeBranchFolderPassPass(Registry); 25*0b57cec5SDimitry Andric initializeBranchRelaxationPass(Registry); 26480093f4SDimitry Andric initializeCFGuardLongjmpPass(Registry); 27*0b57cec5SDimitry Andric initializeCFIInstrInserterPass(Registry); 28*0b57cec5SDimitry Andric initializeCodeGenPreparePass(Registry); 29*0b57cec5SDimitry Andric initializeDeadMachineInstructionElimPass(Registry); 305ffd83dbSDimitry Andric initializeDebugifyMachineModulePass(Registry); 31*0b57cec5SDimitry Andric initializeDetectDeadLanesPass(Registry); 32*0b57cec5SDimitry Andric initializeDwarfEHPreparePass(Registry); 33*0b57cec5SDimitry Andric initializeEarlyIfConverterPass(Registry); 348bcb0991SDimitry Andric initializeEarlyIfPredicatorPass(Registry); 35*0b57cec5SDimitry Andric initializeEarlyMachineLICMPass(Registry); 36*0b57cec5SDimitry Andric initializeEarlyTailDuplicatePass(Registry); 37*0b57cec5SDimitry Andric initializeExpandMemCmpPassPass(Registry); 38*0b57cec5SDimitry Andric initializeExpandPostRAPass(Registry); 39*0b57cec5SDimitry Andric initializeFEntryInserterPass(Registry); 40*0b57cec5SDimitry Andric initializeFinalizeISelPass(Registry); 41*0b57cec5SDimitry Andric initializeFinalizeMachineBundlesPass(Registry); 425ffd83dbSDimitry Andric initializeFixupStatepointCallerSavedPass(Registry); 43*0b57cec5SDimitry Andric initializeFuncletLayoutPass(Registry); 44*0b57cec5SDimitry Andric initializeGCMachineCodeAnalysisPass(Registry); 45*0b57cec5SDimitry Andric initializeGCModuleInfoPass(Registry); 46*0b57cec5SDimitry Andric initializeHardwareLoopsPass(Registry); 47*0b57cec5SDimitry Andric initializeIfConverterPass(Registry); 48*0b57cec5SDimitry Andric initializeImplicitNullChecksPass(Registry); 49*0b57cec5SDimitry Andric initializeIndirectBrExpandPassPass(Registry); 50*0b57cec5SDimitry Andric initializeInterleavedLoadCombinePass(Registry); 51*0b57cec5SDimitry Andric initializeInterleavedAccessPass(Registry); 52*0b57cec5SDimitry Andric initializeLiveDebugValuesPass(Registry); 53*0b57cec5SDimitry Andric initializeLiveDebugVariablesPass(Registry); 54*0b57cec5SDimitry Andric initializeLiveIntervalsPass(Registry); 55*0b57cec5SDimitry Andric initializeLiveRangeShrinkPass(Registry); 56*0b57cec5SDimitry Andric initializeLiveStacksPass(Registry); 57*0b57cec5SDimitry Andric initializeLiveVariablesPass(Registry); 58*0b57cec5SDimitry Andric initializeLocalStackSlotPassPass(Registry); 59*0b57cec5SDimitry Andric initializeLowerIntrinsicsPass(Registry); 60*0b57cec5SDimitry Andric initializeMIRCanonicalizerPass(Registry); 618bcb0991SDimitry Andric initializeMIRNamerPass(Registry); 62*0b57cec5SDimitry Andric initializeMachineBlockFrequencyInfoPass(Registry); 63*0b57cec5SDimitry Andric initializeMachineBlockPlacementPass(Registry); 64*0b57cec5SDimitry Andric initializeMachineBlockPlacementStatsPass(Registry); 65*0b57cec5SDimitry Andric initializeMachineCSEPass(Registry); 66*0b57cec5SDimitry Andric initializeMachineCombinerPass(Registry); 67*0b57cec5SDimitry Andric initializeMachineCopyPropagationPass(Registry); 68*0b57cec5SDimitry Andric initializeMachineDominatorTreePass(Registry); 69*0b57cec5SDimitry Andric initializeMachineFunctionPrinterPassPass(Registry); 70*0b57cec5SDimitry Andric initializeMachineLICMPass(Registry); 71*0b57cec5SDimitry Andric initializeMachineLoopInfoPass(Registry); 728bcb0991SDimitry Andric initializeMachineModuleInfoWrapperPassPass(Registry); 73*0b57cec5SDimitry Andric initializeMachineOptimizationRemarkEmitterPassPass(Registry); 74*0b57cec5SDimitry Andric initializeMachineOutlinerPass(Registry); 75*0b57cec5SDimitry Andric initializeMachinePipelinerPass(Registry); 768bcb0991SDimitry Andric initializeModuloScheduleTestPass(Registry); 77*0b57cec5SDimitry Andric initializeMachinePostDominatorTreePass(Registry); 78*0b57cec5SDimitry Andric initializeMachineRegionInfoPassPass(Registry); 79*0b57cec5SDimitry Andric initializeMachineSchedulerPass(Registry); 80*0b57cec5SDimitry Andric initializeMachineSinkingPass(Registry); 81*0b57cec5SDimitry Andric initializeMachineVerifierPassPass(Registry); 82*0b57cec5SDimitry Andric initializeOptimizePHIsPass(Registry); 83*0b57cec5SDimitry Andric initializePEIPass(Registry); 84*0b57cec5SDimitry Andric initializePHIEliminationPass(Registry); 85*0b57cec5SDimitry Andric initializePatchableFunctionPass(Registry); 86*0b57cec5SDimitry Andric initializePeepholeOptimizerPass(Registry); 87*0b57cec5SDimitry Andric initializePostMachineSchedulerPass(Registry); 88*0b57cec5SDimitry Andric initializePostRAHazardRecognizerPass(Registry); 89*0b57cec5SDimitry Andric initializePostRAMachineSinkingPass(Registry); 90*0b57cec5SDimitry Andric initializePostRASchedulerPass(Registry); 91*0b57cec5SDimitry Andric initializePreISelIntrinsicLoweringLegacyPassPass(Registry); 92*0b57cec5SDimitry Andric initializeProcessImplicitDefsPass(Registry); 93*0b57cec5SDimitry Andric initializeRABasicPass(Registry); 94*0b57cec5SDimitry Andric initializeRAGreedyPass(Registry); 95*0b57cec5SDimitry Andric initializeRegAllocFastPass(Registry); 96*0b57cec5SDimitry Andric initializeRegUsageInfoCollectorPass(Registry); 97*0b57cec5SDimitry Andric initializeRegUsageInfoPropagationPass(Registry); 98*0b57cec5SDimitry Andric initializeRegisterCoalescerPass(Registry); 99*0b57cec5SDimitry Andric initializeRenameIndependentSubregsPass(Registry); 100*0b57cec5SDimitry Andric initializeSafeStackLegacyPassPass(Registry); 101*0b57cec5SDimitry Andric initializeScalarizeMaskedMemIntrinPass(Registry); 102*0b57cec5SDimitry Andric initializeShrinkWrapPass(Registry); 1035ffd83dbSDimitry Andric initializeSjLjEHPreparePass(Registry); 104*0b57cec5SDimitry Andric initializeSlotIndexesPass(Registry); 105*0b57cec5SDimitry Andric initializeStackColoringPass(Registry); 106*0b57cec5SDimitry Andric initializeStackMapLivenessPass(Registry); 107*0b57cec5SDimitry Andric initializeStackProtectorPass(Registry); 108*0b57cec5SDimitry Andric initializeStackSlotColoringPass(Registry); 1095ffd83dbSDimitry Andric initializeStripDebugMachineModulePass(Registry); 110*0b57cec5SDimitry Andric initializeTailDuplicatePass(Registry); 111*0b57cec5SDimitry Andric initializeTargetPassConfigPass(Registry); 112*0b57cec5SDimitry Andric initializeTwoAddressInstructionPassPass(Registry); 113480093f4SDimitry Andric initializeTypePromotionPass(Registry); 114*0b57cec5SDimitry Andric initializeUnpackMachineBundlesPass(Registry); 115*0b57cec5SDimitry Andric initializeUnreachableBlockElimLegacyPassPass(Registry); 116*0b57cec5SDimitry Andric initializeUnreachableMachineBlockElimPass(Registry); 117*0b57cec5SDimitry Andric initializeVirtRegMapPass(Registry); 118*0b57cec5SDimitry Andric initializeVirtRegRewriterPass(Registry); 119*0b57cec5SDimitry Andric initializeWasmEHPreparePass(Registry); 120*0b57cec5SDimitry Andric initializeWinEHPreparePass(Registry); 121*0b57cec5SDimitry Andric initializeXRayInstrumentationPass(Registry); 122*0b57cec5SDimitry Andric } 123*0b57cec5SDimitry Andric 124*0b57cec5SDimitry Andric void LLVMInitializeCodeGen(LLVMPassRegistryRef R) { 125*0b57cec5SDimitry Andric initializeCodeGen(*unwrap(R)); 126*0b57cec5SDimitry Andric } 127