104eeddc0SDimitry Andric //===-- GDBRemoteRegisterFallback.cpp -------------------------------------===// 204eeddc0SDimitry Andric // 304eeddc0SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 404eeddc0SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 504eeddc0SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 604eeddc0SDimitry Andric // 704eeddc0SDimitry Andric //===----------------------------------------------------------------------===// 804eeddc0SDimitry Andric 904eeddc0SDimitry Andric #include "GDBRemoteRegisterFallback.h" 1004eeddc0SDimitry Andric 1104eeddc0SDimitry Andric namespace lldb_private { 1204eeddc0SDimitry Andric namespace process_gdb_remote { 1304eeddc0SDimitry Andric 1404eeddc0SDimitry Andric #define REG(name, size) \ 1504eeddc0SDimitry Andric DynamicRegisterInfo::Register { \ 1604eeddc0SDimitry Andric ConstString(#name), empty_alt_name, reg_set, size, LLDB_INVALID_INDEX32, \ 1704eeddc0SDimitry Andric lldb::eEncodingUint, lldb::eFormatHex, LLDB_INVALID_REGNUM, \ 1804eeddc0SDimitry Andric LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, {}, {} \ 1904eeddc0SDimitry Andric } 2004eeddc0SDimitry Andric #define R64(name) REG(name, 8) 2104eeddc0SDimitry Andric #define R32(name) REG(name, 4) 2204eeddc0SDimitry Andric 2304eeddc0SDimitry Andric static std::vector<DynamicRegisterInfo::Register> GetRegisters_aarch64() { 2404eeddc0SDimitry Andric ConstString empty_alt_name; 2504eeddc0SDimitry Andric ConstString reg_set{"general purpose registers"}; 2604eeddc0SDimitry Andric 2704eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> registers{ 2804eeddc0SDimitry Andric R64(x0), R64(x1), R64(x2), R64(x3), R64(x4), R64(x5), R64(x6), 2904eeddc0SDimitry Andric R64(x7), R64(x8), R64(x9), R64(x10), R64(x11), R64(x12), R64(x13), 3004eeddc0SDimitry Andric R64(x14), R64(x15), R64(x16), R64(x17), R64(x18), R64(x19), R64(x20), 3104eeddc0SDimitry Andric R64(x21), R64(x22), R64(x23), R64(x24), R64(x25), R64(x26), R64(x27), 3204eeddc0SDimitry Andric R64(x28), R64(x29), R64(x30), R64(sp), R64(pc), R32(cpsr), 3304eeddc0SDimitry Andric }; 3404eeddc0SDimitry Andric 3504eeddc0SDimitry Andric return registers; 3604eeddc0SDimitry Andric } 3704eeddc0SDimitry Andric 3804eeddc0SDimitry Andric static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86() { 3904eeddc0SDimitry Andric ConstString empty_alt_name; 4004eeddc0SDimitry Andric ConstString reg_set{"general purpose registers"}; 4104eeddc0SDimitry Andric 4204eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> registers{ 4304eeddc0SDimitry Andric R32(eax), R32(ecx), R32(edx), R32(ebx), R32(esp), R32(ebp), 4404eeddc0SDimitry Andric R32(esi), R32(edi), R32(eip), R32(eflags), R32(cs), R32(ss), 4504eeddc0SDimitry Andric R32(ds), R32(es), R32(fs), R32(gs), 4604eeddc0SDimitry Andric }; 4704eeddc0SDimitry Andric 4804eeddc0SDimitry Andric return registers; 4904eeddc0SDimitry Andric } 5004eeddc0SDimitry Andric 5104eeddc0SDimitry Andric static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86_64() { 5204eeddc0SDimitry Andric ConstString empty_alt_name; 5304eeddc0SDimitry Andric ConstString reg_set{"general purpose registers"}; 5404eeddc0SDimitry Andric 5504eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> registers{ 5604eeddc0SDimitry Andric R64(rax), R64(rbx), R64(rcx), R64(rdx), R64(rsi), R64(rdi), 5704eeddc0SDimitry Andric R64(rbp), R64(rsp), R64(r8), R64(r9), R64(r10), R64(r11), 5804eeddc0SDimitry Andric R64(r12), R64(r13), R64(r14), R64(r15), R64(rip), R32(eflags), 5904eeddc0SDimitry Andric R32(cs), R32(ss), R32(ds), R32(es), R32(fs), R32(gs), 6004eeddc0SDimitry Andric }; 6104eeddc0SDimitry Andric 6204eeddc0SDimitry Andric return registers; 6304eeddc0SDimitry Andric } 6404eeddc0SDimitry Andric 6504eeddc0SDimitry Andric #undef R32 6604eeddc0SDimitry Andric #undef R64 6704eeddc0SDimitry Andric #undef REG 6804eeddc0SDimitry Andric 6904eeddc0SDimitry Andric std::vector<DynamicRegisterInfo::Register> 7004eeddc0SDimitry Andric GetFallbackRegisters(const ArchSpec &arch_to_use) { 7104eeddc0SDimitry Andric switch (arch_to_use.GetMachine()) { 7204eeddc0SDimitry Andric case llvm::Triple::aarch64: 7304eeddc0SDimitry Andric return GetRegisters_aarch64(); 7404eeddc0SDimitry Andric case llvm::Triple::x86: 7504eeddc0SDimitry Andric return GetRegisters_x86(); 7604eeddc0SDimitry Andric case llvm::Triple::x86_64: 7704eeddc0SDimitry Andric return GetRegisters_x86_64(); 7804eeddc0SDimitry Andric default: 7904eeddc0SDimitry Andric break; 8004eeddc0SDimitry Andric } 8104eeddc0SDimitry Andric 8204eeddc0SDimitry Andric return {}; 8304eeddc0SDimitry Andric } 8404eeddc0SDimitry Andric 8504eeddc0SDimitry Andric } // namespace process_gdb_remote 8604eeddc0SDimitry Andric } // namespace lldb_private 87