1*0b57cec5SDimitry Andric //===-- RegisterInfoPOSIX_ppc64le.cpp -------------------------------------===//
2*0b57cec5SDimitry Andric //
3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*0b57cec5SDimitry Andric //
7*0b57cec5SDimitry Andric //===---------------------------------------------------------------------===//
8*0b57cec5SDimitry Andric 
9*0b57cec5SDimitry Andric #include <cassert>
10*0b57cec5SDimitry Andric #include <cstddef>
11*0b57cec5SDimitry Andric #include <vector>
12*0b57cec5SDimitry Andric 
13*0b57cec5SDimitry Andric #include "lldb/lldb-defines.h"
14*0b57cec5SDimitry Andric #include "llvm/Support/Compiler.h"
15*0b57cec5SDimitry Andric 
16*0b57cec5SDimitry Andric #include "RegisterInfoPOSIX_ppc64le.h"
17*0b57cec5SDimitry Andric 
18*0b57cec5SDimitry Andric // Include RegisterInfoPOSIX_ppc64le to declare our g_register_infos_ppc64le
19*0b57cec5SDimitry Andric #define DECLARE_REGISTER_INFOS_PPC64LE_STRUCT
20*0b57cec5SDimitry Andric #include "RegisterInfos_ppc64le.h"
21*0b57cec5SDimitry Andric #undef DECLARE_REGISTER_INFOS_PPC64LE_STRUCT
22*0b57cec5SDimitry Andric 
23*0b57cec5SDimitry Andric static const lldb_private::RegisterInfo *
GetRegisterInfoPtr(const lldb_private::ArchSpec & target_arch)24*0b57cec5SDimitry Andric GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
25*0b57cec5SDimitry Andric   switch (target_arch.GetMachine()) {
26*0b57cec5SDimitry Andric   case llvm::Triple::ppc64le:
27*0b57cec5SDimitry Andric     return g_register_infos_ppc64le;
28*0b57cec5SDimitry Andric   default:
29*0b57cec5SDimitry Andric     assert(false && "Unhandled target architecture.");
30*0b57cec5SDimitry Andric     return nullptr;
31*0b57cec5SDimitry Andric   }
32*0b57cec5SDimitry Andric }
33*0b57cec5SDimitry Andric 
34*0b57cec5SDimitry Andric static uint32_t
GetRegisterInfoCount(const lldb_private::ArchSpec & target_arch)35*0b57cec5SDimitry Andric GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
36*0b57cec5SDimitry Andric   switch (target_arch.GetMachine()) {
37*0b57cec5SDimitry Andric   case llvm::Triple::ppc64le:
38*0b57cec5SDimitry Andric     return static_cast<uint32_t>(sizeof(g_register_infos_ppc64le) /
39*0b57cec5SDimitry Andric                                  sizeof(g_register_infos_ppc64le[0]));
40*0b57cec5SDimitry Andric   default:
41*0b57cec5SDimitry Andric     assert(false && "Unhandled target architecture.");
42*0b57cec5SDimitry Andric     return 0;
43*0b57cec5SDimitry Andric   }
44*0b57cec5SDimitry Andric }
45*0b57cec5SDimitry Andric 
RegisterInfoPOSIX_ppc64le(const lldb_private::ArchSpec & target_arch)46*0b57cec5SDimitry Andric RegisterInfoPOSIX_ppc64le::RegisterInfoPOSIX_ppc64le(
47*0b57cec5SDimitry Andric     const lldb_private::ArchSpec &target_arch)
48*0b57cec5SDimitry Andric     : lldb_private::RegisterInfoInterface(target_arch),
49*0b57cec5SDimitry Andric       m_register_info_p(GetRegisterInfoPtr(target_arch)),
50*0b57cec5SDimitry Andric       m_register_info_count(GetRegisterInfoCount(target_arch)) {}
51*0b57cec5SDimitry Andric 
GetGPRSize() const52*0b57cec5SDimitry Andric size_t RegisterInfoPOSIX_ppc64le::GetGPRSize() const {
53*0b57cec5SDimitry Andric   return sizeof(GPR);
54*0b57cec5SDimitry Andric }
55*0b57cec5SDimitry Andric 
56*0b57cec5SDimitry Andric const lldb_private::RegisterInfo *
GetRegisterInfo() const57*0b57cec5SDimitry Andric RegisterInfoPOSIX_ppc64le::GetRegisterInfo() const {
58*0b57cec5SDimitry Andric   return m_register_info_p;
59*0b57cec5SDimitry Andric }
60*0b57cec5SDimitry Andric 
GetRegisterCount() const61*0b57cec5SDimitry Andric uint32_t RegisterInfoPOSIX_ppc64le::GetRegisterCount() const {
62*0b57cec5SDimitry Andric   return m_register_info_count;
63*0b57cec5SDimitry Andric }
64