1*0b57cec5SDimitry Andric //===-- RegisterContextMach_i386.cpp --------------------------------------===//
2*0b57cec5SDimitry Andric //
3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*0b57cec5SDimitry Andric //
7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
8*0b57cec5SDimitry Andric
9*0b57cec5SDimitry Andric #if defined(__APPLE__)
10*0b57cec5SDimitry Andric
11*0b57cec5SDimitry Andric #include <mach/thread_act.h>
12*0b57cec5SDimitry Andric
13*0b57cec5SDimitry Andric #include "RegisterContextMach_i386.h"
14*0b57cec5SDimitry Andric
15*0b57cec5SDimitry Andric using namespace lldb;
16*0b57cec5SDimitry Andric using namespace lldb_private;
17*0b57cec5SDimitry Andric
RegisterContextMach_i386(Thread & thread,uint32_t concrete_frame_idx)18*0b57cec5SDimitry Andric RegisterContextMach_i386::RegisterContextMach_i386(Thread &thread,
19*0b57cec5SDimitry Andric uint32_t concrete_frame_idx)
20*0b57cec5SDimitry Andric : RegisterContextDarwin_i386(thread, concrete_frame_idx) {}
21*0b57cec5SDimitry Andric
22*0b57cec5SDimitry Andric RegisterContextMach_i386::~RegisterContextMach_i386() = default;
23*0b57cec5SDimitry Andric
DoReadGPR(lldb::tid_t tid,int flavor,GPR & gpr)24*0b57cec5SDimitry Andric int RegisterContextMach_i386::DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) {
25*0b57cec5SDimitry Andric mach_msg_type_number_t count = GPRWordCount;
26*0b57cec5SDimitry Andric return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
27*0b57cec5SDimitry Andric }
28*0b57cec5SDimitry Andric
DoReadFPU(lldb::tid_t tid,int flavor,FPU & fpu)29*0b57cec5SDimitry Andric int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) {
30*0b57cec5SDimitry Andric mach_msg_type_number_t count = FPUWordCount;
31*0b57cec5SDimitry Andric return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
32*0b57cec5SDimitry Andric }
33*0b57cec5SDimitry Andric
DoReadEXC(lldb::tid_t tid,int flavor,EXC & exc)34*0b57cec5SDimitry Andric int RegisterContextMach_i386::DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) {
35*0b57cec5SDimitry Andric mach_msg_type_number_t count = EXCWordCount;
36*0b57cec5SDimitry Andric return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
37*0b57cec5SDimitry Andric }
38*0b57cec5SDimitry Andric
DoWriteGPR(lldb::tid_t tid,int flavor,const GPR & gpr)39*0b57cec5SDimitry Andric int RegisterContextMach_i386::DoWriteGPR(lldb::tid_t tid, int flavor,
40*0b57cec5SDimitry Andric const GPR &gpr) {
41*0b57cec5SDimitry Andric return ::thread_set_state(
42*0b57cec5SDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<GPR *>(&gpr)),
43*0b57cec5SDimitry Andric GPRWordCount);
44*0b57cec5SDimitry Andric }
45*0b57cec5SDimitry Andric
DoWriteFPU(lldb::tid_t tid,int flavor,const FPU & fpu)46*0b57cec5SDimitry Andric int RegisterContextMach_i386::DoWriteFPU(lldb::tid_t tid, int flavor,
47*0b57cec5SDimitry Andric const FPU &fpu) {
48*0b57cec5SDimitry Andric return ::thread_set_state(
49*0b57cec5SDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)),
50*0b57cec5SDimitry Andric FPUWordCount);
51*0b57cec5SDimitry Andric }
52*0b57cec5SDimitry Andric
DoWriteEXC(lldb::tid_t tid,int flavor,const EXC & exc)53*0b57cec5SDimitry Andric int RegisterContextMach_i386::DoWriteEXC(lldb::tid_t tid, int flavor,
54*0b57cec5SDimitry Andric const EXC &exc) {
55*0b57cec5SDimitry Andric return ::thread_set_state(
56*0b57cec5SDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<EXC *>(&exc)),
57*0b57cec5SDimitry Andric EXCWordCount);
58*0b57cec5SDimitry Andric }
59*0b57cec5SDimitry Andric
60*0b57cec5SDimitry Andric #endif
61