xref: /freebsd-13.1/sys/dev/uart/uart_core.c (revision 4cf75455)
1 /*-
2  * Copyright (c) 2003 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #ifndef KLD_MODULE
31 #include "opt_comconsole.h"
32 #endif
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/cons.h>
39 #include <sys/fcntl.h>
40 #include <sys/interrupt.h>
41 #include <sys/kdb.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/queue.h>
45 #include <sys/reboot.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48 #include <machine/resource.h>
49 #include <machine/stdarg.h>
50 
51 #include <dev/uart/uart.h>
52 #include <dev/uart/uart_bus.h>
53 #include <dev/uart/uart_cpu.h>
54 
55 #include "uart_if.h"
56 
57 devclass_t uart_devclass;
58 char uart_driver_name[] = "uart";
59 
60 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
61     SLIST_HEAD_INITIALIZER(uart_sysdevs);
62 
63 MALLOC_DEFINE(M_UART, "UART", "UART driver");
64 
65 void
66 uart_add_sysdev(struct uart_devinfo *di)
67 {
68 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
69 }
70 
71 const char *
72 uart_getname(struct uart_class *uc)
73 {
74 	return ((uc != NULL) ? uc->name : NULL);
75 }
76 
77 struct uart_ops *
78 uart_getops(struct uart_class *uc)
79 {
80 	return ((uc != NULL) ? uc->uc_ops : NULL);
81 }
82 
83 int
84 uart_getrange(struct uart_class *uc)
85 {
86 	return ((uc != NULL) ? uc->uc_range : 0);
87 }
88 
89 /*
90  * Schedule a soft interrupt. We do this on the 0 to !0 transition
91  * of the TTY pending interrupt status.
92  */
93 void
94 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
95 {
96 	uint32_t new, old;
97 
98 	do {
99 		old = sc->sc_ttypend;
100 		new = old | ipend;
101 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
102 
103 	if ((old & SER_INT_MASK) == 0)
104 		swi_sched(sc->sc_softih, 0);
105 }
106 
107 /*
108  * A break condition has been detected. We treat the break condition as
109  * a special case that should not happen during normal operation. When
110  * the break condition is to be passed to higher levels in the form of
111  * a NUL character, we really want the break to be in the right place in
112  * the input stream. The overhead to achieve that is not in relation to
113  * the exceptional nature of the break condition, so we permit ourselves
114  * to be sloppy.
115  */
116 static __inline int
117 uart_intr_break(void *arg)
118 {
119 	struct uart_softc *sc = arg;
120 
121 #if defined(KDB)
122 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
123 		if (kdb_break())
124 			return (0);
125 	}
126 #endif
127 	if (sc->sc_opened)
128 		uart_sched_softih(sc, SER_INT_BREAK);
129 	return (0);
130 }
131 
132 /*
133  * Handle a receiver overrun situation. We lost at least 1 byte in the
134  * input stream and it's our job to contain the situation. We grab as
135  * much of the data we can, but otherwise flush the receiver FIFO to
136  * create some breathing room. The net effect is that we avoid the
137  * overrun condition to happen for the next X characters, where X is
138  * related to the FIFO size at the cost of loosing data right away.
139  * So, instead of having multiple overrun interrupts in close proximity
140  * to each other and possibly pessimizing UART interrupt latency for
141  * other UARTs in a multiport configuration, we create a longer segment
142  * of missing characters by freeing up the FIFO.
143  * Each overrun condition is marked in the input buffer by a token. The
144  * token represents the loss of at least one, but possible more bytes in
145  * the input stream.
146  */
147 static __inline int
148 uart_intr_overrun(void *arg)
149 {
150 	struct uart_softc *sc = arg;
151 
152 	if (sc->sc_opened) {
153 		UART_RECEIVE(sc);
154 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
155 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
156 		uart_sched_softih(sc, SER_INT_RXREADY);
157 	}
158 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
159 	return (0);
160 }
161 
162 /*
163  * Received data ready.
164  */
165 static __inline int
166 uart_intr_rxready(void *arg)
167 {
168 	struct uart_softc *sc = arg;
169 	int rxp;
170 
171 	rxp = sc->sc_rxput;
172 	UART_RECEIVE(sc);
173 #if defined(KDB)
174 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
175 		while (rxp != sc->sc_rxput) {
176 			kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
177 			if (rxp == sc->sc_rxbufsz)
178 				rxp = 0;
179 		}
180 	}
181 #endif
182 	if (sc->sc_opened)
183 		uart_sched_softih(sc, SER_INT_RXREADY);
184 	else
185 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
186 	return (1);
187 }
188 
189 /*
190  * Line or modem status change (OOB signalling).
191  * We pass the signals to the software interrupt handler for further
192  * processing. Note that we merge the delta bits, but set the state
193  * bits. This is to avoid loosing state transitions due to having more
194  * than 1 hardware interrupt between software interrupts.
195  */
196 static __inline int
197 uart_intr_sigchg(void *arg)
198 {
199 	struct uart_softc *sc = arg;
200 	int new, old, sig;
201 
202 	sig = UART_GETSIG(sc);
203 
204 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
205 		if (sig & UART_SIG_DPPS) {
206 			pps_capture(&sc->sc_pps);
207 			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
208 			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
209 		}
210 	}
211 
212 	/*
213 	 * Keep track of signal changes, even when the device is not
214 	 * opened. This allows us to inform upper layers about a
215 	 * possible loss of DCD and thus the existence of a (possibly)
216 	 * different connection when we have DCD back, during the time
217 	 * that the device was closed.
218 	 */
219 	do {
220 		old = sc->sc_ttypend;
221 		new = old & ~SER_MASK_STATE;
222 		new |= sig & SER_INT_SIGMASK;
223 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
224 
225 	if (sc->sc_opened)
226 		uart_sched_softih(sc, SER_INT_SIGCHG);
227 	return (1);
228 }
229 
230 /*
231  * The transmitter can accept more data.
232  */
233 static __inline int
234 uart_intr_txidle(void *arg)
235 {
236 	struct uart_softc *sc = arg;
237 
238 	if (sc->sc_txbusy) {
239 		sc->sc_txbusy = 0;
240 		uart_sched_softih(sc, SER_INT_TXIDLE);
241 	}
242 	return (0);
243 }
244 
245 static int
246 uart_intr(void *arg)
247 {
248 	struct uart_softc *sc = arg;
249 	int flag = 0, ipend;
250 
251 	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
252 		flag = 1;
253 		if (ipend & SER_INT_OVERRUN)
254 			uart_intr_overrun(sc);
255 		if (ipend & SER_INT_BREAK)
256 			uart_intr_break(sc);
257 		if (ipend & SER_INT_RXREADY)
258 			uart_intr_rxready(sc);
259 		if (ipend & SER_INT_SIGCHG)
260 			uart_intr_sigchg(sc);
261 		if (ipend & SER_INT_TXIDLE)
262 			uart_intr_txidle(sc);
263 	}
264 	return((flag)?FILTER_HANDLED:FILTER_STRAY);
265 }
266 
267 serdev_intr_t *
268 uart_bus_ihand(device_t dev, int ipend)
269 {
270 
271 	switch (ipend) {
272 	case SER_INT_BREAK:
273 		return (uart_intr_break);
274 	case SER_INT_OVERRUN:
275 		return (uart_intr_overrun);
276 	case SER_INT_RXREADY:
277 		return (uart_intr_rxready);
278 	case SER_INT_SIGCHG:
279 		return (uart_intr_sigchg);
280 	case SER_INT_TXIDLE:
281 		return (uart_intr_txidle);
282 	}
283 	return (NULL);
284 }
285 
286 int
287 uart_bus_ipend(device_t dev)
288 {
289 	struct uart_softc *sc;
290 
291 	sc = device_get_softc(dev);
292 	return (UART_IPEND(sc));
293 }
294 
295 int
296 uart_bus_sysdev(device_t dev)
297 {
298 	struct uart_softc *sc;
299 
300 	sc = device_get_softc(dev);
301 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
302 }
303 
304 int
305 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
306 {
307 	struct uart_softc *sc;
308 	struct uart_devinfo *sysdev;
309 	int error;
310 
311 	sc = device_get_softc(dev);
312 
313 	/*
314 	 * All uart_class references are weak. Check that the needed
315 	 * class has been compiled-in. Fail if not.
316 	 */
317 	if (sc->sc_class == NULL)
318 		return (ENXIO);
319 
320 	/*
321 	 * Initialize the instance. Note that the instance (=softc) does
322 	 * not necessarily match the hardware specific softc. We can't do
323 	 * anything about it now, because we may not attach to the device.
324 	 * Hardware drivers cannot use any of the class specific fields
325 	 * while probing.
326 	 */
327 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
328 	sc->sc_dev = dev;
329 	if (device_get_desc(dev) == NULL)
330 		device_set_desc(dev, uart_getname(sc->sc_class));
331 
332 	/*
333 	 * Allocate the register resource. We assume that all UARTs have
334 	 * a single register window in either I/O port space or memory
335 	 * mapped I/O space. Any UART that needs multiple windows will
336 	 * consequently not be supported by this driver as-is. We try I/O
337 	 * port space first because that's the common case.
338 	 */
339 	sc->sc_rrid = rid;
340 	sc->sc_rtype = SYS_RES_IOPORT;
341 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
342 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
343 	if (sc->sc_rres == NULL) {
344 		sc->sc_rrid = rid;
345 		sc->sc_rtype = SYS_RES_MEMORY;
346 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
347 		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
348 		    RF_ACTIVE);
349 		if (sc->sc_rres == NULL)
350 			return (ENXIO);
351 	}
352 
353 	/*
354 	 * Fill in the bus access structure and compare this device with
355 	 * a possible console device and/or a debug port. We set the flags
356 	 * in the softc so that the hardware dependent probe can adjust
357 	 * accordingly. In general, you don't want to permanently disrupt
358 	 * console I/O.
359 	 */
360 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
361 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
362 	sc->sc_bas.chan = chan;
363 	sc->sc_bas.regshft = regshft;
364 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
365 
366 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
367 		if (chan == sysdev->bas.chan &&
368 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
369 			/* XXX check if ops matches class. */
370 			sc->sc_sysdev = sysdev;
371 			sysdev->bas.rclk = sc->sc_bas.rclk;
372 		}
373 	}
374 
375 	error = UART_PROBE(sc);
376 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
377 	return ((error) ? error : BUS_PROBE_DEFAULT);
378 }
379 
380 int
381 uart_bus_attach(device_t dev)
382 {
383 	struct uart_softc *sc, *sc0;
384 	const char *sep;
385 	int error;
386 
387 	/*
388 	 * The sc_class field defines the type of UART we're going to work
389 	 * with and thus the size of the softc. Replace the generic softc
390 	 * with one that matches the UART now that we're certain we handle
391 	 * the device.
392 	 */
393 	sc0 = device_get_softc(dev);
394 	if (sc0->sc_class->size > sizeof(*sc)) {
395 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
396 		bcopy(sc0, sc, sizeof(*sc));
397 		device_set_softc(dev, sc);
398 	} else
399 		sc = sc0;
400 
401 	/*
402 	 * Protect ourselves against interrupts while we're not completely
403 	 * finished attaching and initializing. We don't expect interrupts
404 	 * until after UART_ATTACH() though.
405 	 */
406 	sc->sc_leaving = 1;
407 
408 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
409 	if (sc->sc_hwmtx == NULL)
410 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
411 
412 	/*
413 	 * Re-allocate. We expect that the softc contains the information
414 	 * collected by uart_bus_probe() intact.
415 	 */
416 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
417 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
418 	if (sc->sc_rres == NULL) {
419 		mtx_destroy(&sc->sc_hwmtx_s);
420 		return (ENXIO);
421 	}
422 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
423 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
424 
425 	sc->sc_irid = 0;
426 	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
427 	    RF_ACTIVE | RF_SHAREABLE);
428 	if (sc->sc_ires != NULL) {
429 		error = bus_setup_intr(dev,
430 		    sc->sc_ires, INTR_TYPE_TTY,
431 		    uart_intr, NULL, sc, &sc->sc_icookie);
432 		if (error)
433 			error = bus_setup_intr(dev,
434 			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
435 			    NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
436 		else
437 			sc->sc_fastintr = 1;
438 
439 		if (error) {
440 			device_printf(dev, "could not activate interrupt\n");
441 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
442 			    sc->sc_ires);
443 			sc->sc_ires = NULL;
444 		}
445 	}
446 	if (sc->sc_ires == NULL) {
447 		/* XXX no interrupt resource. Force polled mode. */
448 		sc->sc_polled = 1;
449 	}
450 
451 	sc->sc_rxbufsz = 384;
452 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
453 	    M_UART, M_WAITOK);
454 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
455 	    M_UART, M_WAITOK);
456 
457 	error = UART_ATTACH(sc);
458 	if (error)
459 		goto fail;
460 
461 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
462 		sep = "";
463 		device_print_prettyname(dev);
464 		if (sc->sc_hwiflow) {
465 			printf("%sRTS iflow", sep);
466 			sep = ", ";
467 		}
468 		if (sc->sc_hwoflow) {
469 			printf("%sCTS oflow", sep);
470 			sep = ", ";
471 		}
472 		printf("\n");
473 	}
474 
475 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
476 		sep = "";
477 		device_print_prettyname(dev);
478 		if (sc->sc_fastintr) {
479 			printf("%sfast interrupt", sep);
480 			sep = ", ";
481 		}
482 		if (sc->sc_polled) {
483 			printf("%spolled mode", sep);
484 			sep = ", ";
485 		}
486 		printf("\n");
487 	}
488 
489 	if (sc->sc_sysdev != NULL) {
490 		if (sc->sc_sysdev->baudrate == 0) {
491 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
492 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
493 				sc->sc_sysdev->baudrate = -1;
494 		}
495 		switch (sc->sc_sysdev->type) {
496 		case UART_DEV_CONSOLE:
497 			device_printf(dev, "console");
498 			break;
499 		case UART_DEV_DBGPORT:
500 			device_printf(dev, "debug port");
501 			break;
502 		case UART_DEV_KEYBOARD:
503 			device_printf(dev, "keyboard");
504 			break;
505 		default:
506 			device_printf(dev, "unknown system device");
507 			break;
508 		}
509 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
510 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
511 		    sc->sc_sysdev->stopbits);
512 	}
513 
514 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
515 	pps_init(&sc->sc_pps);
516 
517 	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
518 	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
519 	if (error)
520 		goto fail;
521 
522 	if (sc->sc_sysdev != NULL)
523 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
524 
525 	sc->sc_leaving = 0;
526 	uart_intr(sc);
527 	return (0);
528 
529  fail:
530 	free(sc->sc_txbuf, M_UART);
531 	free(sc->sc_rxbuf, M_UART);
532 
533 	if (sc->sc_ires != NULL) {
534 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
535 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
536 		    sc->sc_ires);
537 	}
538 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
539 
540 	mtx_destroy(&sc->sc_hwmtx_s);
541 
542 	return (error);
543 }
544 
545 int
546 uart_bus_detach(device_t dev)
547 {
548 	struct uart_softc *sc;
549 
550 	sc = device_get_softc(dev);
551 
552 	sc->sc_leaving = 1;
553 
554 	if (sc->sc_sysdev != NULL)
555 		sc->sc_sysdev->hwmtx = NULL;
556 
557 	UART_DETACH(sc);
558 
559 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
560 		(*sc->sc_sysdev->detach)(sc);
561 	else
562 		uart_tty_detach(sc);
563 
564 	free(sc->sc_txbuf, M_UART);
565 	free(sc->sc_rxbuf, M_UART);
566 
567 	if (sc->sc_ires != NULL) {
568 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
569 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
570 		    sc->sc_ires);
571 	}
572 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
573 
574 	mtx_destroy(&sc->sc_hwmtx_s);
575 
576 	if (sc->sc_class->size > sizeof(*sc)) {
577 		device_set_softc(dev, NULL);
578 		free(sc, M_UART);
579 	} else
580 		device_set_softc(dev, NULL);
581 
582 	return (0);
583 }
584