1098ca2bdSWarner Losh /*- 227d5dc18SMarcel Moolenaar * Copyright (c) 2003 Marcel Moolenaar 327d5dc18SMarcel Moolenaar * All rights reserved. 427d5dc18SMarcel Moolenaar * 527d5dc18SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without 627d5dc18SMarcel Moolenaar * modification, are permitted provided that the following conditions 727d5dc18SMarcel Moolenaar * are met: 827d5dc18SMarcel Moolenaar * 927d5dc18SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright 1027d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer. 1127d5dc18SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright 1227d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the 1327d5dc18SMarcel Moolenaar * documentation and/or other materials provided with the distribution. 1427d5dc18SMarcel Moolenaar * 1527d5dc18SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1627d5dc18SMarcel Moolenaar * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1727d5dc18SMarcel Moolenaar * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1827d5dc18SMarcel Moolenaar * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1927d5dc18SMarcel Moolenaar * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2027d5dc18SMarcel Moolenaar * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2127d5dc18SMarcel Moolenaar * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2227d5dc18SMarcel Moolenaar * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2327d5dc18SMarcel Moolenaar * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2427d5dc18SMarcel Moolenaar * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2527d5dc18SMarcel Moolenaar */ 2627d5dc18SMarcel Moolenaar 2727d5dc18SMarcel Moolenaar #include <sys/cdefs.h> 2827d5dc18SMarcel Moolenaar __FBSDID("$FreeBSD$"); 2927d5dc18SMarcel Moolenaar 3027d5dc18SMarcel Moolenaar #ifndef KLD_MODULE 3127d5dc18SMarcel Moolenaar #include "opt_comconsole.h" 3227d5dc18SMarcel Moolenaar #endif 3327d5dc18SMarcel Moolenaar 3427d5dc18SMarcel Moolenaar #include <sys/param.h> 3527d5dc18SMarcel Moolenaar #include <sys/systm.h> 3627d5dc18SMarcel Moolenaar #include <sys/bus.h> 3727d5dc18SMarcel Moolenaar #include <sys/conf.h> 3827d5dc18SMarcel Moolenaar #include <sys/cons.h> 3927d5dc18SMarcel Moolenaar #include <sys/fcntl.h> 4027d5dc18SMarcel Moolenaar #include <sys/interrupt.h> 41591bc192SMarcel Moolenaar #include <sys/kdb.h> 4227d5dc18SMarcel Moolenaar #include <sys/kernel.h> 4327d5dc18SMarcel Moolenaar #include <sys/malloc.h> 4427d5dc18SMarcel Moolenaar #include <sys/queue.h> 4527d5dc18SMarcel Moolenaar #include <sys/reboot.h> 4627d5dc18SMarcel Moolenaar #include <machine/bus.h> 4727d5dc18SMarcel Moolenaar #include <sys/rman.h> 4827d5dc18SMarcel Moolenaar #include <sys/termios.h> 4927d5dc18SMarcel Moolenaar #include <sys/tty.h> 5027d5dc18SMarcel Moolenaar #include <machine/resource.h> 5127d5dc18SMarcel Moolenaar #include <machine/stdarg.h> 5227d5dc18SMarcel Moolenaar 5327d5dc18SMarcel Moolenaar #include <dev/uart/uart.h> 5427d5dc18SMarcel Moolenaar #include <dev/uart/uart_bus.h> 5527d5dc18SMarcel Moolenaar #include <dev/uart/uart_cpu.h> 5627d5dc18SMarcel Moolenaar 5727d5dc18SMarcel Moolenaar #include "uart_if.h" 5827d5dc18SMarcel Moolenaar 5927d5dc18SMarcel Moolenaar devclass_t uart_devclass; 6027d5dc18SMarcel Moolenaar char uart_driver_name[] = "uart"; 6127d5dc18SMarcel Moolenaar 6227d5dc18SMarcel Moolenaar SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 6327d5dc18SMarcel Moolenaar SLIST_HEAD_INITIALIZER(uart_sysdevs); 6427d5dc18SMarcel Moolenaar 6527d5dc18SMarcel Moolenaar MALLOC_DEFINE(M_UART, "UART", "UART driver"); 6627d5dc18SMarcel Moolenaar 6727d5dc18SMarcel Moolenaar void 6827d5dc18SMarcel Moolenaar uart_add_sysdev(struct uart_devinfo *di) 6927d5dc18SMarcel Moolenaar { 7027d5dc18SMarcel Moolenaar SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 7127d5dc18SMarcel Moolenaar } 7227d5dc18SMarcel Moolenaar 7327d5dc18SMarcel Moolenaar /* 7427d5dc18SMarcel Moolenaar * A break condition has been detected. We treat the break condition as 7527d5dc18SMarcel Moolenaar * a special case that should not happen during normal operation. When 7627d5dc18SMarcel Moolenaar * the break condition is to be passed to higher levels in the form of 7727d5dc18SMarcel Moolenaar * a NUL character, we really want the break to be in the right place in 7827d5dc18SMarcel Moolenaar * the input stream. The overhead to achieve that is not in relation to 7927d5dc18SMarcel Moolenaar * the exceptional nature of the break condition, so we permit ourselves 8027d5dc18SMarcel Moolenaar * to be sloppy. 8127d5dc18SMarcel Moolenaar */ 8227d5dc18SMarcel Moolenaar static void 8327d5dc18SMarcel Moolenaar uart_intr_break(struct uart_softc *sc) 8427d5dc18SMarcel Moolenaar { 8527d5dc18SMarcel Moolenaar 86591bc192SMarcel Moolenaar #if defined(KDB) && defined(BREAK_TO_DEBUGGER) 8727d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 88591bc192SMarcel Moolenaar kdb_enter("Line break on console"); 8927d5dc18SMarcel Moolenaar return; 9027d5dc18SMarcel Moolenaar } 9127d5dc18SMarcel Moolenaar #endif 9227d5dc18SMarcel Moolenaar if (sc->sc_opened) 9327d5dc18SMarcel Moolenaar atomic_set_32(&sc->sc_ttypend, UART_IPEND_BREAK); 9427d5dc18SMarcel Moolenaar } 9527d5dc18SMarcel Moolenaar 9627d5dc18SMarcel Moolenaar /* 9727d5dc18SMarcel Moolenaar * Handle a receiver overrun situation. We lost at least 1 byte in the 9827d5dc18SMarcel Moolenaar * input stream and it's our job to contain the situation. We grab as 9927d5dc18SMarcel Moolenaar * much of the data we can, but otherwise flush the receiver FIFO to 10027d5dc18SMarcel Moolenaar * create some breathing room. The net effect is that we avoid the 10127d5dc18SMarcel Moolenaar * overrun condition to happen for the next X characters, where X is 10227d5dc18SMarcel Moolenaar * related to the FIFO size at the cost of loosing data right away. 10327d5dc18SMarcel Moolenaar * So, instead of having multiple overrun interrupts in close proximity 10427d5dc18SMarcel Moolenaar * to each other and possibly pessimizing UART interrupt latency for 10527d5dc18SMarcel Moolenaar * other UARTs in a multiport configuration, we create a longer segment 10627d5dc18SMarcel Moolenaar * of missing characters by freeing up the FIFO. 10727d5dc18SMarcel Moolenaar * Each overrun condition is marked in the input buffer by a token. The 10827d5dc18SMarcel Moolenaar * token represents the loss of at least one, but possible more bytes in 10927d5dc18SMarcel Moolenaar * the input stream. 11027d5dc18SMarcel Moolenaar */ 11127d5dc18SMarcel Moolenaar static void 11227d5dc18SMarcel Moolenaar uart_intr_overrun(struct uart_softc *sc) 11327d5dc18SMarcel Moolenaar { 11427d5dc18SMarcel Moolenaar 11527d5dc18SMarcel Moolenaar if (sc->sc_opened) { 11627d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 11727d5dc18SMarcel Moolenaar if (uart_rx_put(sc, UART_STAT_OVERRUN)) 11827d5dc18SMarcel Moolenaar sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 11927d5dc18SMarcel Moolenaar atomic_set_32(&sc->sc_ttypend, UART_IPEND_RXREADY); 12027d5dc18SMarcel Moolenaar } 12127d5dc18SMarcel Moolenaar UART_FLUSH(sc, UART_FLUSH_RECEIVER); 12227d5dc18SMarcel Moolenaar } 12327d5dc18SMarcel Moolenaar 12427d5dc18SMarcel Moolenaar /* 12527d5dc18SMarcel Moolenaar * Received data ready. 12627d5dc18SMarcel Moolenaar */ 12727d5dc18SMarcel Moolenaar static void 12827d5dc18SMarcel Moolenaar uart_intr_rxready(struct uart_softc *sc) 12927d5dc18SMarcel Moolenaar { 13027d5dc18SMarcel Moolenaar int rxp; 13127d5dc18SMarcel Moolenaar 13227d5dc18SMarcel Moolenaar rxp = sc->sc_rxput; 13327d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 134591bc192SMarcel Moolenaar #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER) 13527d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 13627d5dc18SMarcel Moolenaar while (rxp != sc->sc_rxput) { 137591bc192SMarcel Moolenaar if (kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk)) 138591bc192SMarcel Moolenaar kdb_enter("Break sequence on console"); 13927d5dc18SMarcel Moolenaar if (rxp == sc->sc_rxbufsz) 14027d5dc18SMarcel Moolenaar rxp = 0; 14127d5dc18SMarcel Moolenaar } 14227d5dc18SMarcel Moolenaar } 14327d5dc18SMarcel Moolenaar #endif 14427d5dc18SMarcel Moolenaar if (sc->sc_opened) 14527d5dc18SMarcel Moolenaar atomic_set_32(&sc->sc_ttypend, UART_IPEND_RXREADY); 14627d5dc18SMarcel Moolenaar else 14727d5dc18SMarcel Moolenaar sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 14827d5dc18SMarcel Moolenaar } 14927d5dc18SMarcel Moolenaar 15027d5dc18SMarcel Moolenaar /* 15127d5dc18SMarcel Moolenaar * Line or modem status change (OOB signalling). 15227d5dc18SMarcel Moolenaar * We pass the signals to the software interrupt handler for further 15327d5dc18SMarcel Moolenaar * processing. Note that we merge the delta bits, but set the state 15427d5dc18SMarcel Moolenaar * bits. This is to avoid loosing state transitions due to having more 15527d5dc18SMarcel Moolenaar * than 1 hardware interrupt between software interrupts. 15627d5dc18SMarcel Moolenaar */ 15727d5dc18SMarcel Moolenaar static void 15827d5dc18SMarcel Moolenaar uart_intr_sigchg(struct uart_softc *sc) 15927d5dc18SMarcel Moolenaar { 16027d5dc18SMarcel Moolenaar int new, old, sig; 16127d5dc18SMarcel Moolenaar 16227d5dc18SMarcel Moolenaar sig = UART_GETSIG(sc); 1638194412bSMarcel Moolenaar 1648194412bSMarcel Moolenaar if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1658194412bSMarcel Moolenaar if (sig & UART_SIG_DPPS) { 1668194412bSMarcel Moolenaar pps_capture(&sc->sc_pps); 1678194412bSMarcel Moolenaar pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? 1688194412bSMarcel Moolenaar PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1698194412bSMarcel Moolenaar } 1708194412bSMarcel Moolenaar } 1718194412bSMarcel Moolenaar 17227d5dc18SMarcel Moolenaar do { 17327d5dc18SMarcel Moolenaar old = sc->sc_ttypend; 17427d5dc18SMarcel Moolenaar new = old & ~UART_SIGMASK_STATE; 17527d5dc18SMarcel Moolenaar new |= sig & UART_IPEND_SIGMASK; 17627d5dc18SMarcel Moolenaar new |= UART_IPEND_SIGCHG; 17727d5dc18SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 17827d5dc18SMarcel Moolenaar } 17927d5dc18SMarcel Moolenaar 18027d5dc18SMarcel Moolenaar /* 18127d5dc18SMarcel Moolenaar * The transmitter can accept more data. 18227d5dc18SMarcel Moolenaar */ 18327d5dc18SMarcel Moolenaar static void 18427d5dc18SMarcel Moolenaar uart_intr_txidle(struct uart_softc *sc) 18527d5dc18SMarcel Moolenaar { 18627d5dc18SMarcel Moolenaar if (sc->sc_txbusy) { 18727d5dc18SMarcel Moolenaar sc->sc_txbusy = 0; 18827d5dc18SMarcel Moolenaar atomic_set_32(&sc->sc_ttypend, UART_IPEND_TXIDLE); 18927d5dc18SMarcel Moolenaar } 19027d5dc18SMarcel Moolenaar } 19127d5dc18SMarcel Moolenaar 19227d5dc18SMarcel Moolenaar static void 19327d5dc18SMarcel Moolenaar uart_intr(void *arg) 19427d5dc18SMarcel Moolenaar { 19527d5dc18SMarcel Moolenaar struct uart_softc *sc = arg; 19627d5dc18SMarcel Moolenaar int ipend; 19727d5dc18SMarcel Moolenaar 19827d5dc18SMarcel Moolenaar if (sc->sc_leaving) 19927d5dc18SMarcel Moolenaar return; 20027d5dc18SMarcel Moolenaar 20144ed791bSMarcel Moolenaar do { 20227d5dc18SMarcel Moolenaar ipend = UART_IPEND(sc); 20344ed791bSMarcel Moolenaar if (ipend == 0) 20444ed791bSMarcel Moolenaar break; 20527d5dc18SMarcel Moolenaar if (ipend & UART_IPEND_OVERRUN) 20627d5dc18SMarcel Moolenaar uart_intr_overrun(sc); 20727d5dc18SMarcel Moolenaar if (ipend & UART_IPEND_BREAK) 20827d5dc18SMarcel Moolenaar uart_intr_break(sc); 20927d5dc18SMarcel Moolenaar if (ipend & UART_IPEND_RXREADY) 21027d5dc18SMarcel Moolenaar uart_intr_rxready(sc); 21127d5dc18SMarcel Moolenaar if (ipend & UART_IPEND_SIGCHG) 21227d5dc18SMarcel Moolenaar uart_intr_sigchg(sc); 21327d5dc18SMarcel Moolenaar if (ipend & UART_IPEND_TXIDLE) 21427d5dc18SMarcel Moolenaar uart_intr_txidle(sc); 21544ed791bSMarcel Moolenaar } while (1); 21627d5dc18SMarcel Moolenaar 21727d5dc18SMarcel Moolenaar if (sc->sc_opened && sc->sc_ttypend != 0) 21827d5dc18SMarcel Moolenaar swi_sched(sc->sc_softih, 0); 21927d5dc18SMarcel Moolenaar } 22027d5dc18SMarcel Moolenaar 22127d5dc18SMarcel Moolenaar int 222875f70dbSMarcel Moolenaar uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 22327d5dc18SMarcel Moolenaar { 22427d5dc18SMarcel Moolenaar struct uart_softc *sc; 22527d5dc18SMarcel Moolenaar struct uart_devinfo *sysdev; 22627d5dc18SMarcel Moolenaar int error; 22727d5dc18SMarcel Moolenaar 22827d5dc18SMarcel Moolenaar /* 22927d5dc18SMarcel Moolenaar * Initialize the instance. Note that the instance (=softc) does 23027d5dc18SMarcel Moolenaar * not necessarily match the hardware specific softc. We can't do 23127d5dc18SMarcel Moolenaar * anything about it now, because we may not attach to the device. 23227d5dc18SMarcel Moolenaar * Hardware drivers cannot use any of the class specific fields 23327d5dc18SMarcel Moolenaar * while probing. 23427d5dc18SMarcel Moolenaar */ 23527d5dc18SMarcel Moolenaar sc = device_get_softc(dev); 23627d5dc18SMarcel Moolenaar kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 23727d5dc18SMarcel Moolenaar sc->sc_dev = dev; 23827d5dc18SMarcel Moolenaar if (device_get_desc(dev) == NULL) 23927d5dc18SMarcel Moolenaar device_set_desc(dev, sc->sc_class->name); 24027d5dc18SMarcel Moolenaar 24127d5dc18SMarcel Moolenaar /* 24227d5dc18SMarcel Moolenaar * Allocate the register resource. We assume that all UARTs have 24327d5dc18SMarcel Moolenaar * a single register window in either I/O port space or memory 24427d5dc18SMarcel Moolenaar * mapped I/O space. Any UART that needs multiple windows will 24527d5dc18SMarcel Moolenaar * consequently not be supported by this driver as-is. We try I/O 24627d5dc18SMarcel Moolenaar * port space first because that's the common case. 24727d5dc18SMarcel Moolenaar */ 24827d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 24927d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_IOPORT; 25027d5dc18SMarcel Moolenaar sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 25127d5dc18SMarcel Moolenaar 0, ~0, sc->sc_class->uc_range, RF_ACTIVE); 25227d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) { 25327d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 25427d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_MEMORY; 25527d5dc18SMarcel Moolenaar sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, 25627d5dc18SMarcel Moolenaar &sc->sc_rrid, 0, ~0, sc->sc_class->uc_range, RF_ACTIVE); 25727d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) 25827d5dc18SMarcel Moolenaar return (ENXIO); 25927d5dc18SMarcel Moolenaar } 26027d5dc18SMarcel Moolenaar 26127d5dc18SMarcel Moolenaar /* 26227d5dc18SMarcel Moolenaar * Fill in the bus access structure and compare this device with 26327d5dc18SMarcel Moolenaar * a possible console device and/or a debug port. We set the flags 26427d5dc18SMarcel Moolenaar * in the softc so that the hardware dependent probe can adjust 26527d5dc18SMarcel Moolenaar * accordingly. In general, you don't want to permanently disrupt 26627d5dc18SMarcel Moolenaar * console I/O. 26727d5dc18SMarcel Moolenaar */ 26827d5dc18SMarcel Moolenaar sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 26927d5dc18SMarcel Moolenaar sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 270875f70dbSMarcel Moolenaar sc->sc_bas.chan = chan; 27127d5dc18SMarcel Moolenaar sc->sc_bas.regshft = regshft; 27227d5dc18SMarcel Moolenaar sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 27327d5dc18SMarcel Moolenaar 27427d5dc18SMarcel Moolenaar SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 275875f70dbSMarcel Moolenaar if (chan == sysdev->bas.chan && 276875f70dbSMarcel Moolenaar uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 27727d5dc18SMarcel Moolenaar /* XXX check if ops matches class. */ 27827d5dc18SMarcel Moolenaar sc->sc_sysdev = sysdev; 27927d5dc18SMarcel Moolenaar break; 28027d5dc18SMarcel Moolenaar } 28127d5dc18SMarcel Moolenaar } 28227d5dc18SMarcel Moolenaar 28327d5dc18SMarcel Moolenaar error = UART_PROBE(sc); 28427d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 285*b923a710SMarcel Moolenaar return ((error) ? error : BUS_PROBE_DEFAULT); 28627d5dc18SMarcel Moolenaar } 28727d5dc18SMarcel Moolenaar 28827d5dc18SMarcel Moolenaar int 28927d5dc18SMarcel Moolenaar uart_bus_attach(device_t dev) 29027d5dc18SMarcel Moolenaar { 29127d5dc18SMarcel Moolenaar struct uart_softc *sc, *sc0; 29227d5dc18SMarcel Moolenaar const char *sep; 29327d5dc18SMarcel Moolenaar int error; 29427d5dc18SMarcel Moolenaar 29527d5dc18SMarcel Moolenaar /* 29627d5dc18SMarcel Moolenaar * The sc_class field defines the type of UART we're going to work 29727d5dc18SMarcel Moolenaar * with and thus the size of the softc. Replace the generic softc 29827d5dc18SMarcel Moolenaar * with one that matches the UART now that we're certain we handle 29927d5dc18SMarcel Moolenaar * the device. 30027d5dc18SMarcel Moolenaar */ 30127d5dc18SMarcel Moolenaar sc0 = device_get_softc(dev); 30227d5dc18SMarcel Moolenaar if (sc0->sc_class->size > sizeof(*sc)) { 30327d5dc18SMarcel Moolenaar sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 30427d5dc18SMarcel Moolenaar bcopy(sc0, sc, sizeof(*sc)); 30527d5dc18SMarcel Moolenaar device_set_softc(dev, sc); 30627d5dc18SMarcel Moolenaar } else 30727d5dc18SMarcel Moolenaar sc = sc0; 30827d5dc18SMarcel Moolenaar 30927d5dc18SMarcel Moolenaar /* 31027d5dc18SMarcel Moolenaar * Protect ourselves against interrupts while we're not completely 31127d5dc18SMarcel Moolenaar * finished attaching and initializing. We don't expect interrupts 31227d5dc18SMarcel Moolenaar * until after UART_ATTACH() though. 31327d5dc18SMarcel Moolenaar */ 31427d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 31527d5dc18SMarcel Moolenaar 31606287620SMarcel Moolenaar mtx_init(&sc->sc_hwmtx, "uart_hwmtx", NULL, MTX_SPIN); 31706287620SMarcel Moolenaar 31827d5dc18SMarcel Moolenaar /* 31927d5dc18SMarcel Moolenaar * Re-allocate. We expect that the softc contains the information 32027d5dc18SMarcel Moolenaar * collected by uart_bus_probe() intact. 32127d5dc18SMarcel Moolenaar */ 32227d5dc18SMarcel Moolenaar sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 32327d5dc18SMarcel Moolenaar 0, ~0, sc->sc_class->uc_range, RF_ACTIVE); 3242682e7b6SMarius Strobl if (sc->sc_rres == NULL) { 3252682e7b6SMarius Strobl mtx_destroy(&sc->sc_hwmtx); 32627d5dc18SMarcel Moolenaar return (ENXIO); 3272682e7b6SMarius Strobl } 328b8759afcSYoshihiro Takahashi sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 329b8759afcSYoshihiro Takahashi sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 330b8759afcSYoshihiro Takahashi 33127d5dc18SMarcel Moolenaar sc->sc_irid = 0; 3325f96beb9SNate Lawson sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, 3332682e7b6SMarius Strobl RF_ACTIVE | RF_SHAREABLE); 33427d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 33527d5dc18SMarcel Moolenaar error = BUS_SETUP_INTR(device_get_parent(dev), dev, 33627d5dc18SMarcel Moolenaar sc->sc_ires, INTR_TYPE_TTY | INTR_FAST, uart_intr, 33727d5dc18SMarcel Moolenaar sc, &sc->sc_icookie); 33827d5dc18SMarcel Moolenaar if (error) 33927d5dc18SMarcel Moolenaar error = BUS_SETUP_INTR(device_get_parent(dev), dev, 3405918c72dSMarcel Moolenaar sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE, 3415918c72dSMarcel Moolenaar uart_intr, sc, &sc->sc_icookie); 34227d5dc18SMarcel Moolenaar else 34327d5dc18SMarcel Moolenaar sc->sc_fastintr = 1; 34427d5dc18SMarcel Moolenaar 34527d5dc18SMarcel Moolenaar if (error) { 34627d5dc18SMarcel Moolenaar device_printf(dev, "could not activate interrupt\n"); 34727d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 34827d5dc18SMarcel Moolenaar sc->sc_ires); 34927d5dc18SMarcel Moolenaar sc->sc_ires = NULL; 35027d5dc18SMarcel Moolenaar } 35127d5dc18SMarcel Moolenaar } 35227d5dc18SMarcel Moolenaar if (sc->sc_ires == NULL) { 35327d5dc18SMarcel Moolenaar /* XXX no interrupt resource. Force polled mode. */ 35427d5dc18SMarcel Moolenaar sc->sc_polled = 1; 35527d5dc18SMarcel Moolenaar } 35627d5dc18SMarcel Moolenaar 35727d5dc18SMarcel Moolenaar sc->sc_rxbufsz = IBUFSIZ; 35827d5dc18SMarcel Moolenaar sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 35927d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 36027d5dc18SMarcel Moolenaar sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 36127d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 36227d5dc18SMarcel Moolenaar 36327d5dc18SMarcel Moolenaar error = UART_ATTACH(sc); 36427d5dc18SMarcel Moolenaar if (error) 36527d5dc18SMarcel Moolenaar goto fail; 36627d5dc18SMarcel Moolenaar 36727d5dc18SMarcel Moolenaar if (sc->sc_hwiflow || sc->sc_hwoflow) { 36827d5dc18SMarcel Moolenaar sep = ""; 36927d5dc18SMarcel Moolenaar device_print_prettyname(dev); 37027d5dc18SMarcel Moolenaar if (sc->sc_hwiflow) { 37127d5dc18SMarcel Moolenaar printf("%sRTS iflow", sep); 37227d5dc18SMarcel Moolenaar sep = ", "; 37327d5dc18SMarcel Moolenaar } 37427d5dc18SMarcel Moolenaar if (sc->sc_hwoflow) { 37527d5dc18SMarcel Moolenaar printf("%sCTS oflow", sep); 37627d5dc18SMarcel Moolenaar sep = ", "; 37727d5dc18SMarcel Moolenaar } 37827d5dc18SMarcel Moolenaar printf("\n"); 37927d5dc18SMarcel Moolenaar } 38027d5dc18SMarcel Moolenaar 38127d5dc18SMarcel Moolenaar if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 38227d5dc18SMarcel Moolenaar sep = ""; 38327d5dc18SMarcel Moolenaar device_print_prettyname(dev); 38427d5dc18SMarcel Moolenaar if (sc->sc_fastintr) { 38527d5dc18SMarcel Moolenaar printf("%sfast interrupt", sep); 38627d5dc18SMarcel Moolenaar sep = ", "; 38727d5dc18SMarcel Moolenaar } 38827d5dc18SMarcel Moolenaar if (sc->sc_polled) { 38927d5dc18SMarcel Moolenaar printf("%spolled mode", sep); 39027d5dc18SMarcel Moolenaar sep = ", "; 39127d5dc18SMarcel Moolenaar } 39227d5dc18SMarcel Moolenaar printf("\n"); 39327d5dc18SMarcel Moolenaar } 39427d5dc18SMarcel Moolenaar 39527d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL) { 39654e2bcc7SMarcel Moolenaar if (sc->sc_sysdev->baudrate == 0) { 39754e2bcc7SMarcel Moolenaar if (UART_IOCTL(sc, UART_IOCTL_BAUD, 39854e2bcc7SMarcel Moolenaar (intptr_t)&sc->sc_sysdev->baudrate) != 0) 39954e2bcc7SMarcel Moolenaar sc->sc_sysdev->baudrate = -1; 40054e2bcc7SMarcel Moolenaar } 40127d5dc18SMarcel Moolenaar switch (sc->sc_sysdev->type) { 40227d5dc18SMarcel Moolenaar case UART_DEV_CONSOLE: 40327d5dc18SMarcel Moolenaar device_printf(dev, "console"); 40427d5dc18SMarcel Moolenaar break; 40527d5dc18SMarcel Moolenaar case UART_DEV_DBGPORT: 40627d5dc18SMarcel Moolenaar device_printf(dev, "debug port"); 40727d5dc18SMarcel Moolenaar break; 40827d5dc18SMarcel Moolenaar case UART_DEV_KEYBOARD: 40927d5dc18SMarcel Moolenaar device_printf(dev, "keyboard"); 41027d5dc18SMarcel Moolenaar break; 41127d5dc18SMarcel Moolenaar default: 41227d5dc18SMarcel Moolenaar device_printf(dev, "unknown system device"); 41327d5dc18SMarcel Moolenaar break; 41427d5dc18SMarcel Moolenaar } 41527d5dc18SMarcel Moolenaar printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 41627d5dc18SMarcel Moolenaar "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 41727d5dc18SMarcel Moolenaar sc->sc_sysdev->stopbits); 41827d5dc18SMarcel Moolenaar } 41927d5dc18SMarcel Moolenaar 4208194412bSMarcel Moolenaar sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 4218194412bSMarcel Moolenaar pps_init(&sc->sc_pps); 4228194412bSMarcel Moolenaar 42327d5dc18SMarcel Moolenaar error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) 42427d5dc18SMarcel Moolenaar ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc); 42527d5dc18SMarcel Moolenaar if (error) 42627d5dc18SMarcel Moolenaar goto fail; 42727d5dc18SMarcel Moolenaar 42827d5dc18SMarcel Moolenaar sc->sc_leaving = 0; 42927d5dc18SMarcel Moolenaar uart_intr(sc); 43027d5dc18SMarcel Moolenaar return (0); 43127d5dc18SMarcel Moolenaar 43227d5dc18SMarcel Moolenaar fail: 43327d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 43427d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 43527d5dc18SMarcel Moolenaar 43627d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 43727d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 43827d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 43927d5dc18SMarcel Moolenaar sc->sc_ires); 44027d5dc18SMarcel Moolenaar } 44127d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 44227d5dc18SMarcel Moolenaar 4432682e7b6SMarius Strobl mtx_destroy(&sc->sc_hwmtx); 4442682e7b6SMarius Strobl 44527d5dc18SMarcel Moolenaar return (error); 44627d5dc18SMarcel Moolenaar } 44727d5dc18SMarcel Moolenaar 44827d5dc18SMarcel Moolenaar int 44927d5dc18SMarcel Moolenaar uart_bus_detach(device_t dev) 45027d5dc18SMarcel Moolenaar { 45127d5dc18SMarcel Moolenaar struct uart_softc *sc; 45227d5dc18SMarcel Moolenaar 45327d5dc18SMarcel Moolenaar sc = device_get_softc(dev); 45427d5dc18SMarcel Moolenaar 45527d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 45627d5dc18SMarcel Moolenaar 45727d5dc18SMarcel Moolenaar UART_DETACH(sc); 45827d5dc18SMarcel Moolenaar 45927d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 46027d5dc18SMarcel Moolenaar (*sc->sc_sysdev->detach)(sc); 46127d5dc18SMarcel Moolenaar else 46227d5dc18SMarcel Moolenaar uart_tty_detach(sc); 46327d5dc18SMarcel Moolenaar 46427d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 46527d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 46627d5dc18SMarcel Moolenaar 46727d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 46827d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 46927d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 47027d5dc18SMarcel Moolenaar sc->sc_ires); 47127d5dc18SMarcel Moolenaar } 47227d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 47327d5dc18SMarcel Moolenaar 4742682e7b6SMarius Strobl mtx_destroy(&sc->sc_hwmtx); 4752682e7b6SMarius Strobl 47627d5dc18SMarcel Moolenaar if (sc->sc_class->size > sizeof(*sc)) { 47727d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 47827d5dc18SMarcel Moolenaar free(sc, M_UART); 47927d5dc18SMarcel Moolenaar } else 48027d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 48127d5dc18SMarcel Moolenaar 48227d5dc18SMarcel Moolenaar return (0); 48327d5dc18SMarcel Moolenaar } 484