xref: /freebsd-13.1/sys/dev/uart/uart_core.c (revision 8af03381)
1098ca2bdSWarner Losh /*-
227d5dc18SMarcel Moolenaar  * Copyright (c) 2003 Marcel Moolenaar
327d5dc18SMarcel Moolenaar  * All rights reserved.
427d5dc18SMarcel Moolenaar  *
527d5dc18SMarcel Moolenaar  * Redistribution and use in source and binary forms, with or without
627d5dc18SMarcel Moolenaar  * modification, are permitted provided that the following conditions
727d5dc18SMarcel Moolenaar  * are met:
827d5dc18SMarcel Moolenaar  *
927d5dc18SMarcel Moolenaar  * 1. Redistributions of source code must retain the above copyright
1027d5dc18SMarcel Moolenaar  *    notice, this list of conditions and the following disclaimer.
1127d5dc18SMarcel Moolenaar  * 2. Redistributions in binary form must reproduce the above copyright
1227d5dc18SMarcel Moolenaar  *    notice, this list of conditions and the following disclaimer in the
1327d5dc18SMarcel Moolenaar  *    documentation and/or other materials provided with the distribution.
1427d5dc18SMarcel Moolenaar  *
1527d5dc18SMarcel Moolenaar  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1627d5dc18SMarcel Moolenaar  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1727d5dc18SMarcel Moolenaar  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1827d5dc18SMarcel Moolenaar  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1927d5dc18SMarcel Moolenaar  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2027d5dc18SMarcel Moolenaar  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2127d5dc18SMarcel Moolenaar  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2227d5dc18SMarcel Moolenaar  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2327d5dc18SMarcel Moolenaar  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2427d5dc18SMarcel Moolenaar  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2527d5dc18SMarcel Moolenaar  */
2627d5dc18SMarcel Moolenaar 
2727d5dc18SMarcel Moolenaar #include <sys/cdefs.h>
2827d5dc18SMarcel Moolenaar __FBSDID("$FreeBSD$");
2927d5dc18SMarcel Moolenaar 
3027d5dc18SMarcel Moolenaar #ifndef KLD_MODULE
3127d5dc18SMarcel Moolenaar #include "opt_comconsole.h"
3227d5dc18SMarcel Moolenaar #endif
3327d5dc18SMarcel Moolenaar 
3427d5dc18SMarcel Moolenaar #include <sys/param.h>
3527d5dc18SMarcel Moolenaar #include <sys/systm.h>
3627d5dc18SMarcel Moolenaar #include <sys/bus.h>
3727d5dc18SMarcel Moolenaar #include <sys/conf.h>
3827d5dc18SMarcel Moolenaar #include <sys/cons.h>
3927d5dc18SMarcel Moolenaar #include <sys/fcntl.h>
4027d5dc18SMarcel Moolenaar #include <sys/interrupt.h>
41591bc192SMarcel Moolenaar #include <sys/kdb.h>
4227d5dc18SMarcel Moolenaar #include <sys/kernel.h>
4327d5dc18SMarcel Moolenaar #include <sys/malloc.h>
4427d5dc18SMarcel Moolenaar #include <sys/queue.h>
4527d5dc18SMarcel Moolenaar #include <sys/reboot.h>
4627d5dc18SMarcel Moolenaar #include <machine/bus.h>
4727d5dc18SMarcel Moolenaar #include <sys/rman.h>
4827d5dc18SMarcel Moolenaar #include <sys/termios.h>
4927d5dc18SMarcel Moolenaar #include <sys/tty.h>
5027d5dc18SMarcel Moolenaar #include <machine/resource.h>
5127d5dc18SMarcel Moolenaar #include <machine/stdarg.h>
5227d5dc18SMarcel Moolenaar 
5327d5dc18SMarcel Moolenaar #include <dev/uart/uart.h>
5427d5dc18SMarcel Moolenaar #include <dev/uart/uart_bus.h>
5527d5dc18SMarcel Moolenaar #include <dev/uart/uart_cpu.h>
5627d5dc18SMarcel Moolenaar 
5727d5dc18SMarcel Moolenaar #include "uart_if.h"
5827d5dc18SMarcel Moolenaar 
5927d5dc18SMarcel Moolenaar devclass_t uart_devclass;
6027d5dc18SMarcel Moolenaar char uart_driver_name[] = "uart";
6127d5dc18SMarcel Moolenaar 
6227d5dc18SMarcel Moolenaar SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
6327d5dc18SMarcel Moolenaar     SLIST_HEAD_INITIALIZER(uart_sysdevs);
6427d5dc18SMarcel Moolenaar 
6527d5dc18SMarcel Moolenaar MALLOC_DEFINE(M_UART, "UART", "UART driver");
6627d5dc18SMarcel Moolenaar 
6727d5dc18SMarcel Moolenaar void
6827d5dc18SMarcel Moolenaar uart_add_sysdev(struct uart_devinfo *di)
6927d5dc18SMarcel Moolenaar {
7027d5dc18SMarcel Moolenaar 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
7127d5dc18SMarcel Moolenaar }
7227d5dc18SMarcel Moolenaar 
7327d5dc18SMarcel Moolenaar /*
74*8af03381SMarcel Moolenaar  * Schedule a soft interrupt. We do this on the 0 to !0 transition
75*8af03381SMarcel Moolenaar  * of the TTY pending interrupt status.
76*8af03381SMarcel Moolenaar  */
77*8af03381SMarcel Moolenaar static void
78*8af03381SMarcel Moolenaar uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
79*8af03381SMarcel Moolenaar {
80*8af03381SMarcel Moolenaar 	uint32_t new, old;
81*8af03381SMarcel Moolenaar 
82*8af03381SMarcel Moolenaar 	do {
83*8af03381SMarcel Moolenaar 		old = sc->sc_ttypend;
84*8af03381SMarcel Moolenaar 		new = old | ipend;
85*8af03381SMarcel Moolenaar 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
86*8af03381SMarcel Moolenaar 
87*8af03381SMarcel Moolenaar 	if ((old & SER_INT_MASK) == 0)
88*8af03381SMarcel Moolenaar 		swi_sched(sc->sc_softih, 0);
89*8af03381SMarcel Moolenaar }
90*8af03381SMarcel Moolenaar 
91*8af03381SMarcel Moolenaar /*
9227d5dc18SMarcel Moolenaar  * A break condition has been detected. We treat the break condition as
9327d5dc18SMarcel Moolenaar  * a special case that should not happen during normal operation. When
9427d5dc18SMarcel Moolenaar  * the break condition is to be passed to higher levels in the form of
9527d5dc18SMarcel Moolenaar  * a NUL character, we really want the break to be in the right place in
9627d5dc18SMarcel Moolenaar  * the input stream. The overhead to achieve that is not in relation to
9727d5dc18SMarcel Moolenaar  * the exceptional nature of the break condition, so we permit ourselves
9827d5dc18SMarcel Moolenaar  * to be sloppy.
9927d5dc18SMarcel Moolenaar  */
100*8af03381SMarcel Moolenaar static __inline int
101*8af03381SMarcel Moolenaar uart_intr_break(void *arg)
10227d5dc18SMarcel Moolenaar {
103*8af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
10427d5dc18SMarcel Moolenaar 
105591bc192SMarcel Moolenaar #if defined(KDB) && defined(BREAK_TO_DEBUGGER)
10627d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
107591bc192SMarcel Moolenaar 		kdb_enter("Line break on console");
108*8af03381SMarcel Moolenaar 		return (0);
10927d5dc18SMarcel Moolenaar 	}
11027d5dc18SMarcel Moolenaar #endif
11127d5dc18SMarcel Moolenaar 	if (sc->sc_opened)
112*8af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_BREAK);
113*8af03381SMarcel Moolenaar 	return (0);
11427d5dc18SMarcel Moolenaar }
11527d5dc18SMarcel Moolenaar 
11627d5dc18SMarcel Moolenaar /*
11727d5dc18SMarcel Moolenaar  * Handle a receiver overrun situation. We lost at least 1 byte in the
11827d5dc18SMarcel Moolenaar  * input stream and it's our job to contain the situation. We grab as
11927d5dc18SMarcel Moolenaar  * much of the data we can, but otherwise flush the receiver FIFO to
12027d5dc18SMarcel Moolenaar  * create some breathing room. The net effect is that we avoid the
12127d5dc18SMarcel Moolenaar  * overrun condition to happen for the next X characters, where X is
12227d5dc18SMarcel Moolenaar  * related to the FIFO size at the cost of loosing data right away.
12327d5dc18SMarcel Moolenaar  * So, instead of having multiple overrun interrupts in close proximity
12427d5dc18SMarcel Moolenaar  * to each other and possibly pessimizing UART interrupt latency for
12527d5dc18SMarcel Moolenaar  * other UARTs in a multiport configuration, we create a longer segment
12627d5dc18SMarcel Moolenaar  * of missing characters by freeing up the FIFO.
12727d5dc18SMarcel Moolenaar  * Each overrun condition is marked in the input buffer by a token. The
12827d5dc18SMarcel Moolenaar  * token represents the loss of at least one, but possible more bytes in
12927d5dc18SMarcel Moolenaar  * the input stream.
13027d5dc18SMarcel Moolenaar  */
131*8af03381SMarcel Moolenaar static __inline int
132*8af03381SMarcel Moolenaar uart_intr_overrun(void *arg)
13327d5dc18SMarcel Moolenaar {
134*8af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
13527d5dc18SMarcel Moolenaar 
13627d5dc18SMarcel Moolenaar 	if (sc->sc_opened) {
13727d5dc18SMarcel Moolenaar 		UART_RECEIVE(sc);
13827d5dc18SMarcel Moolenaar 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
13927d5dc18SMarcel Moolenaar 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
140*8af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_RXREADY);
14127d5dc18SMarcel Moolenaar 	}
14227d5dc18SMarcel Moolenaar 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
143*8af03381SMarcel Moolenaar 	return (0);
14427d5dc18SMarcel Moolenaar }
14527d5dc18SMarcel Moolenaar 
14627d5dc18SMarcel Moolenaar /*
14727d5dc18SMarcel Moolenaar  * Received data ready.
14827d5dc18SMarcel Moolenaar  */
149*8af03381SMarcel Moolenaar static __inline int
150*8af03381SMarcel Moolenaar uart_intr_rxready(void *arg)
15127d5dc18SMarcel Moolenaar {
152*8af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
15327d5dc18SMarcel Moolenaar 	int rxp;
15427d5dc18SMarcel Moolenaar 
15527d5dc18SMarcel Moolenaar 	rxp = sc->sc_rxput;
15627d5dc18SMarcel Moolenaar 	UART_RECEIVE(sc);
157591bc192SMarcel Moolenaar #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER)
15827d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
15927d5dc18SMarcel Moolenaar 		while (rxp != sc->sc_rxput) {
160591bc192SMarcel Moolenaar 			if (kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk))
161591bc192SMarcel Moolenaar 				kdb_enter("Break sequence on console");
16227d5dc18SMarcel Moolenaar 			if (rxp == sc->sc_rxbufsz)
16327d5dc18SMarcel Moolenaar 				rxp = 0;
16427d5dc18SMarcel Moolenaar 		}
16527d5dc18SMarcel Moolenaar 	}
16627d5dc18SMarcel Moolenaar #endif
16727d5dc18SMarcel Moolenaar 	if (sc->sc_opened)
168*8af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_RXREADY);
16927d5dc18SMarcel Moolenaar 	else
17027d5dc18SMarcel Moolenaar 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
171*8af03381SMarcel Moolenaar 	return (1);
17227d5dc18SMarcel Moolenaar }
17327d5dc18SMarcel Moolenaar 
17427d5dc18SMarcel Moolenaar /*
17527d5dc18SMarcel Moolenaar  * Line or modem status change (OOB signalling).
17627d5dc18SMarcel Moolenaar  * We pass the signals to the software interrupt handler for further
17727d5dc18SMarcel Moolenaar  * processing. Note that we merge the delta bits, but set the state
17827d5dc18SMarcel Moolenaar  * bits. This is to avoid loosing state transitions due to having more
17927d5dc18SMarcel Moolenaar  * than 1 hardware interrupt between software interrupts.
18027d5dc18SMarcel Moolenaar  */
181*8af03381SMarcel Moolenaar static __inline int
182*8af03381SMarcel Moolenaar uart_intr_sigchg(void *arg)
18327d5dc18SMarcel Moolenaar {
184*8af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
18527d5dc18SMarcel Moolenaar 	int new, old, sig;
18627d5dc18SMarcel Moolenaar 
18727d5dc18SMarcel Moolenaar 	sig = UART_GETSIG(sc);
1888194412bSMarcel Moolenaar 
1898194412bSMarcel Moolenaar 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1908194412bSMarcel Moolenaar 		if (sig & UART_SIG_DPPS) {
1918194412bSMarcel Moolenaar 			pps_capture(&sc->sc_pps);
1928194412bSMarcel Moolenaar 			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
1938194412bSMarcel Moolenaar 			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1948194412bSMarcel Moolenaar 		}
1958194412bSMarcel Moolenaar 	}
1968194412bSMarcel Moolenaar 
197*8af03381SMarcel Moolenaar 	/*
198*8af03381SMarcel Moolenaar 	 * Keep track of signal changes, even when the device is not
199*8af03381SMarcel Moolenaar 	 * opened. This allows us to inform upper layers about a
200*8af03381SMarcel Moolenaar 	 * possible loss of DCD and thus the existence of a (possibly)
201*8af03381SMarcel Moolenaar 	 * different connection when we have DCD back, during the time
202*8af03381SMarcel Moolenaar 	 * that the device was closed.
203*8af03381SMarcel Moolenaar 	 */
20427d5dc18SMarcel Moolenaar 	do {
20527d5dc18SMarcel Moolenaar 		old = sc->sc_ttypend;
206ea549414SMarcel Moolenaar 		new = old & ~SER_MASK_STATE;
2072d511805SMarcel Moolenaar 		new |= sig & SER_INT_SIGMASK;
20827d5dc18SMarcel Moolenaar 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
209*8af03381SMarcel Moolenaar 
210*8af03381SMarcel Moolenaar 	if (sc->sc_opened)
211*8af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_SIGCHG);
212*8af03381SMarcel Moolenaar 	return (1);
21327d5dc18SMarcel Moolenaar }
21427d5dc18SMarcel Moolenaar 
21527d5dc18SMarcel Moolenaar /*
21627d5dc18SMarcel Moolenaar  * The transmitter can accept more data.
21727d5dc18SMarcel Moolenaar  */
218*8af03381SMarcel Moolenaar static __inline int
219*8af03381SMarcel Moolenaar uart_intr_txidle(void *arg)
22027d5dc18SMarcel Moolenaar {
221*8af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
222*8af03381SMarcel Moolenaar 
22327d5dc18SMarcel Moolenaar 	if (sc->sc_txbusy) {
22427d5dc18SMarcel Moolenaar 		sc->sc_txbusy = 0;
225*8af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_TXIDLE);
22627d5dc18SMarcel Moolenaar 	}
227*8af03381SMarcel Moolenaar 	return (0);
22827d5dc18SMarcel Moolenaar }
22927d5dc18SMarcel Moolenaar 
23027d5dc18SMarcel Moolenaar static void
23127d5dc18SMarcel Moolenaar uart_intr(void *arg)
23227d5dc18SMarcel Moolenaar {
23327d5dc18SMarcel Moolenaar 	struct uart_softc *sc = arg;
23427d5dc18SMarcel Moolenaar 	int ipend;
23527d5dc18SMarcel Moolenaar 
236*8af03381SMarcel Moolenaar 	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
2372d511805SMarcel Moolenaar 		if (ipend & SER_INT_OVERRUN)
23827d5dc18SMarcel Moolenaar 			uart_intr_overrun(sc);
2392d511805SMarcel Moolenaar 		if (ipend & SER_INT_BREAK)
24027d5dc18SMarcel Moolenaar 			uart_intr_break(sc);
2412d511805SMarcel Moolenaar 		if (ipend & SER_INT_RXREADY)
24227d5dc18SMarcel Moolenaar 			uart_intr_rxready(sc);
2432d511805SMarcel Moolenaar 		if (ipend & SER_INT_SIGCHG)
24427d5dc18SMarcel Moolenaar 			uart_intr_sigchg(sc);
2452d511805SMarcel Moolenaar 		if (ipend & SER_INT_TXIDLE)
24627d5dc18SMarcel Moolenaar 			uart_intr_txidle(sc);
247*8af03381SMarcel Moolenaar 	}
248*8af03381SMarcel Moolenaar }
24927d5dc18SMarcel Moolenaar 
250*8af03381SMarcel Moolenaar serdev_intr_t *
251*8af03381SMarcel Moolenaar uart_bus_ihand(device_t dev, int ipend)
252*8af03381SMarcel Moolenaar {
253*8af03381SMarcel Moolenaar 
254*8af03381SMarcel Moolenaar 	switch (ipend) {
255*8af03381SMarcel Moolenaar 	case SER_INT_BREAK:
256*8af03381SMarcel Moolenaar 		return (uart_intr_break);
257*8af03381SMarcel Moolenaar 	case SER_INT_OVERRUN:
258*8af03381SMarcel Moolenaar 		return (uart_intr_overrun);
259*8af03381SMarcel Moolenaar 	case SER_INT_RXREADY:
260*8af03381SMarcel Moolenaar 		return (uart_intr_rxready);
261*8af03381SMarcel Moolenaar 	case SER_INT_SIGCHG:
262*8af03381SMarcel Moolenaar 		return (uart_intr_sigchg);
263*8af03381SMarcel Moolenaar 	case SER_INT_TXIDLE:
264*8af03381SMarcel Moolenaar 		return (uart_intr_txidle);
265*8af03381SMarcel Moolenaar 	}
266*8af03381SMarcel Moolenaar 	return (NULL);
267*8af03381SMarcel Moolenaar }
268*8af03381SMarcel Moolenaar 
269*8af03381SMarcel Moolenaar int
270*8af03381SMarcel Moolenaar uart_bus_sysdev(device_t dev)
271*8af03381SMarcel Moolenaar {
272*8af03381SMarcel Moolenaar 	struct uart_softc *sc;
273*8af03381SMarcel Moolenaar 
274*8af03381SMarcel Moolenaar 	sc = device_get_softc(dev);
275*8af03381SMarcel Moolenaar 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
27627d5dc18SMarcel Moolenaar }
27727d5dc18SMarcel Moolenaar 
27827d5dc18SMarcel Moolenaar int
279875f70dbSMarcel Moolenaar uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
28027d5dc18SMarcel Moolenaar {
28127d5dc18SMarcel Moolenaar 	struct uart_softc *sc;
28227d5dc18SMarcel Moolenaar 	struct uart_devinfo *sysdev;
28327d5dc18SMarcel Moolenaar 	int error;
28427d5dc18SMarcel Moolenaar 
28527d5dc18SMarcel Moolenaar 	/*
28627d5dc18SMarcel Moolenaar 	 * Initialize the instance. Note that the instance (=softc) does
28727d5dc18SMarcel Moolenaar 	 * not necessarily match the hardware specific softc. We can't do
28827d5dc18SMarcel Moolenaar 	 * anything about it now, because we may not attach to the device.
28927d5dc18SMarcel Moolenaar 	 * Hardware drivers cannot use any of the class specific fields
29027d5dc18SMarcel Moolenaar 	 * while probing.
29127d5dc18SMarcel Moolenaar 	 */
29227d5dc18SMarcel Moolenaar 	sc = device_get_softc(dev);
29327d5dc18SMarcel Moolenaar 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
29427d5dc18SMarcel Moolenaar 	sc->sc_dev = dev;
29527d5dc18SMarcel Moolenaar 	if (device_get_desc(dev) == NULL)
29627d5dc18SMarcel Moolenaar 		device_set_desc(dev, sc->sc_class->name);
29727d5dc18SMarcel Moolenaar 
29827d5dc18SMarcel Moolenaar 	/*
29927d5dc18SMarcel Moolenaar 	 * Allocate the register resource. We assume that all UARTs have
30027d5dc18SMarcel Moolenaar 	 * a single register window in either I/O port space or memory
30127d5dc18SMarcel Moolenaar 	 * mapped I/O space. Any UART that needs multiple windows will
30227d5dc18SMarcel Moolenaar 	 * consequently not be supported by this driver as-is. We try I/O
30327d5dc18SMarcel Moolenaar 	 * port space first because that's the common case.
30427d5dc18SMarcel Moolenaar 	 */
30527d5dc18SMarcel Moolenaar 	sc->sc_rrid = rid;
30627d5dc18SMarcel Moolenaar 	sc->sc_rtype = SYS_RES_IOPORT;
30727d5dc18SMarcel Moolenaar 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
30827d5dc18SMarcel Moolenaar 	    0, ~0, sc->sc_class->uc_range, RF_ACTIVE);
30927d5dc18SMarcel Moolenaar 	if (sc->sc_rres == NULL) {
31027d5dc18SMarcel Moolenaar 		sc->sc_rrid = rid;
31127d5dc18SMarcel Moolenaar 		sc->sc_rtype = SYS_RES_MEMORY;
31227d5dc18SMarcel Moolenaar 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
31327d5dc18SMarcel Moolenaar 		    &sc->sc_rrid, 0, ~0, sc->sc_class->uc_range, RF_ACTIVE);
31427d5dc18SMarcel Moolenaar 		if (sc->sc_rres == NULL)
31527d5dc18SMarcel Moolenaar 			return (ENXIO);
31627d5dc18SMarcel Moolenaar 	}
31727d5dc18SMarcel Moolenaar 
31827d5dc18SMarcel Moolenaar 	/*
31927d5dc18SMarcel Moolenaar 	 * Fill in the bus access structure and compare this device with
32027d5dc18SMarcel Moolenaar 	 * a possible console device and/or a debug port. We set the flags
32127d5dc18SMarcel Moolenaar 	 * in the softc so that the hardware dependent probe can adjust
32227d5dc18SMarcel Moolenaar 	 * accordingly. In general, you don't want to permanently disrupt
32327d5dc18SMarcel Moolenaar 	 * console I/O.
32427d5dc18SMarcel Moolenaar 	 */
32527d5dc18SMarcel Moolenaar 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
32627d5dc18SMarcel Moolenaar 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
327875f70dbSMarcel Moolenaar 	sc->sc_bas.chan = chan;
32827d5dc18SMarcel Moolenaar 	sc->sc_bas.regshft = regshft;
32927d5dc18SMarcel Moolenaar 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
33027d5dc18SMarcel Moolenaar 
33127d5dc18SMarcel Moolenaar 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
332875f70dbSMarcel Moolenaar 		if (chan == sysdev->bas.chan &&
333875f70dbSMarcel Moolenaar 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
33427d5dc18SMarcel Moolenaar 			/* XXX check if ops matches class. */
33527d5dc18SMarcel Moolenaar 			sc->sc_sysdev = sysdev;
33627d5dc18SMarcel Moolenaar 			break;
33727d5dc18SMarcel Moolenaar 		}
33827d5dc18SMarcel Moolenaar 	}
33927d5dc18SMarcel Moolenaar 
34027d5dc18SMarcel Moolenaar 	error = UART_PROBE(sc);
34127d5dc18SMarcel Moolenaar 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
342b923a710SMarcel Moolenaar 	return ((error) ? error : BUS_PROBE_DEFAULT);
34327d5dc18SMarcel Moolenaar }
34427d5dc18SMarcel Moolenaar 
34527d5dc18SMarcel Moolenaar int
34627d5dc18SMarcel Moolenaar uart_bus_attach(device_t dev)
34727d5dc18SMarcel Moolenaar {
34827d5dc18SMarcel Moolenaar 	struct uart_softc *sc, *sc0;
34927d5dc18SMarcel Moolenaar 	const char *sep;
35027d5dc18SMarcel Moolenaar 	int error;
35127d5dc18SMarcel Moolenaar 
35227d5dc18SMarcel Moolenaar 	/*
35327d5dc18SMarcel Moolenaar 	 * The sc_class field defines the type of UART we're going to work
35427d5dc18SMarcel Moolenaar 	 * with and thus the size of the softc. Replace the generic softc
35527d5dc18SMarcel Moolenaar 	 * with one that matches the UART now that we're certain we handle
35627d5dc18SMarcel Moolenaar 	 * the device.
35727d5dc18SMarcel Moolenaar 	 */
35827d5dc18SMarcel Moolenaar 	sc0 = device_get_softc(dev);
35927d5dc18SMarcel Moolenaar 	if (sc0->sc_class->size > sizeof(*sc)) {
36027d5dc18SMarcel Moolenaar 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
36127d5dc18SMarcel Moolenaar 		bcopy(sc0, sc, sizeof(*sc));
36227d5dc18SMarcel Moolenaar 		device_set_softc(dev, sc);
36327d5dc18SMarcel Moolenaar 	} else
36427d5dc18SMarcel Moolenaar 		sc = sc0;
36527d5dc18SMarcel Moolenaar 
36627d5dc18SMarcel Moolenaar 	/*
36727d5dc18SMarcel Moolenaar 	 * Protect ourselves against interrupts while we're not completely
36827d5dc18SMarcel Moolenaar 	 * finished attaching and initializing. We don't expect interrupts
36927d5dc18SMarcel Moolenaar 	 * until after UART_ATTACH() though.
37027d5dc18SMarcel Moolenaar 	 */
37127d5dc18SMarcel Moolenaar 	sc->sc_leaving = 1;
37227d5dc18SMarcel Moolenaar 
373*8af03381SMarcel Moolenaar 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
374*8af03381SMarcel Moolenaar 	if (sc->sc_hwmtx == NULL)
375*8af03381SMarcel Moolenaar 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
37606287620SMarcel Moolenaar 
37727d5dc18SMarcel Moolenaar 	/*
37827d5dc18SMarcel Moolenaar 	 * Re-allocate. We expect that the softc contains the information
37927d5dc18SMarcel Moolenaar 	 * collected by uart_bus_probe() intact.
38027d5dc18SMarcel Moolenaar 	 */
38127d5dc18SMarcel Moolenaar 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
38227d5dc18SMarcel Moolenaar 	    0, ~0, sc->sc_class->uc_range, RF_ACTIVE);
3832682e7b6SMarius Strobl 	if (sc->sc_rres == NULL) {
384*8af03381SMarcel Moolenaar 		mtx_destroy(&sc->sc_hwmtx_s);
38527d5dc18SMarcel Moolenaar 		return (ENXIO);
3862682e7b6SMarius Strobl 	}
387b8759afcSYoshihiro Takahashi 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
388b8759afcSYoshihiro Takahashi 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
389b8759afcSYoshihiro Takahashi 
39027d5dc18SMarcel Moolenaar 	sc->sc_irid = 0;
3915f96beb9SNate Lawson 	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
3922682e7b6SMarius Strobl 	    RF_ACTIVE | RF_SHAREABLE);
39327d5dc18SMarcel Moolenaar 	if (sc->sc_ires != NULL) {
39457fb5e60SJohn Baldwin 		error = bus_setup_intr(dev,
39527d5dc18SMarcel Moolenaar 		    sc->sc_ires, INTR_TYPE_TTY | INTR_FAST, uart_intr,
39627d5dc18SMarcel Moolenaar 		    sc, &sc->sc_icookie);
39727d5dc18SMarcel Moolenaar 		if (error)
39857fb5e60SJohn Baldwin 			error = bus_setup_intr(dev,
3995918c72dSMarcel Moolenaar 			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
4005918c72dSMarcel Moolenaar 			    uart_intr, sc, &sc->sc_icookie);
40127d5dc18SMarcel Moolenaar 		else
40227d5dc18SMarcel Moolenaar 			sc->sc_fastintr = 1;
40327d5dc18SMarcel Moolenaar 
40427d5dc18SMarcel Moolenaar 		if (error) {
40527d5dc18SMarcel Moolenaar 			device_printf(dev, "could not activate interrupt\n");
40627d5dc18SMarcel Moolenaar 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
40727d5dc18SMarcel Moolenaar 			    sc->sc_ires);
40827d5dc18SMarcel Moolenaar 			sc->sc_ires = NULL;
40927d5dc18SMarcel Moolenaar 		}
41027d5dc18SMarcel Moolenaar 	}
41127d5dc18SMarcel Moolenaar 	if (sc->sc_ires == NULL) {
41227d5dc18SMarcel Moolenaar 		/* XXX no interrupt resource. Force polled mode. */
41327d5dc18SMarcel Moolenaar 		sc->sc_polled = 1;
41427d5dc18SMarcel Moolenaar 	}
41527d5dc18SMarcel Moolenaar 
41627d5dc18SMarcel Moolenaar 	sc->sc_rxbufsz = IBUFSIZ;
41727d5dc18SMarcel Moolenaar 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
41827d5dc18SMarcel Moolenaar 	    M_UART, M_WAITOK);
41927d5dc18SMarcel Moolenaar 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
42027d5dc18SMarcel Moolenaar 	    M_UART, M_WAITOK);
42127d5dc18SMarcel Moolenaar 
42227d5dc18SMarcel Moolenaar 	error = UART_ATTACH(sc);
42327d5dc18SMarcel Moolenaar 	if (error)
42427d5dc18SMarcel Moolenaar 		goto fail;
42527d5dc18SMarcel Moolenaar 
42627d5dc18SMarcel Moolenaar 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
42727d5dc18SMarcel Moolenaar 		sep = "";
42827d5dc18SMarcel Moolenaar 		device_print_prettyname(dev);
42927d5dc18SMarcel Moolenaar 		if (sc->sc_hwiflow) {
43027d5dc18SMarcel Moolenaar 			printf("%sRTS iflow", sep);
43127d5dc18SMarcel Moolenaar 			sep = ", ";
43227d5dc18SMarcel Moolenaar 		}
43327d5dc18SMarcel Moolenaar 		if (sc->sc_hwoflow) {
43427d5dc18SMarcel Moolenaar 			printf("%sCTS oflow", sep);
43527d5dc18SMarcel Moolenaar 			sep = ", ";
43627d5dc18SMarcel Moolenaar 		}
43727d5dc18SMarcel Moolenaar 		printf("\n");
43827d5dc18SMarcel Moolenaar 	}
43927d5dc18SMarcel Moolenaar 
44027d5dc18SMarcel Moolenaar 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
44127d5dc18SMarcel Moolenaar 		sep = "";
44227d5dc18SMarcel Moolenaar 		device_print_prettyname(dev);
44327d5dc18SMarcel Moolenaar 		if (sc->sc_fastintr) {
44427d5dc18SMarcel Moolenaar 			printf("%sfast interrupt", sep);
44527d5dc18SMarcel Moolenaar 			sep = ", ";
44627d5dc18SMarcel Moolenaar 		}
44727d5dc18SMarcel Moolenaar 		if (sc->sc_polled) {
44827d5dc18SMarcel Moolenaar 			printf("%spolled mode", sep);
44927d5dc18SMarcel Moolenaar 			sep = ", ";
45027d5dc18SMarcel Moolenaar 		}
45127d5dc18SMarcel Moolenaar 		printf("\n");
45227d5dc18SMarcel Moolenaar 	}
45327d5dc18SMarcel Moolenaar 
45427d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL) {
45554e2bcc7SMarcel Moolenaar 		if (sc->sc_sysdev->baudrate == 0) {
45654e2bcc7SMarcel Moolenaar 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
45754e2bcc7SMarcel Moolenaar 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
45854e2bcc7SMarcel Moolenaar 				sc->sc_sysdev->baudrate = -1;
45954e2bcc7SMarcel Moolenaar 		}
46027d5dc18SMarcel Moolenaar 		switch (sc->sc_sysdev->type) {
46127d5dc18SMarcel Moolenaar 		case UART_DEV_CONSOLE:
46227d5dc18SMarcel Moolenaar 			device_printf(dev, "console");
46327d5dc18SMarcel Moolenaar 			break;
46427d5dc18SMarcel Moolenaar 		case UART_DEV_DBGPORT:
46527d5dc18SMarcel Moolenaar 			device_printf(dev, "debug port");
46627d5dc18SMarcel Moolenaar 			break;
46727d5dc18SMarcel Moolenaar 		case UART_DEV_KEYBOARD:
46827d5dc18SMarcel Moolenaar 			device_printf(dev, "keyboard");
46927d5dc18SMarcel Moolenaar 			break;
47027d5dc18SMarcel Moolenaar 		default:
47127d5dc18SMarcel Moolenaar 			device_printf(dev, "unknown system device");
47227d5dc18SMarcel Moolenaar 			break;
47327d5dc18SMarcel Moolenaar 		}
47427d5dc18SMarcel Moolenaar 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
47527d5dc18SMarcel Moolenaar 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
47627d5dc18SMarcel Moolenaar 		    sc->sc_sysdev->stopbits);
47727d5dc18SMarcel Moolenaar 	}
47827d5dc18SMarcel Moolenaar 
4798194412bSMarcel Moolenaar 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
4808194412bSMarcel Moolenaar 	pps_init(&sc->sc_pps);
4818194412bSMarcel Moolenaar 
48227d5dc18SMarcel Moolenaar 	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
48327d5dc18SMarcel Moolenaar 	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
48427d5dc18SMarcel Moolenaar 	if (error)
48527d5dc18SMarcel Moolenaar 		goto fail;
48627d5dc18SMarcel Moolenaar 
487*8af03381SMarcel Moolenaar 	if (sc->sc_sysdev != NULL)
488*8af03381SMarcel Moolenaar 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
489*8af03381SMarcel Moolenaar 
49027d5dc18SMarcel Moolenaar 	sc->sc_leaving = 0;
49127d5dc18SMarcel Moolenaar 	uart_intr(sc);
49227d5dc18SMarcel Moolenaar 	return (0);
49327d5dc18SMarcel Moolenaar 
49427d5dc18SMarcel Moolenaar  fail:
49527d5dc18SMarcel Moolenaar 	free(sc->sc_txbuf, M_UART);
49627d5dc18SMarcel Moolenaar 	free(sc->sc_rxbuf, M_UART);
49727d5dc18SMarcel Moolenaar 
49827d5dc18SMarcel Moolenaar 	if (sc->sc_ires != NULL) {
49927d5dc18SMarcel Moolenaar 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
50027d5dc18SMarcel Moolenaar 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
50127d5dc18SMarcel Moolenaar 		    sc->sc_ires);
50227d5dc18SMarcel Moolenaar 	}
50327d5dc18SMarcel Moolenaar 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
50427d5dc18SMarcel Moolenaar 
505*8af03381SMarcel Moolenaar 	mtx_destroy(&sc->sc_hwmtx_s);
5062682e7b6SMarius Strobl 
50727d5dc18SMarcel Moolenaar 	return (error);
50827d5dc18SMarcel Moolenaar }
50927d5dc18SMarcel Moolenaar 
51027d5dc18SMarcel Moolenaar int
51127d5dc18SMarcel Moolenaar uart_bus_detach(device_t dev)
51227d5dc18SMarcel Moolenaar {
51327d5dc18SMarcel Moolenaar 	struct uart_softc *sc;
51427d5dc18SMarcel Moolenaar 
51527d5dc18SMarcel Moolenaar 	sc = device_get_softc(dev);
51627d5dc18SMarcel Moolenaar 
51727d5dc18SMarcel Moolenaar 	sc->sc_leaving = 1;
51827d5dc18SMarcel Moolenaar 
519*8af03381SMarcel Moolenaar 	if (sc->sc_sysdev != NULL)
520*8af03381SMarcel Moolenaar 		sc->sc_sysdev->hwmtx = NULL;
521*8af03381SMarcel Moolenaar 
52227d5dc18SMarcel Moolenaar 	UART_DETACH(sc);
52327d5dc18SMarcel Moolenaar 
52427d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
52527d5dc18SMarcel Moolenaar 		(*sc->sc_sysdev->detach)(sc);
52627d5dc18SMarcel Moolenaar 	else
52727d5dc18SMarcel Moolenaar 		uart_tty_detach(sc);
52827d5dc18SMarcel Moolenaar 
52927d5dc18SMarcel Moolenaar 	free(sc->sc_txbuf, M_UART);
53027d5dc18SMarcel Moolenaar 	free(sc->sc_rxbuf, M_UART);
53127d5dc18SMarcel Moolenaar 
53227d5dc18SMarcel Moolenaar 	if (sc->sc_ires != NULL) {
53327d5dc18SMarcel Moolenaar 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
53427d5dc18SMarcel Moolenaar 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
53527d5dc18SMarcel Moolenaar 		    sc->sc_ires);
53627d5dc18SMarcel Moolenaar 	}
53727d5dc18SMarcel Moolenaar 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
53827d5dc18SMarcel Moolenaar 
539*8af03381SMarcel Moolenaar 	mtx_destroy(&sc->sc_hwmtx_s);
5402682e7b6SMarius Strobl 
54127d5dc18SMarcel Moolenaar 	if (sc->sc_class->size > sizeof(*sc)) {
54227d5dc18SMarcel Moolenaar 		device_set_softc(dev, NULL);
54327d5dc18SMarcel Moolenaar 		free(sc, M_UART);
54427d5dc18SMarcel Moolenaar 	} else
54527d5dc18SMarcel Moolenaar 		device_set_softc(dev, NULL);
54627d5dc18SMarcel Moolenaar 
54727d5dc18SMarcel Moolenaar 	return (0);
54827d5dc18SMarcel Moolenaar }
549