1098ca2bdSWarner Losh /*- 227d5dc18SMarcel Moolenaar * Copyright (c) 2003 Marcel Moolenaar 327d5dc18SMarcel Moolenaar * All rights reserved. 427d5dc18SMarcel Moolenaar * 527d5dc18SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without 627d5dc18SMarcel Moolenaar * modification, are permitted provided that the following conditions 727d5dc18SMarcel Moolenaar * are met: 827d5dc18SMarcel Moolenaar * 927d5dc18SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright 1027d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer. 1127d5dc18SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright 1227d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the 1327d5dc18SMarcel Moolenaar * documentation and/or other materials provided with the distribution. 1427d5dc18SMarcel Moolenaar * 1527d5dc18SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1627d5dc18SMarcel Moolenaar * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1727d5dc18SMarcel Moolenaar * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1827d5dc18SMarcel Moolenaar * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1927d5dc18SMarcel Moolenaar * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2027d5dc18SMarcel Moolenaar * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2127d5dc18SMarcel Moolenaar * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2227d5dc18SMarcel Moolenaar * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2327d5dc18SMarcel Moolenaar * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2427d5dc18SMarcel Moolenaar * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2527d5dc18SMarcel Moolenaar */ 2627d5dc18SMarcel Moolenaar 2727d5dc18SMarcel Moolenaar #include <sys/cdefs.h> 2827d5dc18SMarcel Moolenaar __FBSDID("$FreeBSD$"); 2927d5dc18SMarcel Moolenaar 3027d5dc18SMarcel Moolenaar #include <sys/param.h> 3127d5dc18SMarcel Moolenaar #include <sys/systm.h> 3227d5dc18SMarcel Moolenaar #include <sys/bus.h> 3327d5dc18SMarcel Moolenaar #include <sys/conf.h> 3427d5dc18SMarcel Moolenaar #include <sys/cons.h> 3527d5dc18SMarcel Moolenaar #include <sys/fcntl.h> 3627d5dc18SMarcel Moolenaar #include <sys/interrupt.h> 37591bc192SMarcel Moolenaar #include <sys/kdb.h> 3827d5dc18SMarcel Moolenaar #include <sys/kernel.h> 3927d5dc18SMarcel Moolenaar #include <sys/malloc.h> 4027d5dc18SMarcel Moolenaar #include <sys/queue.h> 4127d5dc18SMarcel Moolenaar #include <sys/reboot.h> 4262145ff3SNeel Natu #include <sys/sysctl.h> 4327d5dc18SMarcel Moolenaar #include <machine/bus.h> 4427d5dc18SMarcel Moolenaar #include <sys/rman.h> 4527d5dc18SMarcel Moolenaar #include <machine/resource.h> 4627d5dc18SMarcel Moolenaar #include <machine/stdarg.h> 4727d5dc18SMarcel Moolenaar 4827d5dc18SMarcel Moolenaar #include <dev/uart/uart.h> 4927d5dc18SMarcel Moolenaar #include <dev/uart/uart_bus.h> 5027d5dc18SMarcel Moolenaar #include <dev/uart/uart_cpu.h> 51fdfbb3f5SIan Lepore #include <dev/uart/uart_ppstypes.h> 5227d5dc18SMarcel Moolenaar 5327d5dc18SMarcel Moolenaar #include "uart_if.h" 5427d5dc18SMarcel Moolenaar 5527d5dc18SMarcel Moolenaar devclass_t uart_devclass; 5686fb5400SMarius Strobl const char uart_driver_name[] = "uart"; 5727d5dc18SMarcel Moolenaar 5827d5dc18SMarcel Moolenaar SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 5927d5dc18SMarcel Moolenaar SLIST_HEAD_INITIALIZER(uart_sysdevs); 6027d5dc18SMarcel Moolenaar 61d745c852SEd Schouten static MALLOC_DEFINE(M_UART, "UART", "UART driver"); 6227d5dc18SMarcel Moolenaar 63332cda07SPeter Grehan #ifndef UART_POLL_FREQ 64332cda07SPeter Grehan #define UART_POLL_FREQ 50 65332cda07SPeter Grehan #endif 66332cda07SPeter Grehan static int uart_poll_freq = UART_POLL_FREQ; 6762145ff3SNeel Natu SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq, 6862145ff3SNeel Natu 0, "UART poll frequency"); 6962145ff3SNeel Natu 7062145ff3SNeel Natu static int uart_force_poll; 7162145ff3SNeel Natu SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll, 7262145ff3SNeel Natu 0, "Force UART polling"); 73332cda07SPeter Grehan 74196d3019SIan Lepore static inline int 75196d3019SIan Lepore uart_pps_mode_valid(int pps_mode) 76196d3019SIan Lepore { 77fdfbb3f5SIan Lepore int opt; 78196d3019SIan Lepore 79fdfbb3f5SIan Lepore switch(pps_mode & UART_PPS_SIGNAL_MASK) { 80fdfbb3f5SIan Lepore case UART_PPS_DISABLED: 81fdfbb3f5SIan Lepore case UART_PPS_CTS: 82fdfbb3f5SIan Lepore case UART_PPS_DCD: 83fdfbb3f5SIan Lepore break; 84fdfbb3f5SIan Lepore default: 85196d3019SIan Lepore return (false); 86196d3019SIan Lepore } 87196d3019SIan Lepore 88fdfbb3f5SIan Lepore opt = pps_mode & UART_PPS_OPTION_MASK; 89fdfbb3f5SIan Lepore if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0) 90fdfbb3f5SIan Lepore return (false); 91fdfbb3f5SIan Lepore 92fdfbb3f5SIan Lepore return (true); 93196d3019SIan Lepore } 94fdfbb3f5SIan Lepore 95fdfbb3f5SIan Lepore static void 96fdfbb3f5SIan Lepore uart_pps_print_mode(struct uart_softc *sc) 97fdfbb3f5SIan Lepore { 98fdfbb3f5SIan Lepore 99fdfbb3f5SIan Lepore device_printf(sc->sc_dev, "PPS capture mode: "); 100*7bd8311dSJustin Hibbits switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 101fdfbb3f5SIan Lepore case UART_PPS_DISABLED: 102fdfbb3f5SIan Lepore printf("disabled"); 103*7bd8311dSJustin Hibbits break; 104fdfbb3f5SIan Lepore case UART_PPS_CTS: 105fdfbb3f5SIan Lepore printf("CTS"); 106*7bd8311dSJustin Hibbits break; 107fdfbb3f5SIan Lepore case UART_PPS_DCD: 108fdfbb3f5SIan Lepore printf("DCD"); 109*7bd8311dSJustin Hibbits break; 110fdfbb3f5SIan Lepore default: 111fdfbb3f5SIan Lepore printf("invalid"); 112*7bd8311dSJustin Hibbits break; 113fdfbb3f5SIan Lepore } 114fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 115fdfbb3f5SIan Lepore printf("-Inverted"); 116fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) 117fdfbb3f5SIan Lepore printf("-NarrowPulse"); 118fdfbb3f5SIan Lepore printf("\n"); 119196d3019SIan Lepore } 120196d3019SIan Lepore 121196d3019SIan Lepore static int 122196d3019SIan Lepore uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS) 123196d3019SIan Lepore { 124196d3019SIan Lepore struct uart_softc *sc; 125196d3019SIan Lepore int err, tmp; 126196d3019SIan Lepore 127196d3019SIan Lepore sc = arg1; 128196d3019SIan Lepore tmp = sc->sc_pps_mode; 129196d3019SIan Lepore err = sysctl_handle_int(oidp, &tmp, 0, req); 130196d3019SIan Lepore if (err != 0 || req->newptr == NULL) 131196d3019SIan Lepore return (err); 132196d3019SIan Lepore if (!uart_pps_mode_valid(tmp)) 133196d3019SIan Lepore return (EINVAL); 134196d3019SIan Lepore sc->sc_pps_mode = tmp; 135196d3019SIan Lepore return(0); 136196d3019SIan Lepore } 137196d3019SIan Lepore 138196d3019SIan Lepore static void 139fdfbb3f5SIan Lepore uart_pps_process(struct uart_softc *sc, int ser_sig) 140fdfbb3f5SIan Lepore { 141fdfbb3f5SIan Lepore sbintime_t now; 142fdfbb3f5SIan Lepore int is_assert, pps_sig; 143fdfbb3f5SIan Lepore 144fdfbb3f5SIan Lepore /* Which signal is configured as PPS? Early out if none. */ 145fdfbb3f5SIan Lepore switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 146fdfbb3f5SIan Lepore case UART_PPS_CTS: 147fdfbb3f5SIan Lepore pps_sig = SER_CTS; 148fdfbb3f5SIan Lepore break; 149fdfbb3f5SIan Lepore case UART_PPS_DCD: 150fdfbb3f5SIan Lepore pps_sig = SER_DCD; 151fdfbb3f5SIan Lepore break; 152fdfbb3f5SIan Lepore default: 153fdfbb3f5SIan Lepore return; 154fdfbb3f5SIan Lepore } 155fdfbb3f5SIan Lepore 156fdfbb3f5SIan Lepore /* Early out if there is no change in the signal configured as PPS. */ 157fdfbb3f5SIan Lepore if ((ser_sig & SER_DELTA(pps_sig)) == 0) 158fdfbb3f5SIan Lepore return; 159fdfbb3f5SIan Lepore 160fdfbb3f5SIan Lepore /* 161fdfbb3f5SIan Lepore * In narrow-pulse mode we need to synthesize both capture and clear 162fdfbb3f5SIan Lepore * events from a single "delta occurred" indication from the uart 163fdfbb3f5SIan Lepore * hardware because the pulse width is too narrow to reliably detect 164fdfbb3f5SIan Lepore * both edges. However, when the pulse width is close to our interrupt 165fdfbb3f5SIan Lepore * processing latency we might intermittantly catch both edges. To 166fdfbb3f5SIan Lepore * guard against generating spurious events when that happens, we use a 167fdfbb3f5SIan Lepore * separate timer to ensure at least half a second elapses before we 168fdfbb3f5SIan Lepore * generate another event. 169fdfbb3f5SIan Lepore */ 170fdfbb3f5SIan Lepore pps_capture(&sc->sc_pps); 171fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) { 172fdfbb3f5SIan Lepore now = getsbinuptime(); 173fdfbb3f5SIan Lepore if (now > sc->sc_pps_captime + 500 * SBT_1MS) { 174fdfbb3f5SIan Lepore sc->sc_pps_captime = now; 175fdfbb3f5SIan Lepore pps_event(&sc->sc_pps, PPS_CAPTUREASSERT); 176fdfbb3f5SIan Lepore pps_event(&sc->sc_pps, PPS_CAPTURECLEAR); 177fdfbb3f5SIan Lepore } 178fdfbb3f5SIan Lepore } else { 179fdfbb3f5SIan Lepore is_assert = ser_sig & pps_sig; 180fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 181fdfbb3f5SIan Lepore is_assert = !is_assert; 182fdfbb3f5SIan Lepore pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT : 183fdfbb3f5SIan Lepore PPS_CAPTURECLEAR); 184fdfbb3f5SIan Lepore } 185fdfbb3f5SIan Lepore } 186fdfbb3f5SIan Lepore 187fdfbb3f5SIan Lepore static void 188196d3019SIan Lepore uart_pps_init(struct uart_softc *sc) 189196d3019SIan Lepore { 190196d3019SIan Lepore struct sysctl_ctx_list *ctx; 191196d3019SIan Lepore struct sysctl_oid *tree; 192196d3019SIan Lepore 193196d3019SIan Lepore ctx = device_get_sysctl_ctx(sc->sc_dev); 194196d3019SIan Lepore tree = device_get_sysctl_tree(sc->sc_dev); 195196d3019SIan Lepore 196196d3019SIan Lepore /* 197196d3019SIan Lepore * The historical default for pps capture mode is either DCD or CTS, 198196d3019SIan Lepore * depending on the UART_PPS_ON_CTS kernel option. Start with that, 199196d3019SIan Lepore * then try to fetch the tunable that overrides the mode for all uart 200196d3019SIan Lepore * devices, then try to fetch the sysctl-tunable that overrides the mode 201196d3019SIan Lepore * for one specific device. 202196d3019SIan Lepore */ 203196d3019SIan Lepore #ifdef UART_PPS_ON_CTS 204fdfbb3f5SIan Lepore sc->sc_pps_mode = UART_PPS_CTS; 205196d3019SIan Lepore #else 206fdfbb3f5SIan Lepore sc->sc_pps_mode = UART_PPS_DCD; 207196d3019SIan Lepore #endif 208196d3019SIan Lepore TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode); 209196d3019SIan Lepore SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode", 210196d3019SIan Lepore CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I", 211fdfbb3f5SIan Lepore "pulse mode: 0/1/2=disabled/CTS/DCD; " 212fdfbb3f5SIan Lepore "add 0x10 to invert, 0x20 for narrow pulse"); 213196d3019SIan Lepore 214196d3019SIan Lepore if (!uart_pps_mode_valid(sc->sc_pps_mode)) { 215196d3019SIan Lepore device_printf(sc->sc_dev, 216fdfbb3f5SIan Lepore "Invalid pps_mode 0x%02x configured; disabling PPS capture\n", 217196d3019SIan Lepore sc->sc_pps_mode); 218fdfbb3f5SIan Lepore sc->sc_pps_mode = UART_PPS_DISABLED; 219196d3019SIan Lepore } else if (bootverbose) { 220fdfbb3f5SIan Lepore uart_pps_print_mode(sc); 221196d3019SIan Lepore } 222196d3019SIan Lepore 223196d3019SIan Lepore sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 224196d3019SIan Lepore sc->sc_pps.driver_mtx = uart_tty_getlock(sc); 225196d3019SIan Lepore sc->sc_pps.driver_abi = PPS_ABI_VERSION; 226196d3019SIan Lepore pps_init_abi(&sc->sc_pps); 227196d3019SIan Lepore } 228196d3019SIan Lepore 22927d5dc18SMarcel Moolenaar void 23027d5dc18SMarcel Moolenaar uart_add_sysdev(struct uart_devinfo *di) 23127d5dc18SMarcel Moolenaar { 23227d5dc18SMarcel Moolenaar SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 23327d5dc18SMarcel Moolenaar } 23427d5dc18SMarcel Moolenaar 235f8100ce2SMarcel Moolenaar const char * 236f8100ce2SMarcel Moolenaar uart_getname(struct uart_class *uc) 237f8100ce2SMarcel Moolenaar { 238f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->name : NULL); 239f8100ce2SMarcel Moolenaar } 240f8100ce2SMarcel Moolenaar 241f8100ce2SMarcel Moolenaar struct uart_ops * 242f8100ce2SMarcel Moolenaar uart_getops(struct uart_class *uc) 243f8100ce2SMarcel Moolenaar { 244f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->uc_ops : NULL); 245f8100ce2SMarcel Moolenaar } 246f8100ce2SMarcel Moolenaar 247f8100ce2SMarcel Moolenaar int 248f8100ce2SMarcel Moolenaar uart_getrange(struct uart_class *uc) 249f8100ce2SMarcel Moolenaar { 250f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->uc_range : 0); 251f8100ce2SMarcel Moolenaar } 252f8100ce2SMarcel Moolenaar 253405ada37SAndrew Turner u_int 254405ada37SAndrew Turner uart_getregshift(struct uart_class *uc) 255405ada37SAndrew Turner { 256405ada37SAndrew Turner return ((uc != NULL) ? uc->uc_rshift : 0); 257405ada37SAndrew Turner } 258405ada37SAndrew Turner 25927d5dc18SMarcel Moolenaar /* 2608af03381SMarcel Moolenaar * Schedule a soft interrupt. We do this on the 0 to !0 transition 2618af03381SMarcel Moolenaar * of the TTY pending interrupt status. 2628af03381SMarcel Moolenaar */ 2630acb3c4aSMarcel Moolenaar void 2648af03381SMarcel Moolenaar uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 2658af03381SMarcel Moolenaar { 2668af03381SMarcel Moolenaar uint32_t new, old; 2678af03381SMarcel Moolenaar 2688af03381SMarcel Moolenaar do { 2698af03381SMarcel Moolenaar old = sc->sc_ttypend; 2708af03381SMarcel Moolenaar new = old | ipend; 2718af03381SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 2728af03381SMarcel Moolenaar 2738af03381SMarcel Moolenaar if ((old & SER_INT_MASK) == 0) 2748af03381SMarcel Moolenaar swi_sched(sc->sc_softih, 0); 2758af03381SMarcel Moolenaar } 2768af03381SMarcel Moolenaar 2778af03381SMarcel Moolenaar /* 27827d5dc18SMarcel Moolenaar * A break condition has been detected. We treat the break condition as 27927d5dc18SMarcel Moolenaar * a special case that should not happen during normal operation. When 28027d5dc18SMarcel Moolenaar * the break condition is to be passed to higher levels in the form of 28127d5dc18SMarcel Moolenaar * a NUL character, we really want the break to be in the right place in 28227d5dc18SMarcel Moolenaar * the input stream. The overhead to achieve that is not in relation to 28327d5dc18SMarcel Moolenaar * the exceptional nature of the break condition, so we permit ourselves 28427d5dc18SMarcel Moolenaar * to be sloppy. 28527d5dc18SMarcel Moolenaar */ 2868af03381SMarcel Moolenaar static __inline int 2878af03381SMarcel Moolenaar uart_intr_break(void *arg) 28827d5dc18SMarcel Moolenaar { 2898af03381SMarcel Moolenaar struct uart_softc *sc = arg; 29027d5dc18SMarcel Moolenaar 2914cf75455SRobert Watson #if defined(KDB) 29227d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 2934cf75455SRobert Watson if (kdb_break()) 2948af03381SMarcel Moolenaar return (0); 29527d5dc18SMarcel Moolenaar } 29627d5dc18SMarcel Moolenaar #endif 29727d5dc18SMarcel Moolenaar if (sc->sc_opened) 2988af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_BREAK); 2998af03381SMarcel Moolenaar return (0); 30027d5dc18SMarcel Moolenaar } 30127d5dc18SMarcel Moolenaar 30227d5dc18SMarcel Moolenaar /* 30327d5dc18SMarcel Moolenaar * Handle a receiver overrun situation. We lost at least 1 byte in the 30427d5dc18SMarcel Moolenaar * input stream and it's our job to contain the situation. We grab as 30527d5dc18SMarcel Moolenaar * much of the data we can, but otherwise flush the receiver FIFO to 30627d5dc18SMarcel Moolenaar * create some breathing room. The net effect is that we avoid the 30727d5dc18SMarcel Moolenaar * overrun condition to happen for the next X characters, where X is 308a164074fSEitan Adler * related to the FIFO size at the cost of losing data right away. 30927d5dc18SMarcel Moolenaar * So, instead of having multiple overrun interrupts in close proximity 31027d5dc18SMarcel Moolenaar * to each other and possibly pessimizing UART interrupt latency for 31127d5dc18SMarcel Moolenaar * other UARTs in a multiport configuration, we create a longer segment 31227d5dc18SMarcel Moolenaar * of missing characters by freeing up the FIFO. 31327d5dc18SMarcel Moolenaar * Each overrun condition is marked in the input buffer by a token. The 31427d5dc18SMarcel Moolenaar * token represents the loss of at least one, but possible more bytes in 31527d5dc18SMarcel Moolenaar * the input stream. 31627d5dc18SMarcel Moolenaar */ 3178af03381SMarcel Moolenaar static __inline int 3188af03381SMarcel Moolenaar uart_intr_overrun(void *arg) 31927d5dc18SMarcel Moolenaar { 3208af03381SMarcel Moolenaar struct uart_softc *sc = arg; 32127d5dc18SMarcel Moolenaar 32227d5dc18SMarcel Moolenaar if (sc->sc_opened) { 32327d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 32427d5dc18SMarcel Moolenaar if (uart_rx_put(sc, UART_STAT_OVERRUN)) 32527d5dc18SMarcel Moolenaar sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 3268af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_RXREADY); 32727d5dc18SMarcel Moolenaar } 32827d5dc18SMarcel Moolenaar UART_FLUSH(sc, UART_FLUSH_RECEIVER); 3298af03381SMarcel Moolenaar return (0); 33027d5dc18SMarcel Moolenaar } 33127d5dc18SMarcel Moolenaar 33227d5dc18SMarcel Moolenaar /* 33327d5dc18SMarcel Moolenaar * Received data ready. 33427d5dc18SMarcel Moolenaar */ 3358af03381SMarcel Moolenaar static __inline int 3368af03381SMarcel Moolenaar uart_intr_rxready(void *arg) 33727d5dc18SMarcel Moolenaar { 3388af03381SMarcel Moolenaar struct uart_softc *sc = arg; 33927d5dc18SMarcel Moolenaar int rxp; 34027d5dc18SMarcel Moolenaar 34127d5dc18SMarcel Moolenaar rxp = sc->sc_rxput; 34227d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 3434cf75455SRobert Watson #if defined(KDB) 34427d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 34527d5dc18SMarcel Moolenaar while (rxp != sc->sc_rxput) { 3464cf75455SRobert Watson kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); 34727d5dc18SMarcel Moolenaar if (rxp == sc->sc_rxbufsz) 34827d5dc18SMarcel Moolenaar rxp = 0; 34927d5dc18SMarcel Moolenaar } 35027d5dc18SMarcel Moolenaar } 35127d5dc18SMarcel Moolenaar #endif 35227d5dc18SMarcel Moolenaar if (sc->sc_opened) 3538af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_RXREADY); 35427d5dc18SMarcel Moolenaar else 35527d5dc18SMarcel Moolenaar sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 3568af03381SMarcel Moolenaar return (1); 35727d5dc18SMarcel Moolenaar } 35827d5dc18SMarcel Moolenaar 35927d5dc18SMarcel Moolenaar /* 36027d5dc18SMarcel Moolenaar * Line or modem status change (OOB signalling). 36127d5dc18SMarcel Moolenaar * We pass the signals to the software interrupt handler for further 36227d5dc18SMarcel Moolenaar * processing. Note that we merge the delta bits, but set the state 363a164074fSEitan Adler * bits. This is to avoid losing state transitions due to having more 36427d5dc18SMarcel Moolenaar * than 1 hardware interrupt between software interrupts. 36527d5dc18SMarcel Moolenaar */ 3668af03381SMarcel Moolenaar static __inline int 3678af03381SMarcel Moolenaar uart_intr_sigchg(void *arg) 36827d5dc18SMarcel Moolenaar { 3698af03381SMarcel Moolenaar struct uart_softc *sc = arg; 370fdfbb3f5SIan Lepore int new, old, sig; 37127d5dc18SMarcel Moolenaar 37227d5dc18SMarcel Moolenaar sig = UART_GETSIG(sc); 3738194412bSMarcel Moolenaar 374fac6a198SIan Lepore /* 375fdfbb3f5SIan Lepore * Time pulse counting support, invoked whenever the PPS parameters are 376fdfbb3f5SIan Lepore * currently set to capture either edge of the signal. 377fac6a198SIan Lepore */ 3788194412bSMarcel Moolenaar if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 379fdfbb3f5SIan Lepore uart_pps_process(sc, sig); 3808194412bSMarcel Moolenaar } 3818194412bSMarcel Moolenaar 3828af03381SMarcel Moolenaar /* 3838af03381SMarcel Moolenaar * Keep track of signal changes, even when the device is not 3848af03381SMarcel Moolenaar * opened. This allows us to inform upper layers about a 3858af03381SMarcel Moolenaar * possible loss of DCD and thus the existence of a (possibly) 3868af03381SMarcel Moolenaar * different connection when we have DCD back, during the time 3878af03381SMarcel Moolenaar * that the device was closed. 3888af03381SMarcel Moolenaar */ 38927d5dc18SMarcel Moolenaar do { 39027d5dc18SMarcel Moolenaar old = sc->sc_ttypend; 391ea549414SMarcel Moolenaar new = old & ~SER_MASK_STATE; 3922d511805SMarcel Moolenaar new |= sig & SER_INT_SIGMASK; 39327d5dc18SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 3948af03381SMarcel Moolenaar 3958af03381SMarcel Moolenaar if (sc->sc_opened) 3968af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_SIGCHG); 3978af03381SMarcel Moolenaar return (1); 39827d5dc18SMarcel Moolenaar } 39927d5dc18SMarcel Moolenaar 40027d5dc18SMarcel Moolenaar /* 40127d5dc18SMarcel Moolenaar * The transmitter can accept more data. 40227d5dc18SMarcel Moolenaar */ 4038af03381SMarcel Moolenaar static __inline int 4048af03381SMarcel Moolenaar uart_intr_txidle(void *arg) 40527d5dc18SMarcel Moolenaar { 4068af03381SMarcel Moolenaar struct uart_softc *sc = arg; 4078af03381SMarcel Moolenaar 40827d5dc18SMarcel Moolenaar if (sc->sc_txbusy) { 40927d5dc18SMarcel Moolenaar sc->sc_txbusy = 0; 4108af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_TXIDLE); 41127d5dc18SMarcel Moolenaar } 4128af03381SMarcel Moolenaar return (0); 41327d5dc18SMarcel Moolenaar } 41427d5dc18SMarcel Moolenaar 415ef544f63SPaolo Pisati static int 41627d5dc18SMarcel Moolenaar uart_intr(void *arg) 41727d5dc18SMarcel Moolenaar { 41827d5dc18SMarcel Moolenaar struct uart_softc *sc = arg; 41986fb5400SMarius Strobl int cnt, ipend, testintr; 42027d5dc18SMarcel Moolenaar 421eead2d55SMarcel Moolenaar if (sc->sc_leaving) 422eead2d55SMarcel Moolenaar return (FILTER_STRAY); 423eead2d55SMarcel Moolenaar 424eead2d55SMarcel Moolenaar cnt = 0; 42586fb5400SMarius Strobl testintr = sc->sc_testintr; 42686fb5400SMarius Strobl while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) { 427eead2d55SMarcel Moolenaar cnt++; 4282d511805SMarcel Moolenaar if (ipend & SER_INT_OVERRUN) 42927d5dc18SMarcel Moolenaar uart_intr_overrun(sc); 4302d511805SMarcel Moolenaar if (ipend & SER_INT_BREAK) 43127d5dc18SMarcel Moolenaar uart_intr_break(sc); 4322d511805SMarcel Moolenaar if (ipend & SER_INT_RXREADY) 43327d5dc18SMarcel Moolenaar uart_intr_rxready(sc); 4342d511805SMarcel Moolenaar if (ipend & SER_INT_SIGCHG) 43527d5dc18SMarcel Moolenaar uart_intr_sigchg(sc); 4362d511805SMarcel Moolenaar if (ipend & SER_INT_TXIDLE) 43727d5dc18SMarcel Moolenaar uart_intr_txidle(sc); 4388af03381SMarcel Moolenaar } 439332cda07SPeter Grehan 440332cda07SPeter Grehan if (sc->sc_polled) { 441332cda07SPeter Grehan callout_reset(&sc->sc_timer, hz / uart_poll_freq, 442332cda07SPeter Grehan (timeout_t *)uart_intr, sc); 443332cda07SPeter Grehan } 444332cda07SPeter Grehan 445eead2d55SMarcel Moolenaar return ((cnt == 0) ? FILTER_STRAY : 44686fb5400SMarius Strobl ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD : 44786fb5400SMarius Strobl FILTER_HANDLED)); 4488af03381SMarcel Moolenaar } 44927d5dc18SMarcel Moolenaar 4508af03381SMarcel Moolenaar serdev_intr_t * 4518af03381SMarcel Moolenaar uart_bus_ihand(device_t dev, int ipend) 4528af03381SMarcel Moolenaar { 4538af03381SMarcel Moolenaar 4548af03381SMarcel Moolenaar switch (ipend) { 4558af03381SMarcel Moolenaar case SER_INT_BREAK: 4568af03381SMarcel Moolenaar return (uart_intr_break); 4578af03381SMarcel Moolenaar case SER_INT_OVERRUN: 4588af03381SMarcel Moolenaar return (uart_intr_overrun); 4598af03381SMarcel Moolenaar case SER_INT_RXREADY: 4608af03381SMarcel Moolenaar return (uart_intr_rxready); 4618af03381SMarcel Moolenaar case SER_INT_SIGCHG: 4628af03381SMarcel Moolenaar return (uart_intr_sigchg); 4638af03381SMarcel Moolenaar case SER_INT_TXIDLE: 4648af03381SMarcel Moolenaar return (uart_intr_txidle); 4658af03381SMarcel Moolenaar } 4668af03381SMarcel Moolenaar return (NULL); 4678af03381SMarcel Moolenaar } 4688af03381SMarcel Moolenaar 4698af03381SMarcel Moolenaar int 470a31f91a0SMarcel Moolenaar uart_bus_ipend(device_t dev) 471a31f91a0SMarcel Moolenaar { 472a31f91a0SMarcel Moolenaar struct uart_softc *sc; 473a31f91a0SMarcel Moolenaar 474a31f91a0SMarcel Moolenaar sc = device_get_softc(dev); 475a31f91a0SMarcel Moolenaar return (UART_IPEND(sc)); 476a31f91a0SMarcel Moolenaar } 477a31f91a0SMarcel Moolenaar 478a31f91a0SMarcel Moolenaar int 4798af03381SMarcel Moolenaar uart_bus_sysdev(device_t dev) 4808af03381SMarcel Moolenaar { 4818af03381SMarcel Moolenaar struct uart_softc *sc; 4828af03381SMarcel Moolenaar 4838af03381SMarcel Moolenaar sc = device_get_softc(dev); 4848af03381SMarcel Moolenaar return ((sc->sc_sysdev != NULL) ? 1 : 0); 48527d5dc18SMarcel Moolenaar } 48627d5dc18SMarcel Moolenaar 48727d5dc18SMarcel Moolenaar int 488875f70dbSMarcel Moolenaar uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 48927d5dc18SMarcel Moolenaar { 49027d5dc18SMarcel Moolenaar struct uart_softc *sc; 49127d5dc18SMarcel Moolenaar struct uart_devinfo *sysdev; 49227d5dc18SMarcel Moolenaar int error; 49327d5dc18SMarcel Moolenaar 494f8100ce2SMarcel Moolenaar sc = device_get_softc(dev); 495f8100ce2SMarcel Moolenaar 496f8100ce2SMarcel Moolenaar /* 497f8100ce2SMarcel Moolenaar * All uart_class references are weak. Check that the needed 498f8100ce2SMarcel Moolenaar * class has been compiled-in. Fail if not. 499f8100ce2SMarcel Moolenaar */ 500f8100ce2SMarcel Moolenaar if (sc->sc_class == NULL) 501f8100ce2SMarcel Moolenaar return (ENXIO); 502f8100ce2SMarcel Moolenaar 50327d5dc18SMarcel Moolenaar /* 50427d5dc18SMarcel Moolenaar * Initialize the instance. Note that the instance (=softc) does 50527d5dc18SMarcel Moolenaar * not necessarily match the hardware specific softc. We can't do 50627d5dc18SMarcel Moolenaar * anything about it now, because we may not attach to the device. 50727d5dc18SMarcel Moolenaar * Hardware drivers cannot use any of the class specific fields 50827d5dc18SMarcel Moolenaar * while probing. 50927d5dc18SMarcel Moolenaar */ 51027d5dc18SMarcel Moolenaar kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 51127d5dc18SMarcel Moolenaar sc->sc_dev = dev; 51227d5dc18SMarcel Moolenaar if (device_get_desc(dev) == NULL) 513f8100ce2SMarcel Moolenaar device_set_desc(dev, uart_getname(sc->sc_class)); 51427d5dc18SMarcel Moolenaar 51527d5dc18SMarcel Moolenaar /* 51627d5dc18SMarcel Moolenaar * Allocate the register resource. We assume that all UARTs have 51727d5dc18SMarcel Moolenaar * a single register window in either I/O port space or memory 51827d5dc18SMarcel Moolenaar * mapped I/O space. Any UART that needs multiple windows will 51927d5dc18SMarcel Moolenaar * consequently not be supported by this driver as-is. We try I/O 52027d5dc18SMarcel Moolenaar * port space first because that's the common case. 52127d5dc18SMarcel Moolenaar */ 52227d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 52327d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_IOPORT; 5249def69ecSMarcel Moolenaar sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 5259def69ecSMarcel Moolenaar RF_ACTIVE); 52627d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) { 52727d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 52827d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_MEMORY; 5299def69ecSMarcel Moolenaar sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, 5309def69ecSMarcel Moolenaar &sc->sc_rrid, RF_ACTIVE); 53127d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) 53227d5dc18SMarcel Moolenaar return (ENXIO); 53327d5dc18SMarcel Moolenaar } 53427d5dc18SMarcel Moolenaar 53527d5dc18SMarcel Moolenaar /* 53627d5dc18SMarcel Moolenaar * Fill in the bus access structure and compare this device with 53727d5dc18SMarcel Moolenaar * a possible console device and/or a debug port. We set the flags 53827d5dc18SMarcel Moolenaar * in the softc so that the hardware dependent probe can adjust 53927d5dc18SMarcel Moolenaar * accordingly. In general, you don't want to permanently disrupt 54027d5dc18SMarcel Moolenaar * console I/O. 54127d5dc18SMarcel Moolenaar */ 54227d5dc18SMarcel Moolenaar sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 54327d5dc18SMarcel Moolenaar sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 544875f70dbSMarcel Moolenaar sc->sc_bas.chan = chan; 54527d5dc18SMarcel Moolenaar sc->sc_bas.regshft = regshft; 54627d5dc18SMarcel Moolenaar sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 54727d5dc18SMarcel Moolenaar 54827d5dc18SMarcel Moolenaar SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 549875f70dbSMarcel Moolenaar if (chan == sysdev->bas.chan && 550875f70dbSMarcel Moolenaar uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 55127d5dc18SMarcel Moolenaar /* XXX check if ops matches class. */ 55227d5dc18SMarcel Moolenaar sc->sc_sysdev = sysdev; 5531c5e367bSMarcel Moolenaar sysdev->bas.rclk = sc->sc_bas.rclk; 55427d5dc18SMarcel Moolenaar } 55527d5dc18SMarcel Moolenaar } 55627d5dc18SMarcel Moolenaar 55727d5dc18SMarcel Moolenaar error = UART_PROBE(sc); 55827d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 559b923a710SMarcel Moolenaar return ((error) ? error : BUS_PROBE_DEFAULT); 56027d5dc18SMarcel Moolenaar } 56127d5dc18SMarcel Moolenaar 56227d5dc18SMarcel Moolenaar int 56327d5dc18SMarcel Moolenaar uart_bus_attach(device_t dev) 56427d5dc18SMarcel Moolenaar { 56527d5dc18SMarcel Moolenaar struct uart_softc *sc, *sc0; 56627d5dc18SMarcel Moolenaar const char *sep; 567eead2d55SMarcel Moolenaar int error, filt; 56827d5dc18SMarcel Moolenaar 56927d5dc18SMarcel Moolenaar /* 57027d5dc18SMarcel Moolenaar * The sc_class field defines the type of UART we're going to work 57127d5dc18SMarcel Moolenaar * with and thus the size of the softc. Replace the generic softc 57227d5dc18SMarcel Moolenaar * with one that matches the UART now that we're certain we handle 57327d5dc18SMarcel Moolenaar * the device. 57427d5dc18SMarcel Moolenaar */ 57527d5dc18SMarcel Moolenaar sc0 = device_get_softc(dev); 57627d5dc18SMarcel Moolenaar if (sc0->sc_class->size > sizeof(*sc)) { 57727d5dc18SMarcel Moolenaar sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 57827d5dc18SMarcel Moolenaar bcopy(sc0, sc, sizeof(*sc)); 57927d5dc18SMarcel Moolenaar device_set_softc(dev, sc); 58027d5dc18SMarcel Moolenaar } else 58127d5dc18SMarcel Moolenaar sc = sc0; 58227d5dc18SMarcel Moolenaar 58327d5dc18SMarcel Moolenaar /* 584d76a1ef4SWarner Losh * Now that we know the softc for this device, connect the back 585d76a1ef4SWarner Losh * pointer from the sysdev for this device, if any 586d76a1ef4SWarner Losh */ 587d76a1ef4SWarner Losh if (sc->sc_sysdev != NULL) 588d76a1ef4SWarner Losh sc->sc_sysdev->sc = sc; 589d76a1ef4SWarner Losh 590d76a1ef4SWarner Losh /* 59127d5dc18SMarcel Moolenaar * Protect ourselves against interrupts while we're not completely 59227d5dc18SMarcel Moolenaar * finished attaching and initializing. We don't expect interrupts 59386fb5400SMarius Strobl * until after UART_ATTACH(), though. 59427d5dc18SMarcel Moolenaar */ 59527d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 59627d5dc18SMarcel Moolenaar 5978af03381SMarcel Moolenaar mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 5988af03381SMarcel Moolenaar if (sc->sc_hwmtx == NULL) 5998af03381SMarcel Moolenaar sc->sc_hwmtx = &sc->sc_hwmtx_s; 60006287620SMarcel Moolenaar 60127d5dc18SMarcel Moolenaar /* 60227d5dc18SMarcel Moolenaar * Re-allocate. We expect that the softc contains the information 60327d5dc18SMarcel Moolenaar * collected by uart_bus_probe() intact. 60427d5dc18SMarcel Moolenaar */ 6059def69ecSMarcel Moolenaar sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 6069def69ecSMarcel Moolenaar RF_ACTIVE); 6072682e7b6SMarius Strobl if (sc->sc_rres == NULL) { 6088af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 60927d5dc18SMarcel Moolenaar return (ENXIO); 6102682e7b6SMarius Strobl } 611b8759afcSYoshihiro Takahashi sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 612b8759afcSYoshihiro Takahashi sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 613b8759afcSYoshihiro Takahashi 6143ad36a41SIan Lepore /* 6153ad36a41SIan Lepore * Ensure there is room for at least three full FIFOs of data in the 6163ad36a41SIan Lepore * receive buffer (handles the case of low-level drivers with huge 6173ad36a41SIan Lepore * FIFOs), and also ensure that there is no less than the historical 6183ad36a41SIan Lepore * size of 384 bytes (handles the typical small-FIFO case). 6193ad36a41SIan Lepore */ 6203ad36a41SIan Lepore sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); 62127d5dc18SMarcel Moolenaar sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 62227d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 62327d5dc18SMarcel Moolenaar sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 62427d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 62527d5dc18SMarcel Moolenaar 62627d5dc18SMarcel Moolenaar error = UART_ATTACH(sc); 62727d5dc18SMarcel Moolenaar if (error) 62827d5dc18SMarcel Moolenaar goto fail; 62927d5dc18SMarcel Moolenaar 63027d5dc18SMarcel Moolenaar if (sc->sc_hwiflow || sc->sc_hwoflow) { 63127d5dc18SMarcel Moolenaar sep = ""; 63227d5dc18SMarcel Moolenaar device_print_prettyname(dev); 63327d5dc18SMarcel Moolenaar if (sc->sc_hwiflow) { 63427d5dc18SMarcel Moolenaar printf("%sRTS iflow", sep); 63527d5dc18SMarcel Moolenaar sep = ", "; 63627d5dc18SMarcel Moolenaar } 63727d5dc18SMarcel Moolenaar if (sc->sc_hwoflow) { 63827d5dc18SMarcel Moolenaar printf("%sCTS oflow", sep); 63927d5dc18SMarcel Moolenaar sep = ", "; 64027d5dc18SMarcel Moolenaar } 64127d5dc18SMarcel Moolenaar printf("\n"); 64227d5dc18SMarcel Moolenaar } 64327d5dc18SMarcel Moolenaar 64427d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL) { 6455dceed8aSWarner Losh if (sc->sc_sysdev->baudrate == 0) { 64654e2bcc7SMarcel Moolenaar if (UART_IOCTL(sc, UART_IOCTL_BAUD, 64754e2bcc7SMarcel Moolenaar (intptr_t)&sc->sc_sysdev->baudrate) != 0) 64854e2bcc7SMarcel Moolenaar sc->sc_sysdev->baudrate = -1; 64954e2bcc7SMarcel Moolenaar } 65027d5dc18SMarcel Moolenaar switch (sc->sc_sysdev->type) { 65127d5dc18SMarcel Moolenaar case UART_DEV_CONSOLE: 65227d5dc18SMarcel Moolenaar device_printf(dev, "console"); 65327d5dc18SMarcel Moolenaar break; 65427d5dc18SMarcel Moolenaar case UART_DEV_DBGPORT: 65527d5dc18SMarcel Moolenaar device_printf(dev, "debug port"); 65627d5dc18SMarcel Moolenaar break; 65727d5dc18SMarcel Moolenaar case UART_DEV_KEYBOARD: 65827d5dc18SMarcel Moolenaar device_printf(dev, "keyboard"); 65927d5dc18SMarcel Moolenaar break; 66027d5dc18SMarcel Moolenaar default: 66127d5dc18SMarcel Moolenaar device_printf(dev, "unknown system device"); 66227d5dc18SMarcel Moolenaar break; 66327d5dc18SMarcel Moolenaar } 66427d5dc18SMarcel Moolenaar printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 66527d5dc18SMarcel Moolenaar "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 66627d5dc18SMarcel Moolenaar sc->sc_sysdev->stopbits); 66727d5dc18SMarcel Moolenaar } 66827d5dc18SMarcel Moolenaar 669eead2d55SMarcel Moolenaar sc->sc_leaving = 0; 67086fb5400SMarius Strobl sc->sc_testintr = 1; 671eead2d55SMarcel Moolenaar filt = uart_intr(sc); 67286fb5400SMarius Strobl sc->sc_testintr = 0; 673eead2d55SMarcel Moolenaar 674eead2d55SMarcel Moolenaar /* 675eead2d55SMarcel Moolenaar * Don't use interrupts if we couldn't clear any pending interrupt 676eead2d55SMarcel Moolenaar * conditions. We may have broken H/W and polling is probably the 677eead2d55SMarcel Moolenaar * safest thing to do. 678eead2d55SMarcel Moolenaar */ 67962145ff3SNeel Natu if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) { 680eead2d55SMarcel Moolenaar sc->sc_irid = 0; 681eead2d55SMarcel Moolenaar sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, 682eead2d55SMarcel Moolenaar &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); 683eead2d55SMarcel Moolenaar } 684eead2d55SMarcel Moolenaar if (sc->sc_ires != NULL) { 685eead2d55SMarcel Moolenaar error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, 686eead2d55SMarcel Moolenaar uart_intr, NULL, sc, &sc->sc_icookie); 687eead2d55SMarcel Moolenaar sc->sc_fastintr = (error == 0) ? 1 : 0; 688eead2d55SMarcel Moolenaar 689eead2d55SMarcel Moolenaar if (!sc->sc_fastintr) 690eead2d55SMarcel Moolenaar error = bus_setup_intr(dev, sc->sc_ires, 691eead2d55SMarcel Moolenaar INTR_TYPE_TTY | INTR_MPSAFE, NULL, 692eead2d55SMarcel Moolenaar (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 693eead2d55SMarcel Moolenaar 694eead2d55SMarcel Moolenaar if (error) { 695eead2d55SMarcel Moolenaar device_printf(dev, "could not activate interrupt\n"); 696eead2d55SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 697eead2d55SMarcel Moolenaar sc->sc_ires); 698eead2d55SMarcel Moolenaar sc->sc_ires = NULL; 699eead2d55SMarcel Moolenaar } 700eead2d55SMarcel Moolenaar } 701eead2d55SMarcel Moolenaar if (sc->sc_ires == NULL) { 702eead2d55SMarcel Moolenaar /* No interrupt resource. Force polled mode. */ 703eead2d55SMarcel Moolenaar sc->sc_polled = 1; 704eead2d55SMarcel Moolenaar callout_init(&sc->sc_timer, 1); 70562145ff3SNeel Natu callout_reset(&sc->sc_timer, hz / uart_poll_freq, 70662145ff3SNeel Natu (timeout_t *)uart_intr, sc); 707eead2d55SMarcel Moolenaar } 708eead2d55SMarcel Moolenaar 709eead2d55SMarcel Moolenaar if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 710eead2d55SMarcel Moolenaar sep = ""; 711eead2d55SMarcel Moolenaar device_print_prettyname(dev); 712eead2d55SMarcel Moolenaar if (sc->sc_fastintr) { 713eead2d55SMarcel Moolenaar printf("%sfast interrupt", sep); 714eead2d55SMarcel Moolenaar sep = ", "; 715eead2d55SMarcel Moolenaar } 716eead2d55SMarcel Moolenaar if (sc->sc_polled) { 7171662b008SIan Lepore printf("%spolled mode (%dHz)", sep, uart_poll_freq); 718eead2d55SMarcel Moolenaar sep = ", "; 719eead2d55SMarcel Moolenaar } 720eead2d55SMarcel Moolenaar printf("\n"); 721eead2d55SMarcel Moolenaar } 722eead2d55SMarcel Moolenaar 723b59236ceSIan Lepore if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) { 724b59236ceSIan Lepore if ((error = sc->sc_sysdev->attach(sc)) != 0) 72527d5dc18SMarcel Moolenaar goto fail; 726b59236ceSIan Lepore } else { 727b59236ceSIan Lepore if ((error = uart_tty_attach(sc)) != 0) 728b59236ceSIan Lepore goto fail; 729196d3019SIan Lepore uart_pps_init(sc); 730b59236ceSIan Lepore } 73127d5dc18SMarcel Moolenaar 7328af03381SMarcel Moolenaar if (sc->sc_sysdev != NULL) 7338af03381SMarcel Moolenaar sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 7348af03381SMarcel Moolenaar 73527d5dc18SMarcel Moolenaar return (0); 73627d5dc18SMarcel Moolenaar 73727d5dc18SMarcel Moolenaar fail: 73827d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 73927d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 74027d5dc18SMarcel Moolenaar 74127d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 74227d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 74327d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 74427d5dc18SMarcel Moolenaar sc->sc_ires); 74527d5dc18SMarcel Moolenaar } 74627d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 74727d5dc18SMarcel Moolenaar 7488af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 7492682e7b6SMarius Strobl 75027d5dc18SMarcel Moolenaar return (error); 75127d5dc18SMarcel Moolenaar } 75227d5dc18SMarcel Moolenaar 75327d5dc18SMarcel Moolenaar int 75427d5dc18SMarcel Moolenaar uart_bus_detach(device_t dev) 75527d5dc18SMarcel Moolenaar { 75627d5dc18SMarcel Moolenaar struct uart_softc *sc; 75727d5dc18SMarcel Moolenaar 75827d5dc18SMarcel Moolenaar sc = device_get_softc(dev); 75927d5dc18SMarcel Moolenaar 76027d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 76127d5dc18SMarcel Moolenaar 7628af03381SMarcel Moolenaar if (sc->sc_sysdev != NULL) 7638af03381SMarcel Moolenaar sc->sc_sysdev->hwmtx = NULL; 7648af03381SMarcel Moolenaar 76527d5dc18SMarcel Moolenaar UART_DETACH(sc); 76627d5dc18SMarcel Moolenaar 76727d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 76827d5dc18SMarcel Moolenaar (*sc->sc_sysdev->detach)(sc); 76927d5dc18SMarcel Moolenaar else 77027d5dc18SMarcel Moolenaar uart_tty_detach(sc); 77127d5dc18SMarcel Moolenaar 77227d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 77327d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 77427d5dc18SMarcel Moolenaar 77527d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 77627d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 77727d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 77827d5dc18SMarcel Moolenaar sc->sc_ires); 77927d5dc18SMarcel Moolenaar } 78027d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 78127d5dc18SMarcel Moolenaar 7828af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 7832682e7b6SMarius Strobl 78427d5dc18SMarcel Moolenaar if (sc->sc_class->size > sizeof(*sc)) { 78527d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 78627d5dc18SMarcel Moolenaar free(sc, M_UART); 78727d5dc18SMarcel Moolenaar } else 78827d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 78927d5dc18SMarcel Moolenaar 79027d5dc18SMarcel Moolenaar return (0); 79127d5dc18SMarcel Moolenaar } 7925b23b1b9SAndriy Gapon 7935b23b1b9SAndriy Gapon int 7945b23b1b9SAndriy Gapon uart_bus_resume(device_t dev) 7955b23b1b9SAndriy Gapon { 7965b23b1b9SAndriy Gapon struct uart_softc *sc; 7975b23b1b9SAndriy Gapon 7985b23b1b9SAndriy Gapon sc = device_get_softc(dev); 7995b23b1b9SAndriy Gapon return (UART_ATTACH(sc)); 8005b23b1b9SAndriy Gapon } 801d76a1ef4SWarner Losh 802d76a1ef4SWarner Losh void 803d76a1ef4SWarner Losh uart_grab(struct uart_devinfo *di) 804d76a1ef4SWarner Losh { 805d76a1ef4SWarner Losh 806d76a1ef4SWarner Losh if (di->sc) 807d76a1ef4SWarner Losh UART_GRAB(di->sc); 808d76a1ef4SWarner Losh } 809d76a1ef4SWarner Losh 810d76a1ef4SWarner Losh void 811d76a1ef4SWarner Losh uart_ungrab(struct uart_devinfo *di) 812d76a1ef4SWarner Losh { 813d76a1ef4SWarner Losh 814d76a1ef4SWarner Losh if (di->sc) 815d76a1ef4SWarner Losh UART_UNGRAB(di->sc); 816d76a1ef4SWarner Losh } 817